tm october 2009 fdp16n50u / FDPF16N50UT n-channel mosfet ?2009 fairchild semiconductor corporation fdp16n50u / FDPF16N50UT rev. a1 www.fairchildsemi.com 1 unifet tm fdp16n50u / FDPF16N50UT n-channel mosfet, frfet 500v, 15a, 0.48 ? features ?r ds(on) = 0.37 ? ( typ.)@ v gs = 10v, i d = 7.5a ? low gate charge ( typ. 32nc) ? low c rss ( typ. 20pf) ? fast switching ? 100% avalanche tested ? improved dv/dt capability ? rohs compliant description these n-channel enhancement mode power field effect transis- tors are produced using fairchild?s proprietary, planar stripe, dmos technology. this advance technology has been especially tailored to mini- mize on-state resistance, prov ide superior switching perfor- mance, and withstand high energy pulse in the avalanche and commutation mode. these devices are well suited for high effi- cient switching mode power supplies and active power factor correction. to-220 fdp series g s d to-220f fdpf series g s d d g s mosfet maximum ratings t c = 25 o c unless otherwise noted* thermal characteristics symbol parameter fdp16n50u FDPF16N50UT units v dss drain to source voltage 500 v v gss gate to source voltage 30 v i d drain current -continuous (t c = 25 o c) 15 15* a -continuous (t c = 100 o c) 9 9* i dm drain current - pulsed (note 1) 60 60* a e as single pulsed avalanche energy (note 2) 610 mj i ar avalanche current (note 1) 15 a e ar repetitive avalanche energy (note 1) 20 mj dv/dt peak diode recovery dv/dt (note 3) 20 v/ns p d power dissipation (t c = 25 o c) 200 38.5 w - derate above 25 o c 1.59 0.3 w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for soldering purpose, 1/8? from case for 5 seconds 300 o c symbol parameter fdp16n50u FDPF16N50UT units r ? jc thermal resistance, junction to case 0.63 3.3 o c/w r ? cs thermal resistance, junction to ambient 0.5 - r ? ja thermal resistance, junction to ambient 62.5 62.5 *drain current limited by maximum junction temperature
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 2 package marking and ordering information t c = 25 o c unless otherwise noted electrical characteristics off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics device marking device package reel size tape width quantity fdp16n50u fdp16n50u to-220 - - 50 FDPF16N50UT FDPF16N50UT to-220f - - 50 symbol parameter test conditions min. typ. max. units bv dss drain to source breakdown voltage i d = 250 ? a, v gs = 0v, t j = 25 o c 500 - - v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 ? a, referenced to 25 o c-0.5-v/ o c i dss zero gate voltage drain current v ds = 500v, v gs = 0v - - 25 ? a v ds = 400v, t c = 125 o c - - 250 i gss gate to body leakage current v gs = 30v, v ds = 0v - - 100 na v gs(th) gate threshold voltage v gs = v ds , i d = 250 ? a3.0-5.0v r ds(on) static drain to source on resistance v gs = 10v, i d = 7.5a - 0.37 0.48 ? g fs forward transconductance v ds = 40v, i d = 7.5a (note 4) -23-s c iss input capacitance v ds = 25v, v gs = 0v f = 1mhz - 1495 1945 pf c oss output capacitance - 235 310 pf c rss reverse transfer capacitance - 20 30 pf q g(tot) total gate charge at 10v v ds = 400v, i d = 15a v gs = 10v (note 4, 5) -3245nc q gs gate to source gate charge - 8.5 - nc q gd gate to drain ?miller? charge - 14 - nc t d(on) turn-on delay time v dd = 250v, i d = 15a r g = 25 ? (note 4, 5) -4090ns t r turn-on rise time - 150 310 ns t d(off) turn-off delay time - 65 140 ns t f turn-off fall time - 80 170 ns i s maximum continuous drain to source diode forward current - - 15 a i sm maximum pulsed drain to source diode forward current - - 60 a v sd drain to source diode forward voltage v gs = 0v, i sd = 15a - - 1.6 v t rr reverse recovery time v gs = 0v, i sd = 15a di f /dt = 100a/ ? s (note 4) -65-ns q rr reverse recovery charge - 0.1 - ? c notes: 1. repetitive rating: pulse width limited by maximum junction temperature 2. l = 5.5mh, i as = 15a, v dd = 50v, r g = 25 ? , starting t j = 25 ? c 3. i sd ?? 16a, di/dt ? 200a/ ? s, v dd ? bv dss , starting t j = 25 ? c 4. pulse test: pulse width ? 300 ? s, duty cycle ? 2% 5. essentially independent of operating temperature typical characteristics
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 10 -1 10 0 10 1 10 -1 10 0 10 1 10 2 v gs top : 15.0 v 10.0 v 8.0 v 7.0 v 6.5 v 6.0 v bottom : 5.5 v * notes : 1. 250 ? s pulse test 2. t c = 25 o c i d , drain current [a] v ds , drain-source voltage [v] 24681012 10 0 10 1 150 o c 25 o c * notes : 1. v ds = 40v 2. 250 ? s pulse test i d , drain current [a] v gs , gate-source voltage [v] 0 5 10 15 20 25 30 35 40 0.2 0.3 0.4 0.5 0.6 v gs = 20v v gs = 10v * note : t j = 25 o c r ds(on) [ ? ], drain-source on-resistance i d , drain current [a] 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 10 0 10 1 150 o c * notes : 1. v gs = 0v 2. 250 ? s pulse test 25 o c i dr , reverse drain current [a] v sd , source-drain voltage [v] 10 -1 10 0 10 1 0 1000 2000 3000 4000 c iss = c gs + c gd (c ds = shorted) c oss = c ds + c gd c rss = c gd * note : 1. v gs = 0 v 2. f = 1 mhz c rss c oss c iss capacitances [pf] v ds , drain-source voltage [v] 0 10203040 0 2 4 6 8 10 12 v ds = 250v v ds = 100v v ds = 400v * note : i d = 15a v gs , gate-source voltage [v] q ttlgt ch [c]
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. maximum safe operating area vs. temperature - FDPF16N50UT figure 9. maximum drain current vs. case temperature - FDPF16N50UT figure 10. transient thermal response curve - FDPF16N50UT -100 -50 0 50 100 150 200 0.8 0.9 1.0 1.1 1.2 * notes : 1. v gs = 0 v 2. i d = 250 ? a bv dss , (normalized) drain-source breakdown voltage t j , junction temperature [ o c] 10 0 10 1 10 2 10 -2 10 -1 10 0 10 1 10 2 100 ms 1 ms 10 ? s dc 10 ms 100 ? s operation in this area is limited by r ds( on) * notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 25 50 75 100 125 150 0 5 10 15 i d , drain current [a] t c , case temperature [ o c] 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 * notes : 1. z ? jc (t) = 3.3 o c/w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z ? jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 z ? jc (t), thermal response t square wave pulse duration [sec] t 1 p dm t 2
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 5 gate charge test circuit & waveform resistive switching test circuit & waveforms unclamped inductive switching test circuit & waveforms
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 6 peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g sam e type as d u t v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( d r iv e r ) i sd ( d u t ) v ds ( dut ) v dd body diode forw ard v oltage d rop v sd i fm , b ody d iode forw ard c urrent b ody d iode r everse c urrent i rm b ody d iode r ecovery dv/dt di/dt d = gate pulse w idth g ate pulse period -------------------------- dut v ds + _ driver r g sam e type as d u t v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( d r iv e r ) i sd ( d u t ) v ds ( dut ) v dd body diode forw ard v oltage d rop v sd i fm , b ody d iode forw ard c urrent b ody d iode r everse c urrent i rm b ody d iode r ecovery dv/dt di/dt d = gate pulse w idth g ate pulse period -------------------------- d = gate pulse w idth g ate pulse period --------------------------
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 7 mechanical dimensions 4.50 0.20 9.90 0.20 1.52 0.10 0.80 0.10 2.40 0.20 10.00 0.20 1.27 0.10 ?.60 0.10 (8.70) 2.80 0.10 15.90 0.20 10.08 0.30 18.95max. (1.70) (3.70) (3.00) (1.46) (1.00) (45 ) 9.20 0.20 13.08 0.20 1.30 0.10 1.30 +0.10 ?.05 0.50 +0.10 ?.05 2.54typ [2.54 0.20 ] 2.54typ [2.54 0.20 ] to-220
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 8 package dimensions dimensions in millimeters to-220f potted * front/back side isol ation voltage : ac2500v
fdp16n50u / FDPF16N50UT n-channel mosfet fdp16n50u / FDPF16N50UT rev. www.fairchildsemi.com 9 trademarks the following includes registered and unregistered trademarks an d service marks, owned by fair child semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive lis t of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes wi thout further notice to any products herein to improve reliability, function, or desi gn. fairchild does not assume any liability ar ising out of the application or use of any product or circuit described herein; neither does it convey an y license under its patent rights , nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical co mponents in life support de vices or systems without the express written approval of fairchild se miconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into t he body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a sign ificant injury of the user. 2. a critical component in any com ponent of a life support, device, or system whose failure to perform can be reasonably expe cted to cause the failure of the life suppo rt device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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