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  ? semiconductor components industries, llc, 2001 january, 2001 rev. 0 1 publication order number: ntmd3p03r2/d ntmd3p03r2 product preview power mosfet -3.05 amps, -30 volts dual pchannel so8 features ? high efficiency components in a dual so8 package ? high density power mosfet with low r ds(on) ? miniature so8 surface mount package saves board space ? diode exhibits high speed with soft recovery ? i dss specified at elevated temperature ? avalanche energy specified ? mounting information for the so8 package is provided applications ? dcdc converters ? low voltage motor control ? power management in portable and batterypowered products, i.e.: computers, printers, pcmcia cards, cellular & cordless telephones mosfet maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit draintosource voltage v dss 30 v gatetosource voltage continuous v gs 20 v thermal resistance junctiontoambient (note 1.) total power dissipation @ t a = 25 c continuous drain current @ 25 c continuous drain current @ 70 c pulsed drain current (note 4.) r q ja p d i d i d i dm 171 0.73 2.34 1.87 8.0 c/w w a a a thermal resistance junctiontoambient (note 2.) total power dissipation @ t a = 25 c continuous drain current @ 25 c continuous drain current @ 70 c pulsed drain current (note 4.) r q ja p d i d i d i dm 100 1.25 3.05 2.44 12 c/w w a a a thermal resistance junctiontoambient (note 3.) total power dissipation @ t a = 25 c continuous drain current @ 25 c continuous drain current @ 70 c pulsed drain current (note 4.) r q ja p d i d i d i dm 62.5 2.0 3.86 3.1 15 c/w w a a a operating and storage temperature range t j , t stg 55 to +150 c single pulse draintosource avalanche energy starting t j = 25 c (v dd = 30 vdc, v gs = 4.5 vdc, peak i l = 7.5 apk, l = 5 mh, r g = 25 w ) e as 140 mj maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c 1. minimum fr4 or g10 pcb, t = steady state. 2. mounted onto a 2 square fr4 board (1 sq. 2 oz cu 0.06 thick single sided), t = steady state. 3. mounted onto a 2 square fr4 board (1 sq. 2 oz cu 0.06 thick single sided), t 10 seconds. 4. pulse test: pulse width = 300  s, duty cycle = 2%. device package shipping ordering information ntmd3p03r2 so8 2500/tape & reel http://onsemi.com pchannel d s g 2 source1 gate1 source2 gate2 3 4 1 7 6 5 8 drain1 drain1 drain2 drain2 top view pin assignment 3.05 amperes 30 volts 0.085  @ v gs = 10 v this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. so8 case 751 style 11 1 8 ed3p03 lyww ed3p03 = device code l = assembly location y = year ww = work week marking diagram
ntmd3p03r2 http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) * characteristic symbol min typ max unit off characteristics draintosource breakdown voltage (v gs = 0 vdc, i d = 250 m adc) temperature coefficient (positive) v (br)dss 30 30 vdc mv/ c zero gate voltage drain current (v ds = 24 vdc, v gs = 0 vdc, t j = 25 c) (v ds = 24 vdc, v gs = 0 vdc, t j = 125 c) (v ds = 30 vdc, v gs = 0 vdc, t j = 25 c) i dss 1.0 20 2.0 m adc gatebody leakage current (v gs = 20 vdc, v ds = 0 vdc) i gss 100 nadc gatebody leakage current (v gs = +20 vdc, v ds = 0 vdc) i gss 100 nadc on characteristics gate threshold voltage (v ds = v gs , i d = 250 m adc) temperature coefficient (negative) v gs(th) 1.0 1.7 3.6 2.5 vdc static draintosource onstate resistance (v gs = 10 vdc, i d = 3.05 adc) (v gs = 4.5 vdc, i d = 1.5 adc) r ds(on) 0.063 0.090 0.085 0.125 w forward transconductance (v ds = 15 vdc, i d = 3.05 adc) g fs 5.0 mhos dynamic characteristics input capacitance (v 24 vd v 0 vd c iss 520 750 pf output capacitance (v ds = 24 vdc, v gs = 0 vdc, f = 1.0 mhz ) c oss 170 325 reverse transfer capacitance f = 1 . 0 mhz) c rss 70 135 switching characteristics (notes 5. and 6.) turnon delay time t d(on) 12 22 ns rise time (v dd = 24 vdc, i d = 3.05 adc, v gs = 10 vdc t r 16 30 turnoff delay time v gs = 10 vdc, r g = 6.0 w ) t d(off) 45 80 fall time r g 6.0 w ) t f 45 80 turnon delay time t d(on) 16 ns rise time (v dd = 24 vdc, i d = 1.5 adc, v gs = 4 5 vdc t r 42 turnoff delay time v gs = 4.5 vdc, r g = 6.0 w ) t d(off) 32 fall time r g 6.0 w ) t f 35 total gate charge (v ds = 24 vdc, q tot 16 25 nc gatesource charge (v ds = 24 vdc , v gs = 10 vdc, i 3 05 ad ) q gs 2.0 gatedrain charge gs i d = 3.05 adc) q gd 4.5 bodydrain diode ratings (note 5.) diode forward onvoltage (i s = 3.05 adc, v gs = 0 v) (i s = 3.05 adc, v gs = 0 v, t j = 125 c) v sd 0.96 0.78 1.25 vdc reverse recovery time (i 305ad v 0vd t rr 34 ns (i s = 3.05 adc, v gs = 0 vdc, di s /dt = 100 a/ m s ) t a 18 di s /dt = 100 a/ m s) t b 16 reverse recovery stored charge q rr 0.03 m c 5. indicates pulse test: pulse width = 300 m s max, duty cycle = 2%. 6. switching characteristics are independent of operating junction temperature. * handling precautions to protect against electrostatic discharge is mandatory.
ntmd3p03r2 http://onsemi.com 3 typical electrical characteristics 0.25 0.2 0.1 0.15 0.05 1 0.6 1.2 1.6 0 5 2 2 0.5 0.25 v ds , draintosource voltage (volts) i d , drain current (amps) 0 v gs , gatetosource voltage (volts) figure 1. onregion characteristics figure 2. transfer characteristics i d , drain current (amps) 3 0.5 0.4 0.3 7 6 5 0.2 0.1 0 48 figure 3. onresistance vs. gatetosource voltage v gs , gatetosource voltage (volts) figure 4. onresistance vs. gatetosource voltage v gs , gatetosource voltage (volts) r ds(on) , draintosource resistance ( w ) r ds(on) , draintosource resistance ( w ) figure 5. onresistance vs. drain current and gate voltage i d , drain current (amps) figure 6. on resistance variation with temperature t j , junction temperature ( c) r ds(on) , draintosource resistance ( w ) r ds(on) , draintosource resistance (normalized) 13 25 4 14 3 25 50 50 75 25 0 150 25 0.75 1 3 4 v gs = 8 v v gs = 6 v v gs = 4.8 v v gs = 5 v v gs = 4.4 v v gs = 3.6 v v ds > = 10 v t j = 25 c t j = 55 c t j = 100 c v gs = 10 v v gs = 4.5 v 6 i d = 3.05 a v gs = 10 v 6 0.6 0.7 v gs = 4.6 v v gs = 10 v i d = 3.05 a t j = 25 c t j = 25 c 1 1.25 1.5 1.75 5 2 0 1 3 4 6 2 0.5 0.4 0.3 6 5 4 0.2 0.1 0 37 0.6 0.7 1.4 0.8 v gs = 3.2 v v gs = 3 v v gs = 2.6 v i d = 1.5 a t j = 25 c 100 125 v gs = 4 v t j = 25 c v gs = 2.8 v
ntmd3p03r2 http://onsemi.com 4 30 15 0 25 20 10 5 61822 14 26 10 30 i d = 3.05 a t j = 25 c v gs q 2 q 1 q t 1000 100 10 12 6 0 1200 1000 800 600 400 200 0 3 2 0.5 0 1000 100 1 10000 1000 v ds , draintosource voltage (volts) i dss , leakage (na) 100 10 gatetosource or draintosource voltage (volts) figure 7. draintosource leakage current vs. voltage figure 8. capacitance variation c, capacitance (pf) figure 9. gatetosource and draintosource voltage vs. total charge q g , total gate charge (nc) figure 10. resistive switching time variation vs. gate resistance r g , gate resistance ( w ) t, time (ns) v gs , gatetosource voltage (volts) figure 11. resistive switching time variation vs. gate resistance r g , gate resistance ( w ) figure 12. diode forward voltage vs. current v sd , draintosource voltage (volts) t, time (ns) i s , source current (amps) 0 8 16 1 100 1 100 10 0.2 1 1.2 0.8 0.6 0.4 v gs = 0 v t j = 125 c c rss c iss c oss c rss 10 10 c iss v ds = 24 v i d = 3.05 a v gs = 10 v t r t d(off) t d(on) t f 1 1.5 2.5 10 8 4 2 246 101214 t j = 150 c t j = 25 c v ds = 24 v i d = 1.5 a v gs = 4.5 v t r t d(off) t d(on) t f v gs = 0 v t j = 25 c 10 15 20 10 5 530 025 v ds v ds = 0 v v gs = 0 v v gs v ds
ntmd3p03r2 http://onsemi.com 5 r thja(t) , effective transient thermal response figure 13. maximum rated forward biased safe operating area di/dt t rr t a t p i s 0.25 i s time i s t b figure 14. diode reverse recovery waveform 100 1.0 0.01 figure 15. fet thermal response v ds , draintosource voltage (volts) 1 100 10 i d , drain current (amps) r ds(on) limit thermal limit package limit v gs = 12 v single pulse t c = 25 c 10 ms dc 1.0 ms 1.0 0.1 10 1.0 0.1 0.01 1e03 1e02 1e01 1e+00 1e+01 1e+02 1e+03 d = 0.5 0.2 0.1 0.05 0.02 0.01 single pulse 0.0014 f 0.0073 f 0.022 f 0.105 f 0.484 f ambient chip junction 2.32 w 18.5 w 50.9 w 37.1 w 56.8 w normalized to r q ja at steady state (1 pad) 3.68 f 24.4 w t, time (s)
ntmd3p03r2 http://onsemi.com 6 information for using the so8 surface mount package minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will selfalign when subjected to a solder reflow process. mm inches 0.060 1.52 0.275 7.0 0.024 0.6 0.050 1.270 0.155 4.0 soldering precautions the melting temperature of solder is higher than the rated temperature of the device. when the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. ? always preheat the device. ? the delta temperature between the preheat and soldering should be 100 c or less.* ? when preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. when using infrared heating with the reflow soldering method, the difference shall be a maximum of 10 c. ? the soldering temperature and time shall not exceed 260 c for more than 10 seconds. ? when shifting from preheating to soldering, the maximum temperature gradient shall be 5 c or less. ? after soldering has been completed, the device should be allowed to cool naturally for at least three minutes. gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. ? mechanical stress or shock should not be applied during cooling. * soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
ntmd3p03r2 http://onsemi.com 7 typical solder heating profile for any given circuit board, there will be a group of control settings that will give the desired heat pattern. the operator must set temperatures for several heating zones and a figure for belt speed. taken together, these control settings make up a heating aprofileo for that particular circuit board. on machines controlled by a computer, the computer remembers these profiles from one operating session to the next. figure 16 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. this profile will vary among soldering systems, but it is a good starting point. factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. this profile shows temperature versus time. the line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. the two profiles are based on a high density and a low density board. the vitronics smd310 convection/infrared reflow soldering system was used to generate this profile. the type of solder used was 62/36/2 tin lead silver with a melting point between 177189 c. when this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. the components on the board are then heated by conduction. the circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. step 1 preheat zone 1 arampo step 2 vent asoako step 3 heating zones 2 & 5 arampo step 4 heating zones 3 & 6 asoako step 5 heating zones 4 & 7 aspikeo step 6 vent step 7 cooling 200 c 150 c 100 c 5 c time (3 to 7 minutes total) t max solder is liquid for 40 to 80 seconds (depending on mass of assembly) 205 to 219 c peak at solder joint desired curve for low mass assemblies desired curve for high mass assemblies 100 c 150 c 160 c 170 c 140 c figure 16. typical solder heating profile
ntmd3p03r2 http://onsemi.com 8 package dimensions style 11: pin 1. source 1 2. gate 1 3. source 2 4. gate 2 5. drain 2 6. drain 2 7. drain 1 8. drain 1 seating plane 1 4 5 8 n j x 45  k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m  so8 case 75107 issue w
ntmd3p03r2 http://onsemi.com 9 notes
ntmd3p03r2 http://onsemi.com 10 notes
ntmd3p03r2 http://onsemi.com 11 notes
ntmd3p03r2 http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. ntmd3p03r2/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland


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