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integrated circuit systems, inc. 840004ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 1 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary g eneral d escription the ics840004-01 is a 4 output lvcmos/lvttl synthesizer optimized to generate ethernet reference clock frequencies and is a member of the hiperclocks tm family of high performance clock solutions from ics. using a 25mhz, 18pf parallel resonant crystal, the following frequencies can be generated based on the 2 frequency select pins (f_sel1:0): 156.25mhz, 125mhz, and 62.5mhz. the ics840004-01 uses ics? 3 rd generation low phase noise vco technology and can achieve 1ps or lower typical random rms phase jitter, easily meeting ethernet jitter requirements. the ics840004-01 is packaged in a small 20-pin tssop package. hiperclocks? ic s b lock d iagram f eatures ? four lvcmos/lvttl outputs, 15 typical output impedance ? selectable crystal oscillator interface or lvcmos/lvttl single-ended input ? output frequency range: 56mhz - 175mhz ? vco range: 560mhz - 700mhz ? rms phase jitter at 156.25mhz (1.875mhz - 20mhz): 0.52ps (typical) design target phase noise: offset noise p o w er 100hz ............... -94.9 dbc/hz 1khz ............. -119.6 dbc/hz 10khz ............. -128.9 dbc/hz 100khz ............. -129.2 dbc/hz ? full 3.3v or 3.3v core/2.5v output supply mode ? 0c to 70c ambient operating temperature ? available in both standard and lead-free rohs-compliant packages q0 q1 q2 q3 oe f_sel1:0 npll_sel nxtal_sel xtal_in xtal_out test_clk mr osc phase detector vco m = 25 (fixed) f_sel1:0 0 0 4 0 1 5 1 0 10 1 1 5 0 1 1 0 2 n 25mhz pullup pulldown pulldown pulldown pullup:pullup pulldown f requency s elect f unction t able for e thernet f requencies p in a ssignment ics840004-01 20-lead tssop 6.5mm x 4.4mm x 0.92mm package body g package top view f_sel0 nc nxtal_sel test_clk oe mr npll_sel v dda nc v dd 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 f_sel1 gnd q0 q1 v ddo q2 q3 gnd xtal_in xtal_out the preliminary information presented herein represents a product in prototyping or pre-production. the noted characteristics a re based on initial product characterization. integrated circuit systems, incorporated (ics) reserves the right to change any circuitry or specifications without notice. s t u p n i y c n e u q e r f t u p t u o ) . f e r z h m 5 2 ( 1 l e s _ f0 l e s _ f r e d i v i d m e u l a v r e d i v i d n e u l a v n / m e u l a v o i t a r 00 5 24 5 2 . 65 2 . 6 5 1 01 5 25 5 5 2 1 10 5 20 15 . 25 . 2 6 11 5 25 5 5 2 1
integrated circuit systems, inc. 8400042ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 2 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p c d p e c n a t i c a p a c n o i t a p i s s i d r e w o p v d d v , a d d v , o d d v 5 6 4 . 3 =d b tf p v d d v , a d d v , v 5 6 4 . 3 = o d d v 5 2 6 . 2 =d b tf p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k r n w o d l l u p r o t s i s e r n w o d l l u p t u p n i 1 5k r t u o e c n a d e p m i t u p t u o 5 1 r e b m u ne m a ne p y tn o i t p i r c s e d 10 l e s _ ft u p n ip u l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . n i p t c e l e s y c n e u q e r f 9 , 2c nd e s u n u. t c e n n o c o n 3l e s _ l a t x nt u p n in w o d l l u p e c n e r e f e r l l p e h t s a s t u p n i k l c _ t s e t r o l a t s y r c e h t n e e w t e b s t c e l e s . s t u p n i l a t x s t c e l e s , w o l n e h w . k l c _ t s e t s t c e l e s , h g i h n e h w . e c r u o s . s l e v e l e c a f r e t n i l t t v l / s o m c v l 4k l c _ t s e tt u p n in w o d l l u p. t u p n i k c o l c l t t v l / s o m c v l d e d n e - e l g n i s 5e ot u p n ip u l l u p e h t , w o l n e h w . e v i t c a e r a s t u p t u o e h t , h g i h n e h w . n i p e l b a n e t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . e t a t s e c n a d e p m i h g i h a n i e r a s t u p t u o 6r mt u p n in w o d l l u p e r a s r e d i v i d l a n r e t n i e h t , h g i h c i g o l n e h w . t e s e r r e t s a m h g i h e v i t c a s r e d i v i d l a n r e t n i e h t , w o l c i g o l n e h w . w o l o g o t s t u p u t o e h t g n i s u a c t e s e r , m d e d a o l t c e f f a t o n s e o d r m f o n o i t r e s s a . d e l b a n e e r a s t u p t u o e h t d n a . s l e v e l e c a f r e t n i l t t v l / s o m c v l . s e u l a v t d n a , n 7l e s _ l l p nt u p n in w o d l l u p . t u p t u o o c v e h t m o r f n e v i r d s i t u p t u o e h t , w o l n e h w . s s a p y b l l p e c n e r e f e r = y c n e u q e r f t u p t u o e h t d n a d e s s a p y b s i l l p e h t , h g i h n e h w . s l e v e l e c a f r e t n i l t t v l / s o m c v l . r e d i v i d t u p t u o n / y c n e u q e r f k c o l c 8v a d d r e w o p. n i p y l p p u s g o l a n a 0 1v d d r e w o p. n i p y l p p u s e r o c , 1 1 2 1 , t u o _ l a t x n i _ l a t x t u p n i . t u p n i e h t s i n i _ l a t x . t u p t u o e h t s i t u o _ l a t x . e c a f r e t n i r o t a l l i c s o l a t s y r c 9 1 , 3 1d n gr e w o p. d n u o r g y l p p u s r e w o p 5 1 , 4 1 8 1 , 7 1 , 2 q , 3 q 0 q , 1 q t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . s t u p t u o k c o l c d e d n e - e l g n i s 5 1 . e c n e d e p m i t u p t u o l a c i p y t 6 1v o d d r e w o p. n i p y l p p u s t u p t u o 0 21 l e s _ ft u p n ip u l l u p. s l e v e l e c a f r e t n i l t t v l / s o m c v l . n i p t c e l e s y c n e u q e r f : e t o n p u l l u p d n a n w o d l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t r e f e r
integrated circuit systems, inc. 840004ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 3 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary t able 3a. p ower s upply dc c haracteristics , v ddd = v dda = 3.3v5%, v ddo = 3.3v5% or 2.5v5%, t a = 0c to 70c t able 3b. lvcmos/lvttl dc c haracteristics , v dd = v dda = 3.3v5%, v ddo = 3.3v5% or 2.5v5%, t a = 0c to 70c a bsolute m aximum r atings supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5 v outputs, v o -0.5v to v dd + 0.5v package thermal impedance, ja 73.2c/w (0 lfpm) storage temperature, t stg -65c to 150c note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional operation of product at these conditions or any conditions be- yond those listed in the dc characteristics or ac character- istics is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. t able 4. c rystal c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v v a d d e g a t l o v y l p p u s g o l a n a 5 3 1 . 33 . 35 6 4 . 3v v o d d e g a t l o v y l p p u s t u p t u o 5 3 1 . 33 . 35 6 4 . 3v 5 7 3 . 25 . 25 2 6 . 2v i d d t n e r r u c y l p p u s r e w o p 0 9a m i a d d t n e r r u c y l p p u s g o l a n a 8a m i o d d t n e r r u c y l p p u s t u p t u o 5a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i 2v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i 3 . 0 -8 . 0v i h i t u p n i t n e r r u c h g i h 1 l e s _ f , 0 l e s _ f , e ov d d v = n i v 5 6 4 . 3 =5a , r m , l e s _ l l p n k l c _ t s e t , l e s _ l a t x n v d d v = n i v 5 6 4 . 3 =0 5 1a i l i t u p n i t n e r r u c w o l 1 l e s _ f , 0 l e s _ f , e ov d d v , v 5 6 4 . 3 = n i v 0 =0 5 1 -a , r m , l e s _ l l p n k l c _ t s e t , l e s _ l a t x n v d d v , v 5 6 4 . 3 = n i v 0 =5 -a v h o 1 e t o n ; e g a t l o v h g i h t u p t u o v o d d % 5 v 3 . 3 =6 . 2v v o d d % 5 v 5 . 2 =8 . 1v v l o 1 e t o n ; e g a t l o v w o l t u p t u ov o d d % 5 v 5 . 2 r o v 3 . 3 =5 . 0v 0 5 h t i w d e t a n i m r e t s t u p t u o : 1 e t o n v o t o d d . s t i u c r i c t s e t d a o l t u p t u o , n o i t a m r o f n i t n e m e r u s a e m r e t e m a r a p e e s . 2 / r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 5 2z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 1w m . l a t s y r c t n a n o s e r l e l l a r a p f p 8 1 n a g n i s u d e z i r e t c a r a h c : e t o n
integrated circuit systems, inc. 8400042ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 4 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary t able 5a. ac c haracteristics , v dd = v dda = v ddo = 3.3v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o e g n a r y c n e u q e r f t u p t u o 6 55 7 1z h m t ) o ( k s3 , 1 e t o n ; w e k s t u p t u o d b ts p t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 2 e t o n : e g n a r n o i t a r g e t n i @ z h m 5 2 . 6 5 1 z h m 0 2 - z h m 5 7 8 . 1 2 5 . 0s p : e g n a r n o i t a r g e t n i @ z h m 5 2 1 z h m 0 2 - z h m 5 7 8 . 1 5 6 . 0s p : e g n a r n o i t a r g e t n i @ z h m 5 . 2 6 z h m 0 2 - z h m 5 7 8 . 1 5 5 . 0s p t l e m i t k c o l l l p d b ts m t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 4s p c d oe l c y c y t u d t u p t u o 0 5% . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 1 e t o n v t a d e r u s a e m o d d . 2 / . t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 2 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 3 e t o n t able 5b. ac c haracteristics , v dd = v dda = 3.3v5%, v ddo = 2.5v5%, t a = 0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o e g n a r y c n e u q e r f t u p t u o 6 55 7 1z h m t ) o ( k s3 , 1 e t o n ; w e k s t u p t u o d b ts p t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 2 e t o n : e g n a r n o i t a r g e t n i @ z h m 5 2 . 6 5 1 z h m 0 2 - z h m 5 7 8 . 1 8 4 . 0s p : e g n a r n o i t a r g e t n i @ z h m 5 2 1 z h m 0 2 - z h m 5 7 8 . 1 9 5 . 0s p : e g n a r n o i t a r g e t n i @ z h m 5 . 2 6 z h m 0 2 - z h m 5 7 8 . 1 3 5 . 0s p t l e m i t k c o l l l p d b ts m t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 5 4s p c d oe l c y c y t u d t u p t u o 0 5% . s n o i t i d n o c d a o l l a u q e h t i w d n a s e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 1 e t o n v t a d e r u s a e m o d d . 2 / . t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 2 e t o n . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 3 e t o n
integrated circuit systems, inc. 840004ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 5 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary t ypical p hase n oise at 62.5mh z @3.3v 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 62.5mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.55ps (typical) o ffset f requency (h z ) n oise p ower dbc hz phase noise result by adding 1gb ethernet filter to raw data raw phase noise data 1gb ethernet filter ? ? ? 100 1k 10k 100k 1m 10m 100m t ypical p hase n oise at 62.5mh z @2.5v 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 62.5mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.53ps (typical) o ffset f requency (h z ) n oise p ower dbc hz phase noise result by adding 1gb ethernet filter to raw data raw phase noise data 1gb ethernet filter ? ? ? 100 1k 10k 100k 1m 10m 100m
integrated circuit systems, inc. 8400042ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 6 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary t ypical p hase n oise at 125mh z @3.3v 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 125mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.65ps (typical) o ffset f requency (h z ) n oise p ower dbc hz phase noise result by adding 10gb ethernet filter to raw data raw phase noise data 10gb ethernet filter ? ? ? 100 1k 10k 100k 1m 10m 100m t ypical p hase n oise at 125mh z @2.5v 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 125mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.59ps (typical) o ffset f requency (h z ) n oise p ower dbc hz phase noise result by adding 10gb ethernet filter to raw data raw phase noise data 10gb ethernet filter ? ? ? 100 1k 10k 100k 1m 10m 100m
integrated circuit systems, inc. 840004ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 7 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary t ypical p hase n oise at 156.25mh z @3.3v 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 156.25mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.52ps (typical) o ffset f requency (h z ) n oise p ower dbc hz phase noise result by adding 10gb ethernet filter to raw data raw phase noise data 10gb ethernet filter ? ? ? 100 1k 10k 100k 1m 10m 100m t ypical p hase n oise at 156.25mh z @2.5v 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 156.25mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.48ps (typical) o ffset f requency (h z ) n oise p ower dbc hz phase noise result by adding 10gb ethernet filter to raw data raw phase noise data 10gb ethernet filter ? ? ? 100 1k 10k 100k 1m 10m 100m
integrated circuit systems, inc. 8400042ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 8 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary p arameter m easurement i nformation t period t pw t period odc = v ddo 2 x 100% t pw q0:q3 rms p hase j itter o utput s kew 3.3v c ore /3.3v o utput l oad ac t est c ircuit scope qx lvcmos 1.65v5% -1.65v5% o utput d uty c ycle /p ulse w idth /p eriod clock outputs 20% 80% 80% 20% t r t f v dd , v dda , v ddo gnd phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power t sk(o) v ddo 2 v ddo 2 qx qy o utput r ise /f all t ime scope qx lvcmos 2.05v5% -1.25v5% v dd , v dda gnd 1.25v5% v ddo 3.3v c ore /2.5v o utput l oad ac t est c ircuit
integrated circuit systems, inc. 840004ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 9 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary a pplication i nformation as in any high speed analog circuitry, the power supply pins are vulnerable to random noise. the ics840004-01 provides separate power supplies to isolate any high switching noise from the outputs to the internal pll. v dd , v dda , and v ddo should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. to achieve optimum jitter performance, power supply isolation is required. figure 1 illustrates how a 10 resistor along with a 10f and a .01 f bypass capacitor should be connected to each v dda . p ower s upply f iltering t echniques f igure 1. p ower s upply f iltering 10 v dda 10 f .01 f 3.3v or 2.5v .01 f v dd c rystal i nput i nterface the ics840004-01 has been characterized with 18pf parallel resonant crystals. the capacitor values shown in figure 2 below were determined using a 25mhz 18pf figure 2. c rystal i npu t i nterface parallel resonant crystal and were chosen to minimize the ppm error. ics84332 xtal _i n xtal _ou t x1 18pf parallel cry stal c2 22p c1 22p ics840004-01
integrated circuit systems, inc. 8400042ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 10 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary 3.3v r3 36 ru1 1k zo = 50 ohm c3 10uf rd1 not install logic control input examples r4 36 r2 10 c6 0.1u c4 0.01u to logic input pins xta l _i n rd2 1k vdda set logic input to '1' lvcmos ru2 not install 3.3v 3.3v c5 0.1u c2 22pf set logic input to '0' 3.3v zo = 50 ohm lvcmos 3.3v to logic input pins u1 ics840004-01 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 20 19 18 17 f_sel0 nc nxtal_sel test_c lk oe mr npll_sel vdda nc vdd xtal_out xtal_in gnd q3 q2 vddo f_sel1 gnd q0 q1 xta l _o u t x1 c1 22pf l ayout g uideline figure 3 shows a schematic example of the ics840004-01. an example of lvcmos termination is shown in this schematic. additional lvcmos termination approaches are shown in the lvcmos termination application note. in this example, an 18pf parallel resonant 25mhz crystal is used. the c1=22pf and f igure 3. ics840004-01 s chematic e xample c2=22pf are recommended for frequency accuracy. for dif- ferent board layout, the c1 and c2 may be slightly adjusted for optimizing frequency accuracy. 1k pullup or pulldown resistors can be used for the logic control input pins. i nputs : c rystal i nput : for applications not requiring the use of the crystal oscillator input, both xtal_in and xtal_out can be left floating. though not required, but for additional protection, a 1k resistor can be tied from xtal_in to ground. test_clk i nput : for applications not requiring the use of the test clock, it can be left floating. though not required, but for additional protection, a 1k resistor can be tied from the test_clk to ground. lvcmos c ontrol p ins : all control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. r ecommendations for u nused i nput and o utput p ins o utputs : lvcmos o utput : all unused lvcmos output can be left floating. we recommend that there is no trace attached.
integrated circuit systems, inc. 840004ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 11 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary r eliability i nformation t ransistor c ount the transistor count for ics840004-01 is: 3085 t able 6. ja vs . a ir f low t able for 20 l ead tssop ja by velocity (linear feet per minute) 0 200 500 single-layer pcb, jedec standard test boards 114.5c/w 98.0c/w 88.0c/w multi-layer pcb, jedec standard test boards 73.2c/w 66.6c/w 63.5c/w note: most modern pcb designs use multi-layered boards. the data in the second row pertains to most designs.
integrated circuit systems, inc. 8400042ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 12 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary p ackage o utline - g s uffix for 20 l ead tssop t able 7. p ackage d imensions l o b m y s s r e t e m i l l i m n i mx a m n0 2 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 4 . 60 6 . 6 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0 reference document: jedec publication 95, mo-153
integrated circuit systems, inc. 840004ag-01 www.icst.com/products/hiperclocks.html rev. b january 3, 2006 13 ics840004-01 f emto c locks ? c rystal - to - lvcmos/lvttl f requency s ynthesizer preliminary t able 8. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extr aordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without noti ce. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. the aforementioned trademarks, hiperclocks and f emto c locks are trademarks of integrated circuit systems, inc. or its subsidiaries in the united states and/or other countries. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t 1 0 - g a 4 0 0 0 4 8 s c i1 0 a 4 0 0 0 4 8 s c ip o s s t d a e l 0 2e b u tc 0 7 o t c 0 t 1 0 - g a 4 0 0 0 4 8 s c i1 0 a 4 0 0 0 4 8 s c ip o s s t d a e l 0 2l e e r & e p a tc 0 7 o t c 0 f l 1 0 - g a 4 0 0 0 4 8 s c il 1 0 a 4 0 0 0 4 s c ip o s s t " e e r f - d a e l " d a e l 0 2e b u tc 0 7 o t c 0 t f l 1 0 - g a 4 0 0 0 4 8 s c il 1 0 a 4 0 0 0 4 s c ip o s s t " e e r f - d a e l " d a e l 0 2l e e r & e p a tc 0 7 o t c 0 . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s f l n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n

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