?1 cxk5b81020j/tm -12 e93707b58-pp 131072-word 8-bit high speed bi-cmos static ram description cxk5b81020j/tm is a high speed 1m bit bi-cmos static ram organized as 131072 words by 8 bits. operating on a single 3.3v supply this asynchronous ic is suitable for use in high speed and low power applications. features single 3.3v power supply: 3.3v 0.3v fast access time 12ns (max.) low standby current: 10ma (max.) low power operation 864mw (max.) package line-up dual vcc/vss cxk5b81020j 400mil 32pin soj package cxk5b81020tm 400mil 32pin tsop package function 131072 word 8-bit static ram structure silicon gate bi-cmos ic sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. buffer a12 buffer row decoder memory matrix 256 4096 i/o buffer i/o1 i/o8 vcc gnd a15 a16 a9 a8 a13 a14 a11 a10 we oe ce 1 a3 2 a2 3 a1 4 5 6 i/o1 7 vcc 8 gnd 9 i/o3 1 0 we 11 12 13 a15 14 a14 15 a13 16 a4 32 a5 31 a6 30 a7 29 28 27 i/o7 26 gnd 25 vcc 24 i/o6 23 a9 22 a10 2 1 a11 20 19 18 a12 17 i/o gate column decoder a0 ce oe a7 a5 a4 a3 a0 a2 a1 a6 i/o2 i/o4 a16 i/o8 a8 i/o5 block diagram pin configuration (top view) pin description address input data input chip enable input write enable input output enable input +3.3v power supply ground no connection a0 to a16 i/o1 to i/o8 ce we oe v cc gnd nc symbol description cxk5b81020tm 32 pin tsop (piastic) cxk5b81020j 32 pin soj (piastic)
?2 cxk5b81020j/tm absolute maximum ratings (ta = 25?, gnd = 0v) * 1 vcc, v in , v i/o = ?.0v min. for pulse width less than 5ns. * 2 air flow 3 1m/s. truth table : "h" or "l" recommended operating conditions (ta = 0 to +70?, gnd = 0v) * v il = ?.0v min. for pulse width less than 5ns. v cc v in v i/o p d topr tstg tsolder ?.5 * 1 to +4.6 ?.5 * 1 to v cc + 0.5 ?.5 * 1 to v cc + 0.5 1.5 * 2 0 to +70 ?5 to +150 260 ?10 235 ?10 v v v w ? ? ? ?sec ? ?sec item symbol rating unit h l l l l h h l h not selected read write output disable high z data out data in high z i sb1 , i sb2 i cc i cc i cc ce oe we mode i/o1 to i/o8 current supply voltage input high voltage input low voltage item symbol min. typ. max. unit v cc v ih v il 3.0 2.0 ?.3 * 3.3 3.6 v cc + 0.3 0.8 v v v supply voltage input voltage input and output voltage allowable power dissipaiton operating temperature storage temperature soldering temperature ?time j tm
?3 cxk5b81020j/tm i/o zo = 50 w r l = 50 w v l = 1.4v i/o 3.3v 1179 w 868 w 5pf * 2 output load (1) output load (2) * 1 * 1. t lz , t olz , t hz , t ohz , t ow , t whz * 2. including scope and jig capacitances fig. 1 electrical characteristics dc characteristics (vcc = 3.3v 0.3v, gnd = 0v, ta = 0 to +70?) * vcc = 3.3v, ta = 25? i/o capacitance (ta = 25?, f = 1mhz) note) this parameter is sampled and is not 100% tested. ac characteristics ac test condition (vcc = 3.3v 0.3v, ta = 0 to +75?) input leakage current output leakage current average operating current standby current output high voltage output low voltage i li i lo i cc i sb1 i sb2 v oh v ol v in = gnd to v cc ce = v ih or oe = v ih or we = v il v i/o = gnd to v cc cycle: min. duty = 100% i out = 0ma ce = v il v in = v ih or v il ce 3 v cc ?0.2v v in 3 v cc ?0.2v or v in 0.2v cycle: min. duty = 100% ce = v ih v in = v ih or v il i oh = ?.0ma i ol = 2.0ma ?0 ?0 2.4 item symbol conditions min. typ. * max unit input capacitance i/o capacitance item symbol conditions min. typ. max unit c in c i/o 5 7 pf pf v in = 0v v i/o = 0v input pulse high level input pulse low level input rise time input fall time input and output reference level output load conditions v ih = 3.0v v il = 0.0v t r = 2ns t f = 2ns 1.4v fig. 1 item condition +10 +10 240 10 100 0.4 ? ? ma ma ma v v
?4 cxk5b81020j/tm read cycle * transition is measured 200mv from steady voltage with specified loading in fig. 1 1-(2). this parameter is sampled and is not 100% tested. write cycle * transition is measured 200mv from steady voltage with specified loading in fig. 1 1-(2). this parameter is sampled and is not 100% tested. t rc t aa t co t oe t oh t lz t olz * t hz * t ohz * 12 3 3 0 0 0 12 12 6 6 6 ns ns ns ns ns ns ns ns ns read cycle time address access time chip enable access time output enable to output valid output data hold time chip enable to output in low z (ce) output enable to output in low z (oe) chip disable to output in high z (ce) output disable to output in high z (oe) item symbol unit -12 min. max. t wc t aw t cw t dw t dh t wp t as t wr t ow * t whz * 12 10 10 8 0 10 0 0 4 0 6 ns ns ns ns ns ns ns ns ns ns write cycle time address valid to end of write chip enable to end of write data valid to end of write data hold from end of write write pulse width address set up time write recovery time output active from lend of write write to output in high z item symbol unit -12 min. max.
?5 cxk5b81020j/tm timing waveform address t aa ? read cycle (1) : oe=v il , we=v ih t rc t oh data out previous data valid data valid address t aa t rc t co t lz t hz t ohz t o e t olz ce oe data out high impedance data valid ? read cycle (2) : we=v ih
?6 cxk5b81020j/tm ? write cycle (1) : we control address t as t wp t dh t whz t dw ce we data out high impedance data valid t ow data in t a w t wc t cw t wr ? write cycle (2) : ce control address t as t d w ce we data out high impedance data valid data in t a w t wc t wr t d h t whz t lz t wp t cw * do not apply the data input voltage of the opposite phase to the output while i/o pin is in output condition.
?7 cxk5b81020j/tm example of representative characteristics t co supply current vs. frequency 75 100 25 50 1.0 0.75 0.5 0.25 0 i cc ?supply current [normalized] supply current vs. supply voltage v cc ?supply voltage [v] 3.45 3.6 3.15 3.3 3.0 1.4 1.2 1.0 0.8 0.6 i cc ?supply current [normalized] supply current vs. ambient temperature ta ?ambient temperature [?] 60 80 20 40 0 1.4 1.2 1.0 0.8 0.6 i cc ?supply current [normalized] access time vs. load capacitance c l ?load capacitance [pf] 120 160 40 80 0 1.8 1.6 1.4 1.2 1.0 t aa , t co , t oe ?access time [normalized] ta = 25? v cc = 3.3v frequency (1/t rc , 1/t wc ) [mhz] 0 ta ?ambient temperature [?] 60 80 20 40 0 1.4 1.2 1.0 0.8 0.6 access time vs. supply voltage v cc ?supply voltage [v] 3.45 3.6 3.15 3.3 3.0 1.4 1.2 1.0 0.8 0.6 t aa , t co , t oe ?access time [normalized] t aa , t co , t oe ?access time [normalized] access time vs. load capacitance 12ns t oe t co , t aa ta = 25? v cc = 3.3v ta = 25? t aa t co t oe v cc = 3.3v t aa t co , t oe t oe t aa , t co t aa t oe
?8 cxk5b81020j/tm input voltage level vs. supply voltage v il , v ih ?input voltage [normalized] standby current vs. supply voltage v cc ?supply voltage [v] 3.45 3.6 3.15 3.3 3.0 1.4 1.2 1.0 0.8 0.6 i sb1 , i sb2 ?standby current [normalized] standby current vs. ambient temperature ta ?ambient temperature [?] 60 80 20 40 0 1.4 1.2 1.0 0.8 0.6 i sb1 ?standby current [normalized] standby current vs. ambient temperature ta ?ambient temperature [?] 60 80 20 40 0 1.4 1.2 1.0 0.8 0.6 i sb2 ?standby current [normalized] v cc ?supply voltage [v] 3.45 3.6 3.15 3.3 3.0 1.2 1.1 1.0 0.9 0.8 v ol ?output low voltage [v] 0.6 0.8 0.2 0.4 0 1.8 1.4 1.0 0.6 0.2 output high current vs. output high voltage v oh ?output high voltage [v] 3.0 4.0 1.0 2.0 0.0 4.0 3.0 2.0 1.0 0.0 i oh ?output high current [normalized] i ol ?output low current [normalized] output low current vs. output low voltage ta = 25? i sb2 i sb1 ta = 25? v ih v il v cc = 3.3v v cc = 3.3v v cc = 3.3v v cc = 3.3v
?9 cxk5b81020j/tm package outline unit: mm cxk5b81020j cxk5b81020tm sony code eiaj code jedec code m package structure package material lead treatment lead material package weight epoxy resin solder plating 42 / copper alloy 20.96 ?0.12 + 0.4 0.73 0.08 1.27 10.16 ?0.12 + 0.3 11.05 0.12 r0.254 116 17 32 0.43 0.1 0.95 0.635 min 3.5 0.25 2.2 ?0.11 + 0.2 9.33 0.18 0.2 ?0.05 + 0.1 f 0.178 soj-32p-01 * soj032-p-0400-a 1.3g 32pin soj (plastic) 400mil 0.1 sony code eiaj code jedec code package structure package material lead treatment lead material package weight 42 alloy solder plating epoxy / phenol resin 32pin tsop ( ii ) (plastic) 400mil * 20.95 0.1 32 17 1 1.27 0.4 0.1 * 10.16 0.1 11.76 0.2 detail a 0?to 10 0.1 0.1 0.5 0.1 1.27 max a 0.127 ?0.02 + 0.05 tsop ( ii ) -32p-l01 tsop ( ii ) 032-p-0400-a 16 0.21 m 0.1 note: dimension * ?does not include mold protrusion.
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