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revisions ltr description date ( yr -mo -da ) approved a changes in accordance with nor 5962-r003-98. 97-10-31 monica l. poelking b changes in accordance with nor 5962-r042-98. 98-02-26 monica l. poelking b add radiation features in section 1.4. in table ia: change test conditions of v in for i il and i li tests; add i il and i li tests for xtal1 input; add footnote 7 / to t chcx , t clcx , t clch , and t chcl ; change footnote 6 /. add pin connections for case outline y in figure 5. editorial changes throughout. - tvn 99-07-26 monica l. poelking d update the boilerplate in accordance with the requirements of mil -prf -38535. ? tvn 01-04-11 thomas m. hess rev sheet rev c c c c d c c d c c c d c c c sheet 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 rev d c d c d c c c c c c c c c rev status of sheets sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 14 pmic n/a prepared by thomas m. hess checked by thomas m. hess defense supply center columbus columbus, ohio 43216 http://www.dscc.dla.mil approved by monica l. poelking drawing approval date 95-12-13 microcircuit, digital, radiation hardened, 8 -bit microcontroller, monolithic silicon size a cage code 67268 5962 -95638 standard microcircuit drawing this drawing is available for use by all departments and agencies of the department of defense amsc n/a revision level d sheet 1 of 29 dscc form 2233 apr 97 5962 -e 367-01 distribution statement a . approved for public release; distribution is unlimited.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 2 dscc form 2 234 apr 97 1. scope 1.1 scope . this drawing documents two product assurance class levels consisting of high reliability (device classes q and m) and space application (device class v). a choice of case outlines and lead finishes are available and are reflected in the part or identifying number (pin). when available, a choice of radiation hardness assurance (rha) levels are reflected in the pin. 1.2 pin . the pin is as shown in the following example: 5962 h 95638 01 q q x federal rha device device case lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) \ / (see 1.2.3) \/ drawing number 1.2.1 rha designator . device classes q and v rha marked devices meet the mil-prf-38535 specified rha levels and are marked with the appropriate rha designator. device class m rha marked devices meet the mil-prf-38535, appendix a specified rha levels and are marked with the appropriate rha designator. a dash ( -) indicates a non -rha device. 1.2.2 device type(s) . the device type(s) identify the circuit function as follows: device type generic number circuit function 01 69rh051 radiation hardened 8-bit microcontroller 1.2.3 device class designator . the device class designator is a single letter identifying the product assurance level as follows: device class device requirements documentation m vendor self -certification to the requirements for mil-std-883 compliant, non -ja n class level b microcircuits in accordance with mil-prf-38535, appendix a q or v certification and qualification to mil-prf-38535 1.2.4 case outline(s) . the case outline(s) are as designated in mil-std-1835 and as follows: outline letter descriptive designator terminals package style q gdip1-t40 or cdip2-t40 40 dual-in-line package y see figure 1 44 quad flatpack 1.2.5 lead finish . the lead finish is as specified in mil-prf-38535 for device classes q and v or mil-prf-38535, appendix a for device class m.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level d sheet 3 dscc form 2234 apr 97 1.3 absolute maximum ratings . 1 / input voltage, v dd to v ss ................................ ................................ ................ -0.5 v dc to +7.0 v dc voltage on any pin to v ss ................................ ................................ ............... -0.5 v dc to v cc + 0.3 v dc i ol per output pin ................................ ................................ ............................. 15 ma maximum power dissipation (p d ) ................................ ................................ ..... 750 mw storage temperature range (t stg ) ................................ ................................ .... -6 5 c to +150 c lead temperature (soldering, 10 seconds) ................................ ....................... +300 c thermal resistance, junction-to-case ( q jc ) ................................ ....................... see mil -std -1835 maximum junction temperature (t j ) ................................ ................................ . 175 c 1.4 recommended operating conditions . supply voltage range (v dd ) ................................ ................................ .............. +4.5 v dc to +5.5 v dc case operating temperature range (t c ) ................................ ........................... -55 c to +125 c radiation features: total dose (50 rads(si)/s dose rate 300 rads(si)/s) .............................. 3 1 x 10 6 rads(si) single event phenomenon (sep) effective let, no upsets ................................ ................................ ..................... 14 mev/(mg/cm 2 ) let, no latchup ................................ ................................ .................... 126 mev/(mg/cm 2 ) dose rate upset (20 ns pulse) ................................ ................................ .... 2 / dose rate latchup ................................ ................................ ...................... 2 / dose rate survivability ................................ ................................ ............... 2 / neutron irradiated ................................ ................................ ...................... 2 / 1.5 digital logic testing for device classes q and v . fault coverage measurement of manufacturing logic tests (mil -std -883, te st method 5012) ................................ ................ 94.92 percent 2. applicable documents 2.1 government specification, standards, and handbooks . the following specification, standards, and handbooks form a part of this drawing to the extent specified herein. unless otherwise specified, the issues of these documents are those listed in the issue of the department of defense index of specifications and standards (dodiss) and supplement thereto, cited in the solicitation. specification department of defense mil-prf-38535 - integrated c ircuits, manufacturing, general specification for. standards department of defense mil -std -883 - test methods and procedures for microelectronics. mil-std-1835 - interface standard electronic component case outlines. 1 / stress es above the absolute maximum rating may cause permanent damage to the device. extended operation at the maximum levels may degrade performance and affect reliability. 2 / when characterized as a result of the procuring activities request, the condition will be specified.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 4 dscc form 2234 apr 97 handbooks department of defense mil-hdbk-103 - list of standard microcircuit drawings (smd's). mil -hdbk -780 - standard microcircuit drawings. (unless otherwise indicated, copies of the specification, standards, and handbooks are available from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111-5094.) 2.2 non -government publications . the following document(s) form a part of this document to the extent specified herein. unless otherwise specified, the issues of the documents which are dod adopted are those listed in the issue of the dodiss cited in the solicitation. unless otherwise specified, the issues of documents not listed in the dodiss are the issues of the documents cited in the solicitation. american society for testing and materials (astm) astm standard f1192 -88 - standard guide for the measurement of single event phenomena from heavy ion irradiation of semiconductor devices. (applications for copies of astm publications should be addressed to the american society for testing and materials, 1916 race street, philadelphia, pa 19103.) electronics industries association (eia) jedec standard no. 17 - a standardized test procedure for the characterization of lat ch -up in cmos integrated circuits. (applications for copies should be addressed to the electronics industries association, 2001 pennsylvania street, n.w., washington, dc 20006.) (non-government standards and other publications are normally available fro m the organizations that prepare or distribute the documents. these documents may also be available in or through libraries or other informational sevices.) 2.3 order of precedence . in the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. requirements 3.1 item requirements . the individual item requirements for device classes q and v shall be in accordance with mil-prf-38535 and as specified herein or as modified in the device manufacturer's quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. the individual item requirements for device class m shall be in accordance with mil-prf-38535, appendix a for non-jan class level b devices and as specified herein. 3.1.1 microcircuit die . for the requirements for microcircuit die, see appendix a to this document. 3.2 design, construction, and physical dimensions . the design, construction, and physical dimensions shall be as specified in mil-prf-38535 and herein for device classes q and v or mil-prf-38535, appendix a and herein for device class m. 3.2.1 case outlines . the case outlines shall be in accordance with 1.2.4 and figure 1 herein. 3.2.2 terminal connections . the terminal connections shall be as specified on figure 2. 3.2.3 block diagram . the block diagram shall be as specified on figure 3.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level d sheet 5 dscc form 2234 apr 97 3.2.4 test circuit and switching waveforms . the test circuit and switching waveforms shall be as specified on figures 4. 3.2.5 radiation exposure connections . the radiation exposure connecttions shall be as specified on figure 5. 3.3 electrical performance characteristics and postirradiation parameter limits . unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table ia and shall apply over the full case operating temperature range. 3.4 electrical test requirements . the electrical test requirements shall be the subgroups specified in table ii. the electrical tests for each subgroup are defined in table ia. 3.5 marking . the part shall be marked with the pin listed in 1.2 herein. in addition, the manufacturer's pin may also be marked as listed in mil-hdbk-103. for packages where marking of the entire smd pin number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. for rha product using this option, the rha designator shall still be marked. marking for device classes q and v shall be in accordance with mil-prf-38535. marking for device class m shall be in accordance with mil-prf-38535, appendix a. 3.5.1 certification/compliance mark . the certification mark for device classes q and v shall be a "qml" or "q" as required in mil-prf-38535. the compliance mark for device class m shall be a "c" as required in mil-prf-38535, appendix a. 3.6 certificate of compliance . for device classes q and v, a certificate of compliance shall be required from a qml -38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). for device class m, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in mil-hdbk-103 (see 6.6.2 herein). the certificate of compliance submitted to dscc -va prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes q and v, the requirements of mil -prf -38535 and herein or for device class m, the requirements of mil-prf-38535, appendix a and herein. 3.7 certificate of conformance . a certificate of conformance as required for device classes q and v in mil-prf-38535 or for device class m in mil-prf-38535, appendix a shall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change for device class m . for device class m, notification to dscc -va of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in mil-prf -38535, appendix a . 3.9 verification and review for device class m . for device class m, dscc, dscc's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. offshore documentation shall be made available onshore at the option of the reviewer. 3.10 microcircuit group assignment for device class m . device class m devices covered by this drawing shall be in microcircuit group number 105 (see mil-prf-38535, appendix a). 4. quality assurance provisions 4.1 sampling and inspection . for device classes q and v, sampling and inspection procedures shall be in accordance with mil -prf -38535 or as modified in the device manufacturer's quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. for device class m, sampling and inspection procedures shall be in accordance with mil-prf-38535, appendix a. 4.2 screening . for device classes q and v, screening shall be in accordance with mil-prf-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. for device class m, screening shall be in accordance with method 5004 of mil -std -883, and shall be conducted on all devices prior to quality conformance inspection.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 6 dscc form 2234 apr 97 table ia. electrical performance characteristics . limits test symbol test conditions 1 / -55 c t c +125 c 4.5 v v dd 5.5 v unless otherwise specified device type group a subgroups min max unit low level input voltage, (except ea input) v il1 all 1, 2, 3 0.8 low level input voltage, ea input only v il2 all 1, 2, 3 0.8 high level input voltage (except xtal, rst) v ih1 all 1, 2, 3 2.0 high level intput voltage, xtal, rst v ih2 all 1, 2, 3 3.85 v dd = 4.5 v, i ol = 100 m a 0.3 v dd = 4.5 v, i ol = 1.6 ma 0.45 low level output voltage (ports 1, 2 and 3) 2 / 3 / v ol1 v dd = 4.5 v, i ol = 3.5 ma all 1, 2, 3 1.0 v v dd = 4.5 v, i ol = 200 m a 0.3 v dd = 4.5 v, i ol = 3.2 ma 0.45 low level output voltage (port 0, ale/ prog , psen ) 2 / 3 / v ol2 v dd = 4.5 v, i ol = 7.0 ma all 1, 2, 3 1.0 v dd = 4.5 v, i oh = -10 m a 4.2 v dd = 4.5 v, i oh = -30 m a 3.8 high level output voltage (ports 1, 2, 3, ale/ prog , psen ) 2 / 4 / v oh1 v dd = 4.5 v, i oh = -60 m a all 1, 2, 3 3.0 v dd = 4.5 v, i oh = -200 m a 4.2 v dd = 4.5 v, i oh = -3.2 ma 3.8 high level output voltage (port 0 in external bus mode) v oh2 v dd = 4.5 v, i oh = -7.0 ma all 1, 2, 3 3.0 logic 0 input current (ports 1, 2, and 3) i il1 v dd = 5.5 v v in = 0.0 v all 1, 2, 3 -50 m a logic 0 input current (xtal1) i il2 v dd = 5.5 v v in = 0.0 v all 1, 2, 3 -65 m a input leakage current (port 0) i li1 v dd = 5.5 v v in = 0.0 v or v dd all 1, 2, 3 25 m a input leakage current (xtal1) i li2 v dd = 5.5 v v in = 0.0 v or v dd all 1, 2, 3 65 m a rst pulldown resistor (except ea ) 5 / r rst all 1, 2, 3 10 225 k w f = 16 mhz 95 power supply current 6 / i dd f = 20 mhz all 4, 5, 6 120 ma pin capacitance c io f = 1 mhz, t a = 25 c see 4.4.1c all 4 15 pf functional tests see 4.4.1b all 7, 8 see footnotes at end of table.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 7 dscc form 2234 apr 97 table ia. electrical performance characteristics - continued. limits test symbol test conditions 1 / -55 c t c +125 c 4.5 v v dd 5.5 v unless otherwise specified device type group a subgroups min max unit clock period t clcl all 9, 10, 11 50 oscillator frequency 1/t clcl all 9, 10, 11 20 ale pulse width t lhll all 9, 10, 11 2t clcl -40 address valid to ale low t avll all 9, 10, 11 t clcl -40 address hold after ale low 7 / t llax all 9, 10, 11 t clcl -30 ale low to valid instruction in t tll iv all 9, 10, 11 4t clcl -100 ale low to psen low t llpl all 9, 10, 11 t clcl -30 psen pulse width t plph all 9, 10, 11 3t clcl -45 psen low to valid instruction low t pliv all 9, 10, 11 3t clc l -105 input instruction hold after psen 7 / t pxix all 9, 10, 11 0 input instruction float after psen 7 / t pxiz all 9, 10, 11 t clcl -25 address to valid instruction in t aviv all 9, 10, 11 5t clcl -105 psen low address float 7 / t plaz all 9, 10, 11 10 rd pulse width t rlrh all 9, 10, 11 6t clcl -100 wr pulse width t wlwh all 9, 10, 11 6t clcl -100 rd low to valid data in t rldv all 9, 10, 11 5t clcl -165 data hold after rd 7 / t rhdx all 9, 10, 11 0 data float after rd 7 / t rhdz all 9, 10, 11 2t clcl -60 ale low to valid data in t lldv all 9, 10, 11 8t clcl -150 address to valid data in t avdv all 9, 10, 11 9t clcl -165 ale low to rd or wr low t llwl all 9, 10, 11 3t clcl -50 3t clcl +50 address valid to wr low t avwl v dd = 4.5 v see figure 4 all 9, 10, 11 4t clcl -130 ns see footnotes at end of table.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 8 dscc form 2234 apr 97 table ia. electrical performance characteristics - continued. limits test symbol test conditions 1 / -55 c t c +125 c 4.5 v v dd 5.5 v unless otherwise specified device type group a subgroups min max unit data valid before wr t qvwx all 9, 10, 11 t clcl -33 data hold after wr t whqx all 9, 10, 11 t clcl -33 data valid to wr high t qvwh all 9, 10, 11 7t clcl -150 rd low to address float 7 / t rlaz all 9, 10, 11 0 rd or wr high to ale high t whlh all 9, 10, 11 t clcl -40 t clcl +40 serial port clock period 7 / t xlxl all 9, 10, 11 12t clcl -10 12t clcl +10 output data setup to clock rising edge t qvxh all 9, 10, 11 10t clcl -133 output data hold after clock rising edge t xhqx all 9, 10, 11 2t clcl -70 input data hold after clock rising edge 7 / t xhdx all 9, 10, 11 0 clock rising edge to input data valid t xhdv all 9, 10, 11 10t clcl -133 high time 7 / t chcx all 9, 10, 11 16 low time 7 / t clcx all 9, 10, 11 16 rise time 7 / t clch all 9, 10, 11 20 fall time 7 / t chcl v dd = 4.5 v see figure 4 all 9, 10, 11 20 ns 1 / devices supplied to this dra wing have been characterized through all levels m, d, l, r, f, g and h of irradiation. however, this device is only tested at the 'h' level. pre and post irradiation values are identical unless otherwise specified in table ia. when performing post irradiation electrical measurements for any rha level, t a = +25 c 5 c. all parameters are tested to worst case conditions unless otherwise specified. 2 / under steady state (nontransient) conditions, i ol must be limited extrnally as follows: maximum i o l per port pin: 10 ma maximum i ol per 8-bit port: port 0: 26 ma ports 1,2, and 3: 15 ma maximum total i ol for all output pins: 71 ma if i ol exceeds the test condition, v ol may exceed the related specification. pins are not guaranteed to sink current greater than the listed test conditions. 3 / capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the v ol of ale and ports 1 and 3. the noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1 to 0 transitions during bus operations. in applications where capacitance loading exceeds 100 pf, the noise pulse on the ale may exceed 0.8 v. in these cases, it may be desirable to qualify ale with a schmitt trigger or use an address latch with a schmitt trigger strobe input.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 9 dscc form 2234 apr 97 table ia. electrical performance characteristics - continued. 4 / capacitive loading on ports 0 and 2 cause the v oh on ale and psen to drop below the v dd - 0.3 v specification when the address lines are stabilizing. 5 / r rst (typical) = 50 k w . 6 / i dd is measured with all output pins disconnected and only only at points where electrical parameters and read and record in accordance with mil-std-883, method 5004, table i, footnote 7. xtal1 is driven with t clch = t chcl 5 ns, v il = v ss , v ih = v dd measured with ea and rst connected to v dd . 7 / guaranteed but not 100% tested. table ib. sep test limits . 1 / 2 / v dd = 4.5 v device type t a = temperature 10 c 3 / effective let no upsets [mev/(mg/cm 2 )] maximum device cross section ( m m 2) (let = 126) bias for latch -up test v dd = 5.5 v no latch -up let = 3 / all +25 c 14 1.0 x 10 -4 126 1 / for sep test conditions, see 4.4.4.4 here in. 2 / technology characterization and model verfication supplemented by in -line data may be used in lieu of end -of -line testing. test plan must be approved by trb and qualifying activity. 3 / test at worst case temperature t a = +100 c.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 10 dscc form 2234 apr 97 case y figure 1. case outline.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 11 dscc form 2234 apr 97 case y millimeters inches dimension min max min max a 2.794 .110 a1 1.829 2.235 .072 .088 b 0.152 0.254 .006 .010 c 0.102 0.203 .004 .008 d 25.400 27.432 1.000 1.080 d1 20.117 20.523 .792 .808 d2 16.51 bsc .650 bsc e 40.64 1.600 e1 16.84 17.196 .663 .677 l 6.858 .270 e 0.635 bsc .025 bsc note: the us government preferred system of measurement is the metric si system. however, this item was originally designed using inch-pound units of measurement. in the event of conflict between the metric and inch-pound units, the inch-pound units shall take precedence. figure 1. case outline - continued.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 12 dscc form 2234 apr 97 device type all case outline q terminal number terminal symbol terminal number terminal symbol 1 p1.0 (t2) 21 p2.0 (a8) 2 p1.1 (t2ex) 22 p2.1 (a9) 3 p1.2 (eci) 23 p2.2 (a10) 4 p1.3 (cex0) 24 p2.3 (a11) 5 p1.4 (cex1) 25 p2.4 (a12) 6 p1.5 (cex2) 26 p2.5 (a13) 7 p1.6 (cex3) 27 p2.6 (a14) 8 p1.7 (cex4) 28 p2.7 (a15) 9 rst 29 psen 10 p3.0 (rxd) 30 ale 11 p3.1 (txd) 31 ea 12 p3.2 ( int0 ) 32 p0.7 (ad7) 13 p3.3 ( int1 ) 33 p0.6 (ad6) 14 p3.4 (t0) 34 p0.5 (ad5) 15 p3.5 (t1) 35 p0.4 (ad4) 16 p3.6 ( wr ) 36 p0.3 (ad3) 17 p3.7 ( rd ) 37 p0.2 (ad2) 18 xtal2 38 p0.1 (ad1) 19 xtal1 39 p0.0 (ad0) 20 v ss 40 v dd figure 2. terminal connections .
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 13 dscc form 2234 apr 97 device type all case outline y terminal number terminal symbol terminal number terminal symbol 1 v ss 23 v dd 2 p1.0 (t2) 24 nc 3 p1.1 (t2ex) 25 p2.0 (a8) 4 nc 26 p2.1 (a9) 5 p1.2 (eci) 27 p2.2 (a10) 6 p1.3 (cex0) 28 p2.3 (a11) 7 p1.4 (cex1) 29 p2.4 (a12) 8 p1.5 (cex2) 30 p2.5 (a13) 9 p1.6 (cex3) 31 p2.6 (a14) 10 p1.7 (cex4) 32 p2.7 (a15) 11 rst 33 psen 12 p3.0 (rxd) 34 ale 13 p3.1 (txd) 35 ea 14 p3.2 ( int0 ) 36 p0.7 (ad7) 15 p3.3 ( int1 ) 37 p0.6 (ad6) 16 p3.4 (t0) 38 p0.5 (ad5) 17 p3.5 (t1) 39 p0.4 (ad4) 18 p3.6 ( wr ) 40 p0.3 (ad3) 19 p3.7 ( rd ) 41 p0.2 (ad2) 20 xtal2 42 p0.1 (ad1) 21 xtal1 43 p0.0 (ad0) 22 v ss 44 v dd nc = no connection figure 2. terminal connections - cont inued.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 14 dscc form 2234 apr 97 figure 3. block diagram .
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 15 dscc form 2234 apr 97 figure 4. test circuit and timing waveforms .
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 16 dscc form 2234 apr 97 figure 4. test circuit and timing waveforms - continued.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 17 dscc form 2234 apr 97 figure 4. test circuit and timing waveforms - continued.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 18 dscc form 2234 apr 97 case outline open v dd = 5 v 0.5 v ground q 1, 2, 3, 4, 5, 6, 7, 8, 10, 11, 12, 13, 14, 15, 16, 17, 18, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 32, 33, 34, 35, 36, 37, 38, 39, 40 9, 19, 20, 31 y 4, 24 2, 3, 5, 6, 7, 8, 9, 10, 12, 13, 14, 15, 16, 17, 18, 19, 20, 23, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 36, 37, 38, 39, 40, 41, 42, 43, 44 1, 11, 21, 22, 35 note: each pin except 20 and 40 for case outline q and 1, 4, 22, 23, 24, and 44 for case outline y will have a resis tor of 2.49 k w 5% for irradiation testing. figure 5. radiation exposure connections .
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level d sheet 19 dscc form 2234 apr 97 4.2.1 additional criteria for device class m . a. burn -in test, method 1015 of mil -std -883. (1) test condition a, b, c, or d. the test circuit sh all be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) t a = +125 c, minimum. b. interim and final electrical test parameters shall be as specified in table ii herein. 4.2.2 additional criteria for device classes q and v . a. the bur n -in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf-38535. the burn -in test circuit shall be maintained under document revision level control of the device manufacturer's technology review board (trb) in accordance with mil -prf -38535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of mil-std-883. b. interim and final electrical test parameters shall be as specified in table ii herein. c. additional screening for device class v beyond the requirements of device class q shall be as specified in mil -prf -38535, appendix b. 4.3 qualification inspection for device classes q and v . qualification inspection for device classes q and v shall be in accordance with mil-prf-38535. inspections to be performed shall be those specified in mil-prf-38535 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4). 4.4 conformance inspection . technology conformance inspection for classes q and v shall be in accordance with mil-prf-38535 including groups a, b, c, d, and e inspections and as specified. quality conformance inspection for device class m shall be in accordance with mil-prf-38535, appendix a and as specified herein. inspections to be performed for device class m shall be those specified in method 5005 of mil -std -883 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4). 4.4.1 group a inspection . a. tests shall be as specified in table ii herein. b. for device class m, subgroups 7 and 8 tests shall be sufficient to verify the functionality of the device. for device classes q and v, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with mil -std -883, test method 5012 (see 1.5 herein). c. subgroup 4 (c io measurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. a minimum sample of 5 devices with zero failures shall be required. 4.4.2 group c inspection . the group c inspection end -point electrical parameters shall be as specified in table ii herein.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 20 dscc form 2234 apr 97 table ii. electrical test requirements . subgroups (in accordance with mil-std-883, method 5005, table i) subgroups (in accordance with mil-prf-38535, table iii) test requirements device class m device class q device class v interim electrical parameters (see 4.2) 1, 7, 9 1, 7, 9 1, 7, 9 final electrical parameters (see 4.2) 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1 / 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1 / 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 2 / group a test requirements (see 4.4) 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 group c end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 group d end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 group e end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 1 / pda applies to subgroup 1. 2 / pda applies to subgroups 1 and 7. 4.4. 2.1 additional criteria for device class m . steady -state life test conditions, method 1005 of mil -std -883: a. test condition a, b, c, or d. the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil-std-883. b. t a = +125 c, minimum. c. test duration: 1,000 hours, except as permitted by method 1005 of mil -std -883. 4.4.2.2 additional criteria for device classes q and v . the steady -state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf- 38535. the test circuit shall be maintained under document revision level control by the device manufacturer's trb in accordance with mil -prf -38535 and shall be made avai lable to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil -std -883. 4.4.3 group d inspection . the group d inspection end -point electrical parameters shall be as specified in table ii herein. 4.4.4 group e inspection . group e inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). rha levels for device classes m, q and v shall be as specified in mil-prf-38535. end -point electrical parameters shall be as specified in table ii herein. 4.4.4.1 total dose irradiation testing . total dose irradiation testing shall be performed in accordance with mil-std-883 method 1019, condition a and as specified herein (see 1.4).
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 21 dscc form 2234 apr 97 4.4.4.1.1 accelerated aging test . accelerated aging tests shall be performed on all devices requiring a rha level greater than 5k rads(si). the post-anneal end-point electrical parameter limits shall be as specified in table ia herein and shall be the pre-irradiation end-point electrical parameter limit at 25 c 5 c. testing shall be performed at initial qualification and after any design or process changes which may affect the rha response of the device. 4.4.4.2 dose rate induced latchup testing . dose rate induced latchup testing shall be performed in accordance with test method 1020 of mil-std-883 and as specified herein (see 1.4). tests shall be performed on devices, sec, or approved test structures at technology qualification and after any design or process changes which may effect the rha capability of the process. 4.4.4.3 dose rate upset testing . dose rate upset testing shall be performed in accordance with test method 1021 of mil -std -883 and herein (see 1.4). a. transient dose rate upset testing shall be performed at initial qualification and after any design or process changes which may effect the rha performance of the devices. test 10 devices with 0 defects unless otherwise specified. b. transient dose rate upset testing for class q and v devices shall be performed as specified by a trb approved radiation hardness assurance plan and mil -prf -38535. device parametric parameters that influence upset immunity shall be monitored at the wafer level in accordance with the wafer level hardness assurance plan and mil -prf -38535. 4.4.4.4 single event phenomena (sep) . sep testing shall be required on class v devices (see 1.4). sep testing shall be performed on the standard evaluation circuit (sec) or alternate sep test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. test four devices with zero failures. astm standard f1192 may be used as a guideline when performing sep testing. the test conditions for sep are as follows: a. the ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive (i.e. 0 angle 60 ). no shadowing of the ion beam due to fixturing or package related effects is allowed. b. the fluence shall be 3 100 errors or 3 10 6 ions/cm 2 . c. the flux shall be between 10 2 and 10 5 ions/cm 2 /s. the cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. the particle range shall be 3 20 microns in silicon. e. the test temperature shall be +25 c and the maximum rated operating temperature 10 c. f. bias con ditions shall be v dd = 4.5 v dc for the upset measurements and v dd = 5.5 v dc for the latchup measurements. g. for sep test limits, see table ib herein. 5. packaging 5.1 packaging requirements . the requirements for packaging shall be in accordance with mil-prf-38535 for device classes q and v or mil-prf-38535, appendix a for device class m. 6. notes 6.1 intended use . microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 replaceability . microcircuits covered by this drawing will replace the same generic device covered by a contractor -prepared specification or drawing. 6.1.2 substitutability . device class q devices will replace device class m devices.
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level d sheet 22 dscc form 2234 apr 97 6.2 configuration control of smd's . all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this coordination will be accomplished using dd form 1692, engineering change proposal. 6.3 record of users . military and industrial users should inform defense supply center columbus when a system application requires configuration control and which smd's are applicable to that system. dscc will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. users of drawings covering microelectronic devices (fsc 5962) should contact dscc-va, telephone (614) 692-0544. 6.4 comments . comments on this drawing should be directed to dscc-va , columbus, ohio 43216-5000, or telephone (614) 692 -0547 . 6.5 abbreviations, symbols, and definitions . the abbreviations, symbols, and definitions used herein are defined in mil -prf -38535 and mil -hdbk -1331. 6.6 sources of supply . 6.6.1 sources of supply for device classes q and v . sources of supply for device classes q and v are listed in qml -38535. the vendors listed in qml -38535 have submitted a certificate of compliance (see 3.6 herein) to dscc -va and have agreed to this drawing. 6.6.2 approved sources of supply for device class m . approved sources of supply for class m are listed in mil-hdbk-103. the vendors listed in mil-hdbk-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by dscc -va. 6.7 additional information . a copy of the following additional data shall be maintained and available from the device manufacturer: a. rha upset levels. b. test conditions (sep). c. number of upsets (sep). d. number of transients (sep). e. occurrence of latchup (sep).
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 23 dscc form 2234 apr 97 appendix a appendix a forms a part of smd 5962-95638 10. scope 10.1 scope . this appendix establishes minimum requirements for microcircuit die to be supplied under the qualified manufacturers list (qml) program. qml microcircuit die meeting the requirements of mil-prf-38535 and the manufacturers approved qml plan for use in monolithic microcircuits, multi chip modules (mcms), hybrids, electronic modules, or devices using chip and wire designs in accordance with mil-prf-38534 are specified herein. two product assurance classes consisting of military high reliability (device class q) and space application (device class v) are reflected in the part or identification number (pin). when available, a choice of radiation hardness assurance (rha) levels are reflected in the pin. 10.2 pin . the pin is as shown in the following example: 5962 h 95638 01 q 9 x federal rha device device die die stock class designator type class code detail designator (see 10.2.1) (see 10.2.2) designator (see 10.2.4) (see 10.2.5) \ / (see 10.2.3) \/ drawing number 10.2.1 rha designator . device classes q and v rha identified die shall meet the mil-prf-38535 specified rha levels. a dash (-) indicates a non-rha die. 10.2.2 device type(s) . the device type(s) shall identify the circuit function as follows: device type generic number circuit function 01 69rh051 radiation hardened 8-bit microcont roller 10.2.3 device class designator . device class device requirements documentation q or v certification and qualification to the die requirements of mil-prf-38535 10.2.4 die code . the die code designator shall be a number 9 for all devices supplied as die only with no case outline. 10.2.5. die details . the die details designation shall be a unique letter which designates the die?s physical dimensions, bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. 10.2.5.1 die physical dimensions . die type figure number 01 a-1
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 24 dscc form 2234 apr 97 appendix a appendix a forms a part of smd 5962-95638 10.2.5.2 die bonding pad locations and electrical functions . die type figure number 01 a-1 10.2.5.3 interface materials . die type figure number 01 a-1 10.2.5.4 assembly related information . die type figure number 01 a-1 10.3. absolute maximum ratings . see paragraph 1 .3 within the body of this drawing for details. 10.4 recommended operating conditions . see paragraph 1.4 within the body of this drawing for details. 20. applicable documents. 20.1 government specifications, standards, bulletin, and handbooks . unless otherwise specified, the following specifications, standards, bulletin, and handbook of the issue listed in that issue of the department of defense index of specifications and standards specified in the solicitation, form a part of this drawing to the extent specified herein. specification department of defense mil-prf-38535 - integrated circuits, manufacturing, general specification for. standards department of defense mil-std-883 - test methods and procedures for microele ctronics. handbook department of defense mil-hdbk-103 - list of standard microcircuit drawings (smd?s). (copies of the specification, standards, bulletin, and handbook required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity).
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 25 dscc form 2234 apr 97 appendix a appendix a forms a part of smd 5962-95638 20.2. order of precedence . in the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take precedence. 30. requirements 30.1 item requirements . the individual item requirements for device classes q and v shall be in accordance with mil -prf -38535 and as specified herein or as modifie d in the device manufacturer?s quality management (qm) plan. the modification in the qm plan shall not affect the form, fit or function as described herein. 30.2 design, construction and physical dimensions . the design, construction and physical dimensions shall be as specified in mil-prf-38535 and the manufacturer?s qm plan, for device classes q and v and herein. 30.2.1 die physical dimensions . the die physical dimensions shall be as specified in 10.2.5.1 and on figure a-1. 30.2.2 die bonding pad locations and electrical functions . the die bonding pad locations and electrical functions shall be as specified in 10.2.5.2 and on figure a-1. 30.2.3 interface materials . the interface materials for the die shall be as specified in 10.2.5.3 and on figure a-1. 30.2.4 assembly related information . the assembly related information shall be as specified in 10.2.5.4 and figure a-1. 30.3 electrical performance characteristics and post-irradiation parameter limits . unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table ia of the body of this document. 30.4 electrical test requirements . the test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table ia. 30.5 marking . as a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer?s identification and the pin listed in 10.2 herein. the certification mark shall be a ?qml? or ?q? as required by mil-prf-3 8535. 30.6 certification of compliance . for device classes q and v, a certificate of compliance shall be required from a qml -38535 listed manufacturer in order to supply to the requirements of this drawing (see 60.4 herein). the certificate of compliance submitted to dscc-va prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer?s product meets, for device classes q and v, the requirements of mil-prf-38535 and the requirements herein. 30.7 certificate of conformance . a certificate of conformance as required for device classes q and v in mil-prf-38535 shall be provided with each lot of microcircuit die delivered to this drawing. 40. quality assurance provisions 40.1 sampling and inspection . for device classes q and v, die sampling and inspection procedures shall be in accordance with mil-prf-38535 or as modified in the device manufacturer?s quality management (qm) plan. the modifications in the qm plan shall not affect the form, fit or function as described herein. 40.2 screening . for device classes q and v, screening shall be in accordance with mil-prf-38535, and as defined in the manufacturer?s qm plan. as a minimum it shall consist of: a) wafer lot acceptance for class v product using the criteria defined within mil-std-883 test method 5007. b) 100% wafer probe (see paragraph 30.4).
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level d sheet 26 dscc form 2234 apr 97 appendix a appendix a forms a part of smd 5962-95638 c) 100% internal visual inspection to the applicable class q or v criteria defined within mil-std-883 test method 2010 or the alternate procedures allowed within mil-std-883 test method 5004. 40.3 conformance inspection 40.3.1 group e inspection . group e inspection is required only for parts intended to be identified as radiation assured (see 30.5 herein). rha levels for device classes q and v shall be as specified in mil-prf-38535. end point electrical testing of packaged die shall be as specified in table ii herein. 50. die carrier 50.1 die carrier requirements . the requirements for the die carrier shall be accordance with the manufacturer?s qm plan or as specified in the purchase order by the acquiring activity. the die carrier shall provide adequate physical, mechanical, and electrostatic protection. 60. notes 60.1 intended use . microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with mil-prf-38535 or mil-prf-38534 for government microcircuit applications (original equipment), design applications and logistics purposes. 60.2 comments . comments on this appendix should be directed to dscc-va, columbus, ohio, 43216-5000 or telephone (614) 692-0547. 60.3 abbreviations, symbols and definitions . the abbreviations, symbols, and definitions used herein are defined within mil -prf -38535 and mil-std-1331. 60.4 sources of supply for device classes q and v . sources of supply for device classes q and v are listed in qml-38535. the vendors listed within qml-38535 have submitted a certificate of compliance (see 30.6 herein) to dscc-va and have agreed to this drawing. die bonding pad locations and electrical functions die physical dimensions. die size: 370 mils x 506 mils. die thickness: 17.5 1 mils. interface materials. top metallization: si al cu 9 ka-12.5 ka backside metallization: none: backgrind glassivation. type: ps g thickness: 9 ka 2 ka substrate: epi on single crystal silicon substrate potential: tied to v dd special assembly instructions: none
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 27 dscc f orm 2234 apr 97 appendix a appendix a forms a part of smd 5962-95638 die bonding pad locations and electrical functions pad xcenter ycenter pad name 1 -0.0004 0.2462 p1.0 (t2) 2 -0.0164 0.2462 p1.1 (t2ex) 3 -0.0324 0.2462 p1.2 (eci) 4 -0.0484 0.2462 p1.3 (cex0) 5 -0.0644 0.2462 v ss 6 -0.0804 0.2462 v dd 7 -0.0964 0.2462 p1.4 (cex1) 8 -0.1124 0.2462 p1.5 (cex2) 9 -0.1284 0.2462 p1.6 (cex3) 10 -0.1444 0.2462 p1.7 (cex4) 11 -0.1526 0.2462 rst 12 -0.1589 0.2462 p3.0 (rxd) 13 -0.1652 0.2462 v ss 14 -0.1715 0.2462 v dd 15 -0.1715 -0.2462 v dd 16 -0.1652 -0.2462 v ss 17 -0.1589 -0.2462 p3.1 (txd) 18 -0.1526 -0.2462 p3.2 ( int0 ) 19 -0.1444 -0.2462 p3.3 ( int1 ) 20 -0.1284 -0.2462 p3.4 (t0) 21 -0.1124 -0.2462 p3.5 (t1) 22 -0.0964 -0.2462 p3.6 ( wr ) 23 -0.0804 -0.2462 v dd 24 -0.0644 -0.2462 v ss 25 -0.0484 - 0.2462 p3.7 ( rd ) 26 -0.0324 -0.2462 xtal2 27 -0.0164 -0.2462 xtal1 note: the die center is the coordinate origin (0,0). figure a-1
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 28 dscc f orm 2234 apr 97 appendix a appendix a forms a part of smd 5962-95638 die bonding pad locations and electrical functions pad xcenter ycenter pad name 28 -0.0004 -0.2462 p2.0 (a8) 29 0.0155 -0.2462 p2.1 (a9) 30 0.0315 -0.2462 p2.2 (a10) 31 0.0475 -0.2462 p2.3 (a11) 32 0.0635 -0.2462 v ss 33 0.0795 -0.2462 v dd 34 0.0955 -0.2462 p2.4 (a12) 35 0.1115 -0. 2462 p2.5 (a13) 36 0.1275 -0.2462 p2.6 (a14) 37 0.1435 -0.2462 p2.7 (a15) 38 0.1517 -0.2462 psen 39 0.1580 -0.2462 ale 40 0.1643 -0.2462 v ss 41 0.1706 -0.2462 v dd 42 0.1706 0.2462 v dd 43 0.1643 0.2462 v ss 44 0.1580 0.2462 ea 45 0.1517 0.2462 p0.7 (ad7) 46 0.1435 0.2462 p0.6 (ad6) 47 0.1275 0.2462 p0.5 (ad5) 48 0.1115 0.2462 p0.4 (ad4) 49 0.0955 0.2462 p0.3 (ad3) 50 0.0795 0.2462 v dd 51 0.0635 0.2462 v ss 52 0.0475 0.2462 p0.2 (ad2) 53 0.0315 0.2462 p0 .1 (ad1) 54 0.0155 0.2462 p0.0 (ad0) note: the die center is the coordinate origin (0,0). figure a-1
size a 5962-95638 standard microcircuit drawing defense supply center columbus columbus, ohio 43216 -5000 revision level c sheet 29 dscc f orm 2234 apr 97 appendix a appendix a forms a part of smd 5962-95638 notes: 1. all dimensions are in inches and are basic. 2. backside bias is v dd . 3. die thickness is 0.0175 0.001. 4. die backside is lapped. 5. the die center is the coordinate origin (0,0). figure a-1
standard microcircuit drawing bulletin date: 01-04-11 approved sources of supply for smd 5962-95638 are listed below for immediate acquisition information only and shall be added to mil-hdbk-103 and qml -38535 during the next revision. mil-hdbk-103 and qml -38535 will be revised to include the addition or deletion of sources. the vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by dscc -va. this bulletin is superseded by the next dated revision of mil-hdbk-103 and qml -38535. standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962h9563801qqa 65342 ut69rh051pca 5962h9563801qqc 65342 ut69rh051pcc 5962h9563801qya 65342 ut69rh051wca 5962h9563801qyc 65342 ut69rh051wcc 5962h9563801vqa 65342 ut69rh051pca 5962h9563801vqc 65342 ut69rh051pcc 5962h9563801vya 65342 ut69rh051wca 5962h9563801vyc 65342 ut69rh051wcc 5962h9563801q9a 65342 ut69rh051-q die 5962H9563801V9A 65342 ut69rh051-v die 1 / the lead finish shown for each pin representing a hermetic package is the most readily available from the manufacturer listed for that part. if the desired lead finish is not listed, contact the vendor to determine its availability. 2 / caution . do not use this number for item acquisition. items acquired to this number may not satisfy the performance requirements of this drawing. vendor cage vendor name number and address 65342 utmc microelectronics system inc. 4350 centennial boulevard colorado springs, colorado 80907 -3486 the information contained herein is disseminated for convenience only and the government assumes no liability whatsoever for any inaccuracies in the information bulletin.

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