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rev.2.0, sep.18.2003, page 1 of 33 ha16116fp/fpj, ha16121fp/fpj switching regulator for chopper type dc/dc converter rej03f0056-0200z (previous: ade-204-019a) rev.2.0 sep.18.2003 description ha16116fp/fpj and ha16121fp/fpj are dual-channel pwm switching regulator controller ics for use in chopper-type dc/dc converters. this ic series incorporates totem pole gate drive circuits to allow direct driving of a power mos fet. the output logic is preset for booster, step-down, or inverting control in a dc/dc converter. this logic assumes use of an n-channel power mos fet for booster control, and a p-channel power mos fet for step-down or inverting control. ha16116 includes a built-in logic circuit for step-down control only, and one for use in both step-down and inverting control. ha16121 has a logic circuit for booster control only and one for both step-down and inverting control. both ics have a pulse-by-pulse current limiter, which limits pwm pulse width per pulse as a means of protecting against overcurrent, and which uses an on/off timer for intermittent operation. unlike conventional methods that use a latch timer for shutdown, when the pulse-by-pulse current limiter continues operation beyond the time set in the timer, the ic is made to operate intermittently (flickering operation), resulting in sharp vertical setting characteristics. when the overcurrent condition subsides, the output is automatically restored to normal. the dual control circuits in the ic output identical triangle waveforms, for completely synchronous configuring a compact, high efficiency dual-channel dc/dc converter, with fewer external components than were necessary previously. functions ? 2.5 v reference voltage (vref) regulator ? triangle wave form oscillator ? dual overcurrent detector ? dual totem pole output driver ? uvl (under voltage lock out) system ? dual error amplifier ? vref overvoltage detector ? dual pwm comparator
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 2 of 33 features ? wide operating supply voltage range* (3.9 v to 40.0 v) ? wide operating frequency range (600 khz maximum operation) ? direct power mos fet driving (output current 1 a peak in maximum rating) ? pulse-by-pulse overcurrent protection circuit with intermittent operation function (when overcurrent state continues beyond time set in timer, the ic operates intermittently to prevent excessive output current.) ? grounding the on/ off pin turns the ic off, saving power dissipation. (ha16116: i off = 10 a max.; ha16121: i off = 150 a max.) ? built-in uvl circuit (uvl voltage can be varied with external resistance.) ? built-in soft start and quick shutoff functions note: the reference voltage 2.5 v is under the condition of v in 4.5 v. ordering information hitachi control ics for chopper-type dc/dc converters control functions channels product number channel no. step-up step-down inverting output circuits overcurrent protection ch 1 ?? ? dual ha17451 ch 2 ?? ? open collector scp with timer (latch) ha16114 ? ? ?? single ha16120 ? ? ?? ch 1 ? ?? ha16116 ch 2 ? ? ? ch 1 ? ?? dual ha16121 ch 2 ? ?? totem pole power mos fet driver pulse-by-pulse current limiter and intermittent operation by on/off timer
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 3 of 33 pin arrangement 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 s.gnd * 1 c t r t in(+)1 in( ? )1 e/o1 db1 cl1 out1 p.gnd * 1 s.v in * 2 vref tim on/ off in( ? )2 e/o2 db2 cl2 out2 p. v in * 2 (top view) notes: channel 2 channel 1 1. 2. pins s.gnd (pin 1) and p.gnd (pin 10) have no direct internal interconnection. both pins must be connected to ground. pins s.v in (pin 20) and p.v (pin 11) have no direct internal interconnection. both pins must be connected to v in . in
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 4 of 33 pin functions pin no. symbol function 1 s.gnd signal circuitry* 1 ground 2c t timing capacitance (triangle wave oscillator output) 3r t timing resistance (for bias current synchronization) 4 in(+)1 error amp. noninverting input (1) 5 in(?)1 error amp. inverting input (1) 6 e/o1 error amp. output (1) 7 db1 dead band timer off period adjustment input (1) 8 cl1 overcurrent detection input (1) 9 out1 pwm pulse output (1) channel 1 10 p.gnd output stage* 1 ground 11 p.v in output stage* 1 power supply input 12 out2 pwm pulse output (2) 13 cl2 overcurrent detection input (2) 14 db2 dead band timer off period adjustment input (2) 15 e/o2 error amp. output (2) 16 in(?)2 error amp. inverting input (2)* 2 channel 2 17 on/ off ic on/off switch input (off when grounded) 18 tim setting of intermittent operation timing when overcurrent is detected (collector input of timer transistor) 19 vref 2.5 v reference voltage output 20 s.v in signal circuitry* 1 power supply input notes: 1. here ?output stage? refers to the power mos fet driver circuits, and ?signal circuitry? refers to all other circuits on the ic. note that this ic is not protected against reverse insertion, which can cause breakdown of the ic between v in and gnd. be careful to insert the ic correctly. 2. noninverting input of the channel 2 error amp is connected internally to vref.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 5 of 33 block diagram s.v in 20 vref 19 tim 18 on/ off 17 in( ? )2 16 e/o2 15 db2 14 cl2 13 out2 12 p. v in 11 1 s.gnd 2 c t 3 r t 4 in(+)1 5 in( ? )1 6 e/o1 7 db1 8 cl1 9 out1 10 p.gnd from uvl 1.1 v r t s r q or ovp uvl h l v l v h + ? ea1 from uvl ? + + + + ? pwm comp 2 from uvl pwm comp 1 5k 5k 5k from uvl from uvl vref vref out2 out1 * nand (ha16116) nand 0.2 v ? + cl2 cl1 to s.v in to s.v in ? + 0.2 v 1.6 v 1.0 v ? + ea2 uvl output latch v in 0.8v v in 0.8v v in 0.8v [channel 2] step-down control only (ha16116) booster control only (ha16121) [channel 1] (ha16116/ha16121) step-down or inverting control on/ off triangle wave oscillator circuit triangle wave latch reset pulse bias current 2.5 v output band gap reference voltage generator circuit note: this block is and ( ) in the case of ha16121. *
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 6 of 33 function and timing chart 1.6 v typ 1.0 v typ v in (on) gnd (off) v in (off) gnd (on) t on t off t relation between triangle wave and pwm output (in steady-state operation) c t triangle wave dead band voltage e/o error amp output pwm pulse output booster channel output (ha16121- ch 2) only step-down or inverting output (ha16116- ch 1, ch 2/ ha16121-ch 1) this pulse is for n-channel power mos fet gate driving. this pulse is for p-channel power mos fet gate driving. note: on duty = t on /t, where t = 1/f osc .
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 7 of 33 determining external component constants (pin usage) constant settings are explained for the following items. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 s.gnd c t r t in(+)1 in( ? )1 e/o1 db1 cl1 out1 p.gnd s.v in vref tim on/ off in( ? )2 e/o2 db2 cl2 out2 p. v in 1. 2. 3. 4. 5. 6. 7. 8. oscillator frequency (f osc ) setting dc/dc converter output voltage setting and error amp usage dead band duty and soft start setting output stage circuit and power mos fet driving method channel 1 channel 2 vref uvl and ovp setting of inter- mittent operation timing when overcurrent is detected on/ off pin usage overcurrent detection value setting 1. oscillator frequency (f osc ) setting figure 1.1 shows an equivalent circuit for the triangle wave oscillator. v h 1.6 v typ v l 1.0 v typ t 1 t 2 1.1 v 1 : 2 c t (external) r t (external) r c r b r a vref (2.5 v) c t charging i o i o discharging comparator (3.3 v ic internal circuits) inside the ic r t c t figure 1.1 equivalent circuit for the triangle wave oscillator
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 8 of 33 the triangle wave is a voltage waveform used as a reference in creating a pwm pulse. this block operates according to the following principles. a constant current i o , determined by an external timing resistor r t , is made to flow continuously to external timing capacitor c t . when the c t pin voltage exceeds the comparator threshold voltage v h , the comparator output causes a switch to operate, discharging a current i o from c t . next, when the c t pin voltage drops below threshold voltage v l , the comparator output again causes the switch to operate, stopping the i o discharge. the triangle wave is generated by this repeated operation. note that i o = 1.1 v/r t . since the i o current mirror circuit has a very limited current producing ability, r t should be set to 5 k ? (i o 220 a). with this ic series, v h and v l of the triangle wave are fixed internally at about 1.6 v and 1.0 v by the internal resistors r a , r b , and r c . the oscillator frequency can be calculated as follows. 1 t 1 + t 2 + t 3 f osc = t 1 = c t ? (v h ? v l ) 1.1 v/r t c t r t ? (v h ? v l ) 1.1 v = t 2 = c t ? (v h ? v l ) (2 ? 1) 1.1 v/r t c t r t ? (v h ? v l ) 1.1 v == t 1 v h ? v l = 0.6 v 1 2t 1 + t 3 f osc 1 1.1 c t r t + 0.8 s [hz] t 1 = t 2 = c t r t 0.6 1.1 t 3 0.8 s (comparator delay time in the oscillator) accordingly, here, note that the value of f osc may differ slightly from the above calculation depending on the amount of delay in the comparator circuit. also, at high frequencies this comparator delay can cause triangle wave overshoot or undershoot, skewing the dead band threshold. confirm the actual value in implementation and adjust the constants accordingly.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 9 of 33 2. dc/dc converter output voltage setting and error amp usage 2.1 positive voltage booster (v o > v in ) or step-down (v in > v o > vref) v o = use r 1 + r 2 r 2 ? vref (v) booster output is possible only at channel 2 of ha16121. for step-down output, both channels of ha16116 or channel 1 of ha16121 are used. ? + ch2 vref r 1 r 2 ? + ch1 r 1 r 2 v o in(+)1 in( ? )1 in( ? )2 error amp. vref pin (internal connection) 2.5 v v o figure 2.1 2.2 negative voltage (v o < vref) for inverting output v o = ? vref ? r 3 + r 4 r 3 r 1 r 1 + r 2 ? ? 1 (v) use channel 1 is used for inverting output on both ics. ? + ch1 r 3 r 4 v o in( ? )1 error amp in(+)2 r 1 r 2 vref pin vref 2.5 v figure 2.2 inverting output
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 10 of 33 2.3 error amplifier figure 2.3 shows an equivalent circuit of the error amplifier. the error amplifier on these ics is configured of a simple npn transistor differential input amplifier and the output circuit of a constant-current driver. this amplifier features wide bandwidth (f t = 4 mhz) with open loop gain kept to 50 db, allowing stable feedback to be applied when the power supply is designed. phase compensation is also easy. both ha16116 and ha16121 have a noninverting input (in(+)) pin, in order to allow use of the channel 1 error amplifier for inverting control. the channel 2 error amplifier, on the other hand, is used for step- down control in ha16116 and booster control in ha16121; so the channel 2 noninverting input is connected internally to vref. in( ? ) in(+) e/o 40 a 80 a ic internal v in to internal pwm comparator figure 2.3 error amplifier equivalent circuit 3. dead band (db) duty and soft start setting (common to both channels) 3.1 dead band duty setting dead band duty is set by adjusting the db pin input voltage (v db ). a convenient means of doing this is to connect two external resistors to the vref of this ic so as to divide v db (see figure 3.1). v db = vref r 2 r 1 + r 2 (v) duty (db) = v th ? v db v th ? v tl here, t = 1 f osc ? ? ? ? 100 (%) this applies when v db > v tl . if v db < v tl , there is no pwm output. note: v th : 1.6 v (typ) v tl : 1.0 v (typ) vref is typically 2.5 v. select r 1 and r 2 so that 1.0 v v db 1.6 v.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 11 of 33 + + pwm comparator c t r 1 r 2 ? db c st v db to vref from uvl e/o v th v db v tl 5k off on 1.6 v typ 1.0 v typ v e/o v in gnd v in gnd t on t off on off t pwm pulse output booster channel step-down/ inverting channel v in 0.8v figure 3.1 dead band duty setting 3.2 soft start (sst) setting (each channel) when the power is turned on, the soft start function gradually raises v db (refer to section 3.1), and the pwm output pulse width gradually widens. this function is realized by adding a capacitor c st to the db pin. the function is realized as follows. in the figure 3.2, the db pin is clamped internally at approximately 0.8 v, which is 0.2 v lower than the triangle wave v tl = 1.0 v typ. t a : standby time until pwm pulse starts widening. t b : time during which sst is in effect. during soft start, the db pin voltage in the figure below is as expressed in the following equation. v sst = v db ? here, ? t ? t 0.8 t 1 ? e, t sst = t a + t b t 0.8 = ? t ln 1 ? , t = c st ? (r 1 // r 2 ) 0.8 v db how to select values: if the soft start time t sst is too short, the dc/dc converter output voltage will tend to overshoot. to prevent this, set t sst to a few tens of ms or above.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 12 of 33 1.6 v 1.0 v 0 v v in 0 v v in 0 v 0 v t = 0 (here ic is on) t = t sst v o v (voltage) v th v tl t 0.8 t a t b starts from clamp voltage of 0.8 v pwm pulse output booster channel step-down/ inverting channel dc/dc converter output (positive in this example) triangle wave pwm output pulse starts to widen steady-state operation v sst figure 3.2 soft start (sst) setting
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 13 of 33 4. totem pole output stage circuit and power mos fet driving method the output stage of this ic series is configured of totem pole circuits, allowing direct connection to a power mos fet as an external switching device, so long as v in is below the gate breakdown voltage. if there is a possibility that v in will exceed the gate breakdown voltage of the power mos fet, a zener diode circuit like that shown figure 4.1 or other protective measures should be used. the figure 4.1 shows an example using a p-channel power mos fet. bias circuit p. v in v o out zener diode for gate protection drive circuit gate protection resistor e.g.: v in = 18 v schottky barrier diode + ? figure 4.1 p-channel power mos fet (example) 5. vref undervoltage error prevention (uvl) and overvoltage protection (ovp) functions 5.1 operation principles the reference voltage circuit is equipped with uvl and ovp functions. ? uvl in normal operation the vref output voltage is fixed at 2.5 v. if v in is lower than normal, the uvl circuit detects the vref output voltage with a hysteresis of 1.7 v and 2.0 v, and shuts off the pwm output if vref falls below this level, in order to prevent malfunction. ? ovp the ovp circuit protects the ic from inadvertent application of a high voltage from outside, such as if v in is shorted. a zener diode (5.6 v) and resistor are used between vref and gnd for overvoltage detection. pwm output is shut off if vref exceeds approximately 7.0 v. note that the pwm output pulse logic and the precision of the switching regulator output voltage are not guaranteed at an applied voltage of 2.5 v to 7 v.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 14 of 33 5.2 quick shutoff when the uvl circuit goes into operation, a sink transistor is switched on as in the figure below, drawing off the excess current. this transistor also functions when the ic is turned off, drawing off current from the c t , e/o, and db pins and enabling quick shutoff. on off pwm output off pwm output on pwm output off 1.7 2.0 2.5 5.0 7.0 vref (v) when v in is low abnormal voltage applied to vref relation of vref to uvl and ovp pwm output vref generation circuit to other circuitry uvl out out ovp zd 5.6 v r 2.0 v and 1.7 v detection v in vref 10 k ? internal pulse signal line vref sink transistor figure 5.1 quick shutoff
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 15 of 33 6. setting of intermittent operation timing when overcurrent is detected 6.1 operation principles the current limiter on this ic detects overcurrent in each output pulse, providing pulse-by-pulse overcurrent protection by limiting pulse output whenever an overcurrent is detected. if the overcurrent state continues, the tim pin and on/ off pin can be used to operate the ic intermittently. as a result, a power supply with sharp vertical characteristics can be configured. the on/ off timing for intermittent operation makes use of the hysteresis in the on/ off pin threshold voltage v on and v off , such that v on ? v off = v be . setting method is performed as described on the following pages. v be is based-emitter voltage of internal transistor. note: when an overcurrent is detected in one channel of this ic but not the other, the pulse-by-pulse current limiter still goes into operation on both channels. also, when the intermittent operation feature is not used, the tim pin should be set to open state and the on/ off pin pulled up to high level (above v on ). 390 k ? 4.7 k ? 2.2 f + ? r a r b c on/ off on/ off tm latch q r s vref generation circuit v in current limiter cl figure 6.1 connection diagram (example) 6.2 intermittent operation timing chart (v on/ off off off off only) v be 2v be 3v be 4v be *1 v on/ off b off on on c 0 v 2t on t off t on t a a. b. c. note: continuous overcurrent detected intermittent operation starts (ic is off) overcurrent cleared (dotted line) 1.v is the base-emitter voltage in transistors on the ic, and is approximately 0.7 v (see the figure 7.1). be ic is on c ic is off for details, see the overall waveform timing diagram. figure 6.2 intermittent operation timing chart
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 16 of 33 6.3 calculating intermittent operation timing intermittent operation timing is calculated as follows. (1) t on time (the time until the ic is shut off when continuous overcurrent occurs) t on = c on/ off r b 3v be 2v be 1 1 ? on duty* = c on/ off r b ln1.5 0.4 c on/ off r b ? 1 1 ? on duty* 1 1 ? on duty* ln (2) t off time (when the ic is off, the time until it next goes on) t off = c on/ off (r a + r b ) ln v in ? 2v be v in ? 3v be where, v be 0.7 v note: 1. on duty is the percent of time the ic is on during one pwm cycle when the pulse-by-pulse current limiter is operating. from the first equation (1) above, it is seen that the shorter the time t on when the pulse-by-pulse current limiter goes into effect (resulting in a larger overload), the smaller the value t on becomes. as seen in the second equation (2), t off is a function of v in . further, according to this setting, when v in is switched on, the ic goes on only after t off has elapsed. triangle wave point at which current limiter operate pwm output (step-down channel) t t on on duty = t on t dead band voltage where t = 1/f osc note: on duty is the percent of time the ic is on during one pwm cycle when the pulse-by-pulse current limiter is operating. figure 6.3
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 17 of 33 6.4 examples of intermittent operation timing (calculated values) t on = t 1 c on/ off r b t 1 = 0.4 1 1 ? on duty here, coefficient example: if c on/ off = 2.2 f, r b = 4.7 k ? , and the on duty of the current limiter is 75%, then t on = 16 ms. from section 6.3 (1) previously. (1) t on 0 20406080100 0 1 2 3 4 t 1 (pwm) on duty (%) figure 6.4 examples of intermittent operation timing (1) if c on/ off = 2.2 f, r b = 4.7 k ? , r a = 390 k ? , v in = 12 v, (2) t off t off = t 2 c on/ off (r a + r b ) t 2 = ln v in ? 2v be v in ? 3v be t off = 60 ms. here, coefficient from section 6.3 (2) previously. then example: 02040 0 0.05 0.1 t 2 v in (v) 10 30 figure 6.5 examples of intermittent operation timing (2)
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 18 of 33 v in c f r f c l ic r cs out f. b . v th (cl) v in ? 0.2 v v in triangle wave v ct dead band v db error output v e/o pwm pulse output (in case of ha16120) power mos fet drain current (i d ) (dotted line shows inductor current) current limiter pin (cl) inductor l example of step-up circuit i d determined by l and v in determined by r cs and r f v out figure 6.6 7. on/ off off off off pin usage 7.1 ic shutoff by the on/ off off off off pin as shown in the figure 7.1, these ics can be turned off safely by lowering the voltage at the on/ off pin to below 2v be . this feature is used to conserve the power in the power supply system. in off state the ic current consumption (i off ) is 10 a (max) for ha16116 and 150 a (max) for ha16121. the on/ off pin can also be used to drive logic ics such as ttl or cmos with a sink current of 50 a (typ) at an applied voltage of 5 v. when it is desired to employ this feature along with intermittent operation, an open collector or open drain logic ic should be used. s.v in ha16116, ha16121 gnd p. v in tim on/ off v in i in vref output to other circuitry vref generation circuit to latch r b r a c on/ off + ? switch 50 k ? 4 v be q 1 q 2 q 4 off on external logic ic to output stage on/off hysteresis circuit q 3 figure 7.1 ic shutoff by the on/ off off off off pin
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 19 of 33 7.2 adjusting uvl voltage (when intermittent operation is not used) the uvl voltage setting in this ic series can be adjusted externally as shown below. using the relationships shown in the figure, the uvl voltage in relation to v in can be adjusted by changing the relative values of v th and v tl . when the ic is operating, transistor q 4 is off, so v on = 3v be 2.1 v. accordingly, by connecting resistors r c and r d , the voltage at which uvl is cancelled is as follows. v in = 2.1 v r c + r d r d this v in is simply the supply voltage at which the uvl stops functioning, so in this state vref is still below 2.5 v. in order to restore vref to 2.5 v, a v in of approximately 4.3 v should be applied. with this ic series, v on/ off makes use of the v be of internal transistors, so when designing a power supply system it should be noted that v on has a temperature dependency of around ?6 mv/c. r c r d tim (open) on/ off gnd 50 k ? p. v in s.v in v in q 1 q 2 q 3 q 4 vref output vref generation circuit to other circuitry to latch vref 3 2 1 0 012345 v off 1.4 v v on 2.1 v v on/ off 2.5 v v in 4.5 v to output stage on/off hysteresis circuit figure 7.2 adjusting uvl voltage
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 20 of 33 overcurrent detection value setting the overcurrent detection value v th for this ic series is 0.2 v (typ) and the bias current is 200 a (typ) the power mos fet peak current value before the current limiter goes into operation is derived from the following equation. i d = v tcl ? (r f + r cs ) ? i bcl r cs here v th = v in ? v cl = 0.2 v, v cl is a voltage referd on gnd. note that c f and r cs form a low-pass filter, determined by their time constants, that prevents malfunctions from current spikes when the power mos fet is turned on or off. r cs v in r f c f i bcl v cl g s d v o 1 k 200 a + ? detection output out cl s.v in in( ? ) to other circuitry 1800 pf + ? 240 ? 0.05 ? (internal) this circuit is an example for step-down output use. figure 8.1 example for step-down use the sample values given in this figure are calculated from the following equation. i d 0.2 v ? (240 ? + 0.05 ? ) 200 a 0.05 ? = = 3.04 [a] the filter cutoff frequency is calculated as follows. f c = = 1 2 c f r f 1 6.28 1800 pf 240 ? = 370 [khz]
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 21 of 33 absolute maximum ratings (ta = 25c) rating item symbol ha16116fp, ha16121fp ha16116fpj, ha16121fpj unit supply voltage v in 40 40 v output current (dc) i o 0.1 0.1 a output current (peak) i o peak 1.0 1.0 a current limiter pin voltage v cl v in v in v error amp input voltage v iea v in v in v e/o input voltage v ie/o vref vref v rt pin source current i rt 500 500 a tim pin sink current i tm 20 20 ma power dissipation* 1 p t 680* 1 680* 1 mw operation temperature range topr ?40 to +85 ?40 to +85 c junction temperature tjmax 125 125 c storage temperature range tstg ?55 to +125 ?55 to +125 c note: 1. this value is based on actual measurements on a 40 40 1.6 mm glass epoxy circuit board. at a wiring density of 10%, it is the permissible value up to ta = 45c, but at higher temperatures this value should be derated by 8.3 mw/c. at a wiring density of 30% it is the permissible value up to ta = 64c, but at higher temperatures it should be derated by 11.1 mw/c. 800 600 400 200 0 680 mw 447 mw 348 mw 45 c 85 c 125 c 64 c permissible dissipation p t (mw) 20 40 60 80 100 120 140 0 ? 40 ? 20 operating ambient temperature ta ( c) 10% wiring density 30% wiring density
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 22 of 33 electrical characteristics (ta = 25c, v in = 12 v, f osc = 300 khz) item symbol min typ max unit test conditions output voltage vref 2.45 2.50 2.55 v i o = 1 ma line regulation line ? 30 60 mv 4.5 v v in 40 v load regulation load ? 30 60 mv 0 i o 10 ma output shorting current i os 10 25 ? ma vref = 0 v vref ovp voltage vrovp 6.2 6.8 7.0 v reference voltage block output voltage temperature dependence ? vref/ ? ta ? 100 ? ppm/c maximum oscillator frequency f oscmax 600 ? ? khz minimum oscillator frequency f oscmin ??1 hz oscillator frequency input voltage stability ? f osc / ? v in ? 1 3 % 4.5 v v in 40 v oscillator frequency temperature stability ? f osc / ? ta ? 5 ? % ?20c ta 85c triangle wave oscillator block oscillator frequency f osc 270 300 330 khz c t = 220 pf, r t = 10 k ? ) low-level threshold voltage v tldb 0.87 0.97 1.07 v output on duty 0% high-level threshold voltage v thdb 1.48 1.65 1.82 v output on duty 100% threshold differential voltage ? v tdb 0.55 0.65 0.75 v ? v th = v th ? v tl dead band adjust block output source current i osource (db) 100 150 200 a db pin = 0 v low-level threshold voltage v tlcmp 0.87 0.97 1.07 v output on duty = 0% high-level threshold oltage v thcmp 1.48 1.65 1.82 v output on duty = 100% threshold differential voltage ? v tcmp 0.55 0.65 0.75 v ? v th = v th ? v tl pwm comparator block dead band precision dbdev ?5 0 +5 % deviation when v eo = (v tl + v th )/2, duty = 50 %
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 23 of 33 electrical characteristics (cont.) (ta = 25c, v in = 12 v, f osc = 300 khz) item symbol min typ max unit test conditions input offset voltage v ioea ?210mv input bias current i bea ?0.82 a output sink current i osink (ea) 28 40 52 a in open loop, v i = 3 v, v o = 2 v output source current i osource (ea) 28 40 52 a in open loop, v i = 2 v, v o = 1 v voltage gain a v 40 50 ? db f = 10 khz unity gain band-width bw 3 4 ? mhz high-level output voltage v ohea 2.2 3.0 ? v i o = 10 a error amp block low-level output voltage v olea ?0.20.5vi o = 10 a threshold voltage v tcl v in ?0.22 v in ?0.2 v in ?0.18 v cl bias current i bcl 150 200 250 ac l = v in ? 200 300 ns c l = v in ?0.3 v overcurrent detection block operating time t offcl ? 500 600 ns applies only to ch 2 of ha16121 ?0.72.2vi osink = 10 ma applies only to ha16116 ?1.61.9vi osink = 10 ma applies only to ha16121 output low voltage v ol1 ?1.01.3vi osink = 0 ma applies only to ha16121 ?1.61.9vi osink = 1 ma on/ off pin = 0 v applies only to ch 2 of ha16121 off state low voltage v ol2 ?1.01.3vi osink = 0 ma on/ off = 0 v applies only to ch 2 of ha16121 v in ?1.9 v in ?1.6 ? v i osource = 10 ma output high voltage v oh1 v in ?1.3 v in ?1.0 ? v i osource = 0 a v in ?1.9 v in ?1.6 ? v i osource = 1 ma on/ off pin = 0 v off state high voltage v oh2 v in ?1.3 v in ?1.0 ? v i osource = 0 a on/ off pin = 0 v rise time t r ? 70 130 ns c l = 1000 pf (to v in ) * 1, * 2 output stage fall time t f ? 70 130 ns c l = 1000 pf (to v in ) * 1, * 2
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 24 of 33 electrical characteristics (cont.) (ta = 25c, v in = 12 v, f osc = 300 khz) item symbol min typ max unit test conditions v in high-level threshold voltage v tuh1 3.3 3.6 3.9 v v in low-level threshold voltage v tul1 3.0 3.3 3.6 v v in threshold differential voltage ? v tu1 0.1 0.3 0.5 v ? v tu1 = v tuh1 ? v tul1 vref high-level threshold voltage v tuh2 1.7 2.0 2.3 v vref low-level threshold voltage v tul2 1.4 1.7 2.0 v uvl block vref threshold differential voltage ? v tu2 0.1 0.3 0.5 v ? v tu2 = v tuh2 ? v tul2 on/ off pin sink current i on/ off ?3550 aon/ off pin = 5 v ic on-state voltage v on 1.8 2.1 2.4 v ic off-state voltage v off 1.1 1.4 1.7 v on/off block on/off threshold differential voltage ? v on/ off 0.5 0.7 0.9 v tim pin sink current in steady state i tim1 0?10 a cl pin = v in , v tim = 0.3 v tim block tim pin sink current at overcurrent detection i tim2 10 15 20 ma cl pin = v in ? 0.3 v v tim = 0.3 v 6.0 8.5 11.1 ma c l = 0 pf (to v in ) * 1, * 2 8.5 12.1 15.7 ma c l = 500 pf (to v in ) * 1, * 2 operating current i in 11.0 15.7 20.5 ma c l = 1000 pf (to v in ) * 1, * 2 0?10 a ha16116fp common block off current i off 0 120 150 a ha16121fp on/ off pin = 0 v notes: 1. c l is load capacitor for power mos fet?s gate, and c l = 1000 pf to gnd in the case of ha16121 ? ch 2. 2. c l in channel 2 of ha16121 is connected to gnd.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 25 of 33 characteristic curves ? reference voltage block (vref) 2.5 v 01234540 4.3 reference voltage vs. power supply input voltage vref load regulation vref temperature characteristics 3 2 1 power supply input voltage v in (v) 2.54 2.52 2.50 2.48 2.46 ? 20 0 20 40 60 80 100 85 uvl release: 3.6 v uvl operate: 3.3 v ta = 25 c r a = 390 k ? (between the v in and on/ off pins) 3.3 3.6 ambient temperature ta ( c) 3.0 2.5 2.0 1.50 0 10 20 30 reference voltage vref (v) reference voltage vref (v) reference voltage vref (v) output current i o sink (ma) short circuit current v in = 12 v i o (vref) = 1 ma ? uvl (low input voltage malfunction prevention) block 4.5 4.0 3.5 3.0 2.5 ? 20 0 20 40 60 80 100 hysteresis voltage temperature characteristics v in ul voltage (v) ambient temperature ta ( c) low threshold voltage hysteresis high threshold voltage
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 26 of 33 ? triangle wave oscillator block r t pin output current characteristics c t , r t values (v in = 12v) vs. oscillator frequency oscillator frequency temperature stability sawtooth wave amplitude vs. oscillator frequency r t pin voltage (v) 1.1 1.0 0.9 0.8 0 100 200 300 400 500 i rt ( a) 2.0 1.5 1.0 0.5 0 100 200 300 400 500 600 v th v tl sawtooth wave amplitude sawtooth wave level (v) f osc (khz) (linear scale) (dc) reccomended usage range 10 (r t 100 k ? ) 330 (r t 3 k ? ) 10 20 30 50 70 100 200 300 500 700 1 m 100 70 50 30 20 10 7 5 3 r t (k ? ) oscillator frequency f osc (khz) 00.1 f 4700 pf 2200 pf 1000 pf 470 pf 220 pf 100 pf c t = 47 pf 600 khz frequency variation ( ? f/fo) (%) +10 +5 0 ? 5 ? 10 ? 20 0 20 40 60 80 100 a b a v in = 12 v 85 b a: f osc = 300 khz b: f osc = 600 khz ambient temperature ta ( c) note: due to these characteristics, the dead band and pwm comparator threshold voltages change at high frequencies.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 27 of 33 ? error amplifier block 01234 +100 0 ? 100 ? 200 ? 300 60 40 20 0 1 k 3 k 10 k 30 k 100 k 300 k 1 m 3 m 10 m 0 45 90 180 135 bw a vo open loop gain characteristics error amplifier input frequency f in (hz) open loop gain a vo (db) phase delay (deg.) vref input voltage v i (v) output offset v o (mv) v i v o ? + + ? ea common mode input characteristics ? on duty characteristics 0.8 1.0 1.2 1.4 1.6 1.8 0.8 1.0 1.2 1.4 1.6 1.8 100 80 60 40 20 0 on duty* 1 (%) on duty* 2 (%) on duty characteristics v db or v e/o (v) v db or v e/o (v) 300 khz on duty characteristics 100 80 60 40 20 0 step-down pwm output (ha16116-1, 2ch ha16121-1ch) 600 khz 300 khz f osc = 50 khz boost pwm output (ha16121-2 ch) f osc = 50 khz 600 khz the percentage of a single timing cycle during which the output is low. notes: 1. the percentage of a single timing cycle during which the output is high. 2.
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 28 of 33 ? other characteristics ? 20 0 20 40 60 80 100 85 c 220 210 200 190 180 current limiter level temperature characteristics ic on voltage and off voltage temperature characteristics detection voltage v th (mv) ambient temperature ta ( c) ambient temperature ta ( c) ? 20 0 20 40 60 80 100 85 c 4 3 2 1 0 v on or v off (v) v on on voltage (about ? 6mv/ c) v off off voltage (about ? 4mv/ c) 40 30 20 10 10 20 30 40 0 2468 0 10 12 11 10 9 3 2 1 current dissipation i in (ma) no load i in vs. v in characteristics output drive circuit power mos fet direct drive ability data output pin (output resistor) characteristics power supply voltage v in (v) i o sink or i o source (ma) output voltage v o (v dc ) v gs (p-channel power mos fet) v gs (n-channel power mos fet) output high voltage when on f osc = 300 khz on duty: 50% ta = 25 c load capacitance: 1000 pf/ch 500 pf/ch maximum rating at ta = 25 c: 680 mw 1000 2000 3000 4000 ciss (pf) 800 600 400 200 0 2sj214 2sj176 2sj216 v in = 12 v f osc = 130 khz i o peak (ma) gate drive waveforms for the 2sj214 drive voltage: 5 v/div drive current: 200 ma/div * 650 nsec/div output low voltage when on output low voltage when off (channels 1 and 2 in the ha16121) output high voltage when off (channels 1 and 2 in the ha16116 and channel 1 in the ha16121) note: the solid line is data measured with discrete capacitances (for each channel of ha16116). note: * measured using a current probe. (the boost channel (channel 2 in the ha16121) load is with respect to ground, and has almost identical characteristics.)
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 29 of 33 application examples (1) out1 p.gnd db1 cl1 e/o1 in(+)1 c t r t s.gnd in( ? )1 vref tim on/ off in( ? )2 e/o2 db2 cl2 out2 p.v in s.v in v in 12v cref 0.1 r a 390k c tm 2.2 24k 2.2 + ? 4700p 10k 100k 1800p 0.05 240 2sj214 4.7 330 h + ? 20k 20k hrp24 + ? ? + 330 h + ? 470 hrp24 2sj214 4.7 0.05 1800p 240 2.2 33k 24k r3 2k r4 12k 12k 12k 100k 10k 4700p r t c t 10k 220p r b 4.7k 470 33k ha16116fp is used in a 5 v output power supply, with a +12 v input. 20 1 19 18 17 16 15 14 13 12 11 2 3 4 5 6 7 8 9 10 ? + on/ off from uvl 1.1 v r t s r q or ovp uvl h l v l v h + ? ea1 from uvl ? + + + + ? pwm comp 2 from uvl pwm comp 1 5k 5k 5k from uvl from uvl vref vref out2 out1 * nand (ha16116) nand 0.2 v ? + cl2 cl1 to s.v in to s.v in ? + 0.2 v 1.6 v 1.0 v ? + ea2 v in 0.8v v in 0.8v v in 0.8v step-down output inverting output +5 v 1 a output ? 5 v 1 a output latch 2.5 v output band gap reference voltage generation circuit uvl output triangle wave oscillator circuit triangle wave latch reset pulse bias current the ic is the ha16116. r : ? c : f (unless otherwise specified) pf (p) units:
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 30 of 33 overall waveform timing diagram (for application examples (1)) v in v tim , v on/ off 12 v 0 v 0 v 2.1 v 2.8 v v tim , v on/ off 2.1 v 1.4 v on on on on off off off off on pulse-by-pulse current limiter operates 3.0 2.0 1.0 0.0 v ct triangle wave v e/o v e/o , v ct , v db 12 v 11.8 v 0 v v out *1 pwm pulse 12 v 0 v dc/dc output (example for positive voltage) ic operation states v db power supply on ic on soft start steady-state operation overcurrent detected; intermittent operation overcurrent cleared; steady-state operation quick shut-off power supply off, ic off note: 1.this pwm pulse is on the step-down/inverting control channel. the booster control channel output consists of alternating l and h of the ic on cycle. off (v) v cl
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 31 of 33 application examples (2) (some pointers on use) 1. inductor, power mos fet, and diode connections v in c f r f r cs v in c l out gnd v o v in c f r f r cs v in c l out gnd v o fb fb c f r f r cs v in c l out gnd fb c f r f r cs v in c l out gnd v o vref fb 1. booster specification 2. step-down specification 4. negative booster specification (flyback transformer) 3. inverting specification applicable only to channel 2 of ha16121fp applicable to ha16116fp and to channel 1 of ha16121fp applicable only to channel 1 applicable only to channel 1 2. turning output on and off while the ic is on db e/o v in gnd c l in in + ? to turn only one channel off, ground the db pin or the e/o pin. in the case of e/o, however, there will be no soft start when the output is turned back on. 1. when only one channel is to be used, the channel not used should be connected as follows. 2. connect c l to v in . ground in(+) and in( ? ). leave other pins open. off
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 32 of 33 application examples (3) on/ off from uvl 1.1 v r t s r q or ovp uvl h l v l v h + ? ea1 from uvl ? + + + + ? pwm comp 2 from uvl pwm comp 1 5k 5k 5k from uvl from uvl vref vref out2 out1 * nand (ha16116) nand 0.2 v ? + cl2 cl1 to s.v in to s.v in ? + 0.2 v 1.6 v 1.0 v ? + ea2 v in 0.8v v in 0.8v v in 0.8v 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 v in 4700p 10k 5v cref 0.1 r a 390k r b 4.7k c tm 2.2 tim on/ off 4700p 10k 100k in( ? )2 33k 24k 2.2 e/o2 db2 cl2 out2 p. v in 1800p 240 0.05 330 h 330 h hrp24 ? + 470 5.1 k + 1.3 k ? 2sk1094 4.7 + ? ? + 470 ? 12 v output 2sj214 0.05 240 4.7 1800p p.gnd out1 cl1 db1 2.2 ? + 24k r3 1.2k r4 22k 12k 12k e/o1 33k 100k in( ? )1 in(+)1 r t r t 10k c t c t 220p s.gnd power supply using the ha16121fp: +5 v input, +12 and ? 22 v outputs s.v in vref + ? the ic is the ha16121. r : ? c : f (unless otherwise specified) pf (p) units: bias current latch reset pulses triangle wave generation circuit triangle wave uvl output 2.5 v band gap reference voltage generation circuit latch +12 v output boost output inverting output
ha16116fp/fpj, ha16121fp/fpj rev.2.0, sep.18.2003, page 33 of 33 package dimensions package code jedec jeita mass (reference value) fp-20da ? conforms 0.31 g *dimension including the plating thickness base material dimension *0.42 ?0.08 0.12 0.15 m 20 10 1 *0.22 ?0.05 0.80 max 11 12.6 5.5 2.20 max 13 max 0 ? ?8 ? 0. 70 0.20 + 0.20 0.30 7.80 1.27 0.10 0.10 1.15 0.40 0.06 0.20 0.04 as of january, 2003 unit: mm
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