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LTC4085-3 1 40853f i load (ma) 0 600 500 400 300 200 100 0 C100 300 500 40853 ta01b 100 200 400 600 current (ma) i load i in i bat (charging) i bat (discharging) wall = 0v usb power manager with ideal diode controller and 3.95v li-ion charger the ltc ? 4085-3 is a usb power manager and li-ion/poly- mer battery charger designed for portable battery-powered applications. the part controls the total current used by the usb peripheral for operation and battery charging. the total input current can be limited to 20% or 100% of a programmed value up to 1.5a (typically 100ma or 500ma). battery charge current is automatically reduced such that the sum of the load current and charge current does not exceed the programmed input current limit. the LTC4085-3 includes a complete constant-current/ constant-voltage linear charger for single cell li-ion bat- teries. this 3.95v version of the standard ltc4085 is intended for applications which have extended battery lifetime requirements or those that require high temperature (approximately >60c) operation or storage. under these conditions, a reduced ? oat voltage will trade-off initial cell capacity for the bene? t of increased capacity retention over the life of the battery. a reduced ? oat voltage also minimizes swelling in prismatic and polymer cells, and avoids open cid (pressure fuse) in cylindrical cells. the LTC4085-3 also includes a programmable termina- tion timer, automatic recharging, an end-of-charge status output and an ntc thermistor. portable usb devices seamless transition between input power sources: li-ion/polymer battery, usb and 5v wall adapter 215m internal ideal diode plus optional external ideal diode controller provide low loss powerpath ? when wall adapter/usb input not present load dependent charging guarantees accurate usb input current compliance 3.95v float voltage improves battery life span and high temperature safety margin constant-current/constant-voltage operation with thermal feedback to maximize charging rate without risk of overheating* selectable 100% or 20% input current limit (e.g., 500ma/100ma) battery charge current independently programmable up to 1.2a preset 3.95v charge voltage with 0.8% accuracy c/10 charge current detection output tiny (4mm 3mm 0.75mm) 14-lead dfn package input and battery current vs load current r prog = 100k, r clprog = 2k in susp hpwr prog clprog ntc v ntc wall acpr out gate bat chrg timer LTC4085-3 gnd + 0.1f 4.7f to ldos, regs, etc 10k 10k 2k 100k 5v wall adapter input 5v (nom) from usb cable v bus 4.7f suspend usb power 100ma 500ma select 1k 510 40853 ta01 * * optional - to lower ideal diode impedance i in i load i bat features description applications typical application l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and bat-track, powerpath and thinsot are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 6522118, 6700364. other patents pending.
LTC4085-3 2 40853f (notes 1, 2, 3, 4, 5) terminal voltage in, out t < 1ms and duty cycle < 1% ................... C0.3v to 7v steady state ............................................. C0.3v to 6v bat, chrg , hpwr, susp, wall, acpr ....... C0.3v to 6v ntc, timer, prog, clprog .......C0.3v to (v cc + 0.3v) pin current (steady state) in, out, bat (note 6) ...............................................2.5a operating temperature range.................. C40c to 85c maximum operating junction temperature .......... 110c storage temperature range ................... C65c to 125c the indicates speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 5v, v bat = 3.7v, hpwr = 5v, wall = 0v, r prog = 100k, r clprog = 2k, unless otherwise noted. symbol parameter conditions min typ max units v in input supply voltage in and out 4.35 5.5 v v bat input voltage bat 4.3 v i in input supply current i bat = 0 (note 7) suspend mode; susp = 5v suspend mode; susp = 5v, wall = 5v, v out = 4.8v 0.5 50 60 1.2 100 110 ma a a i out output supply current v out = 5v, v in = 0v, ntc = v ntc 0.7 1.4 ma i bat battery drain current v bat = 4.05v, charging stopped suspend mode; susp = 5v v in = 0v, bat powers out, no load 15 22 60 27 35 100 a a a v uvlo input or output undervoltage lockout v in powers part, rising threshold v out powers part, rising threshold 3.6 2.75 3.8 2.95 4 3.15 v v v uvlo input or output undervoltage lockout v in rising C v in falling or v out rising C v out falling 130 mv t jmax = 125c, ja = 43c/w exposed pad (pin 15) is gnd, must be connected to pcb 1 2 3 4 5 6 7 14 13 12 11 10 9 8 bat gate prog chrg acpr v ntc ntc in out clprog hpwr susp timer wall top view 15 de package 14-lead (4mm 3mm) plastic dfn lead free finish tape and reel part marking package description temperature range ltc4085ede-3#pbf ltc4085ede-3#trpbf 40853 14-lead (4mm 3mm) plastic dfn C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www .linear.com/tapeandreel/ pin configuration absolute maximum ratings order information electrical characteristics
LTC4085-3 3 40853f symbol parameter conditions min typ max units current limit i lim current limit r clprog = 2k (0.1%), hpwr = 5v r clprog = 2k (0.1%), hpwr = 0v 475 90 500 100 525 110 ma ma i in(max) maximum input current limit (note 8) 2.4 a r on on resistance v in to v out i out = 100ma load 215 m v clprog clprog pin voltage r prog = 2k r prog = 1k 0.98 0.98 1 1 1.02 1.02 v v i ss soft start inrush current in or out 5 ma/s v clen input current limit enable threshold voltage (v in C v out ) v in rising (v in C v out ) v in falling 20 50 C60 80 mv mv battery charger v float regulated output voltage i bat = 2ma i bat = 2ma, (0c C 85c) 3.915 3.910 3.95 3.95 3.985 3.990 v v i bat current mode charge current r prog = 100k (0.1%), no load r prog = 50k (0.1%), no load 465 900 500 1000 535 1080 ma ma i bat(max) maximum charge current (note 8) 1.5 a v prog prog pin voltage r prog = 100k r prog = 50k 0.98 0.98 1 1 1.02 1.02 v v k eoc ratio of end-of-charge current to charge current v bat = v float (3.95v) 0.085 0.1 0.11 ma/ma i trikl trickle charge current v bat = 2v, r prog = 100k (0.1%) 35 50 60 ma v trikl trickle charge threshold voltage 2.75 2.9 3 v v cen charger enable threshold voltage (v out C v bat ) falling; v bat = 4v (v out C v bat ) rising; v bat = 4v 55 80 mv mv v rechrg recharge battery threshold voltage v float C v rechrg 60 95 130 mv t timer timer accuracy v bat = 4.05v C10 10 % recharge time percent of total charge time 50 % low battery trickle charge time percent of total charge time, v bat < 2.8v 25 % t lim junction temperature in constant temperature mode 105 c internal ideal diode r fwd incremental resistance, v on regulation i bat = 100ma 125 m r dio(on) on resistance v bat to v out i bat = 600ma 215 m v fwd voltage forward drop (v bat C v out )i bat = 5ma i bat = 100ma i bat = 600ma 10 30 55 160 50 mv mv mv v off diode disable battery voltage 2.8 v i fwd load current limit, for v on regulation 550 ma i d(max) diode current limit 2.2 a the indicates speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 5v, v bat = 3.7v, hpwr = 5v, wall = 0v, r prog = 100k, r clprog = 2k, unless otherwise noted. electrical characteristics
LTC4085-3 4 40853f the indicates speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 5v, v bat = 3.7v, hpwr = 5v, wall = 0v, r prog = 100k, r clprog = 2k, unless otherwise noted. electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: v cc is the greater of v in , v out or v bat . note 3: all voltage values are with respect to gnd. note 4: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperatures will exceed 110c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may result in device degradation or failure. note 5: the ltc4085e-3 is guaranteed to meet speci? ed performance from 0 to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 6: guaranteed by long term current density limitations. note 7: total input current is equal to this speci? cation plus 1.002 ? i bat where i bat is the charge current. note 8: accuracy of programmed current may degrade for currents greater than 1.5a. symbol parameter conditions min typ max units external ideal diode v fwd,eda external ideal diode forward voltage v gate = 1.85v; i gate = 0 20 mv logic v ol output low voltage chrg, acpr i sink = 5ma 0.1 0.4 v v ih input high voltage susp , hpwr pin 1.2 v v il input low voltage susp , hpwr pin 0.4 v i pulldn logic input pull-down current susp, hpwr 2 a v chg(sd) charger shutdown threshold voltage on timer 0.14 0.4 v i chg(sd) charger shutdown pull-up current on timer v timer = 0v 514 a v war absolute wall input threshold voltage v wall rising threshold 4.15 4.25 4.35 v v waf absolute wall input threshold voltage v wall falling threshold 3.12 v v wdr delta wall input threshold voltage v wall C v bat rising threshold 75 mv v wdf delta wall input threshold voltage v wall C v bat falling threshold 02560 mv i wall wall input current v wall = 5v 75 150 a ntc v vntc v ntc bias voltage i vntc = 500a 4.4 4.85 v i ntc ntc input leakage current v ntc = 1v 0 1 a v cold cold temperature fault threshold voltage rising threshold hysteresis 0.738 ? v vntc 0.018 ? v vntc v v v hot hot temperature fault threshold voltage falling threshold hysteresis 0.326 ? v vntc 0.015 ? v vntc v v v dis ntc disable voltage ntc input voltage to gnd (falling) hysteresis 75 100 35 125 mv mv
LTC4085-3 5 40853f temperature (c) C50 v prog (v) 0.995 1.000 1.005 25 75 40851 g07 0.990 0.985 0.980 C25 0 50 1.010 1.015 1.020 100 v in = 5v v bat = 3.80v r prog = 100k r clprog = 2k i bat (ma) 0 3.75 v float (v) 3.80 3.85 3.90 3.95 4.00 4.05 200 400 600 800 40853 g08 1000 r prog = 34k temperature (c) C50 v float (v) 3.945 3.950 3.955 25 75 40853 g09 3.940 3.935 3.930 C25 0 50 3.960 3.965 3.970 100 v in = 5v i bat = 2ma temperature (c) C50 0 i in (a) 100 300 400 500 50 900 40853 g01 200 0 C25 75 25 100 600 700 800 v in = 5v v bat = 3.95v r prog = 100k r clprog = 2k temperature (c) C50 70 60 50 40 30 20 10 0 25 75 40853 g02 25 0 50 100 i in (a) v in = 5v v bat = 3.95v r prog = 100k r clprog = 2k susp = 5v temperature (c) C50 0 i bat (a) 20 40 60 C25 0 25 50 40853 g03 75 80 100 10 30 50 70 90 100 v in = 0v v bat = 3.95v temperature (c) C50 475 i in (ma) 485 495 505 515 525 C25 02550 40853 g04 75 100 v in = 5v v bat = 3.7v r prog = 100k r clprog = 2k temperature (c) C50 i in (ma) 92 96 100 C25 0 25 50 40853 g05 75 104 108 110 90 94 98 102 106 100 v in = 5v v bat = 3.7v r prog = 100k r clprog = 2k temperature (c) C50 0 v clprog (v) 0.2 0.4 0.6 0.8 1.2 C25 02550 40853 g06 75 100 1.0 v in = 5v r clprog = 2k hpwr = 5v hpwr = 0v input supply current vs temperature input supply current vs temperature (suspend mode) battery drain current vs temperature (bat powers out, no load) input current limit vs temperature, hpwr = 5v input current limit vs temperature, hpwr = 0v clprog pin voltage vs temperature prog pin voltage vs temperature v float load regulation battery regulation (float) voltage vs temperature t a = 25c unless otherwise noted. typical performance characteristics
LTC4085-3 6 40853f temperature (c) C50 i bat (ma) 400 500 600 25 75 40853 g12 300 200 C25 0 50 100 125 100 0 v in = 5v v bat = 3.5v q ja = 50c/w temperature (c) C50 125 r on (m) 150 175 200 225 275 C25 02550 40853 g10 75 100 250 v in = 4.5v v in = 5.5v i load = 400ma v in = 5v time (min) 0 0 i bat (ma) 100 200 300 400 500 600 0 v bat and v chrg (v) 1 2 3 4 5 6 50 100 150 200 40853 g11 400mahr cell v in = 5v r prog = 100k r clprog = 2.1k c/10 termination chrg v bat i bat v bat (v) 0 0 i bat (ma) 100 300 400 500 1 2 2.5 4.5 40853 g13 200 0.5 1.5 3 3.5 4 600 v in = 5v v out = no load r prog = 100k r clprog = 2k hpwr = 5v v bat (v) 0 0 i bat (ma) 20 60 80 100 1 2 2.5 4.5 40853 g14 40 0.5 1.5 3 3.5 4 120 v in = 5v v out = no load r prog = 100k r clprog = 2k hpwr = 0v v fwd (mv) 0 0 i out (ma) 100 300 400 500 1000 700 50 100 40853 g15 200 800 900 600 150 200 v bat = 3.7v v in = 0v C50c 0c 50c 100c v fwd (mv) 0 0 i out (ma), r dio (m) 100 300 400 500 1000 700 50 100 40853 g16 200 800 900 600 150 200 v bat = 3.7v v in = 0v r dio i out 0 3000 4000 5000 80 40853 g17 2000 1000 2500 3500 4500 1500 500 0 20 40 60 100 v fwd (mv) i out (ma) v bat = 3.7v v in = 0v si2333 pfet C50c 0c 50c 100c 0 3000 4000 5000 80 40853 g18 2000 1000 2500 3500 4500 1500 500 0 20 40 60 100 v fwd (mv) i out (ma) v bat = 3.7v v in = 0v si2333 pfet input r on vs temperature battery current and voltage vs time charge current vs temperature (thermal regulation) charging from usb, i bat vs v bat charging from usb, low power, i bat vs v bat ideal diode current vs forward voltage and temperature (no external device) ideal diode resistance and current vs forward voltage (no external device) ideal diode current vs forward voltage and temperature with external device ideal diode resistance and current vs forward voltage with external device t a = 25c unless otherwise noted. typical performance characteristics
LTC4085-3 7 40853f input connect waveforms input disconnect waveforms response to hpwr wall connect waveforms, v in = 0v t a = 25c unless otherwise noted. 1ms/div v in 5v/div v out 5v/div i in 0.5a/div i bat 0.5a/div 40853 g19 v bat = 3.85v i out = 100ma 1ms/div v in 5v/div v out 5v/div i in 0.5a/div i bat 0.5a/div 40853 g20 v bat = 3.85v i out = 100ma 1ms/div wall 5v/div v out 5v/div i wall 0.5a/div i bat 0.5a/div 40851 g23 v bat = 3.85v i out = 100ma r prog = 100k 100s/div hpwr 5v/div i in 0.5a/div i bat 0.5a/div 40853 g21 v bat = 3.85v i out = 50ma 1ms/div wall 5v/div v out 5v/div i wall 0.5a/div i bat 0.5a/div 40853 g22 v bat = 3.85v i out = 100ma r prog = 100k 100s/div susp 5v/div v out 5v/div i in 0.5a/div i bat 0.5a/div 40853 g24 v bat = 3.85v i out = 50ma wall disconnect waveforms, v in = 0v response to suspend typical performance characteristics
LTC4085-3 8 40853f in (pin 1): input supply. connect to usb supply, v bus . input current to this pin is limited to either 20% or 100% of the current programmed by the clprog pin as deter- mined by the state of the hpwr pin. charge current (to bat pin) supplied through the input is set to the current programmed by the prog pin but will be limited by the input current limit if charge current is set greater than the input current limit. out (pin 2): voltage output. this pin is used to provide controlled power to a usb device from either usb v bus (in) or the battery (bat) when the usb is not present. this pin can also be used as an input for battery charging when the usb is not present and a wall adapter is applied to this pin. out should be bypassed with at least 4.7f to gnd. clprog (pin 3): current limit program and input cur- rent monitor. connecting a resistor, r clprog , to ground programs the input to output current limit. the current limit is programmed as follows: i cl (a) = 1000v r clprog in usb applications the resistor r clprog should be set to no less than 2.1k. the voltage on the clprog pin is always proportional to the current ? owing through the in to out power path. this current can be calculated as follows: i in (a) = v clprog r clprog ? 1000 hpwr (pin 4): high power select. this logic input is used to control the input current limit. a voltage greater than 1.2v on the pin will set the input current limit to 100% of the current programmed by the clprog pin. a voltage less than 0.4v on the pin will set the input current limit to 20% of the current programmed by the clprog pin. a 2a pull-down is internally applied to this pin to ensure it is low at power up when the pin is not being driven externally. susp (pin 5): suspend mode input. pulling this pin above 1.2v will disable the power path from in to out. the sup- ply current from in will be reduced to comply with the usb speci? cation for suspend mode. both the ability to charge the battery from out and the ideal diode function (from bat to out) will remain active. suspend mode will reset the charge timer if v out is less than v bat while in suspend mode. if v out is kept greater than v bat , such as when a wall adapter is present, the charge timer will not be reset when the part is put in suspend. a 2a pull-down is internally applied to this pin to ensure it is low at power up when the pin is not being driven externally. timer (pin 6): timer capacitor. placing a capacitor, c timer , to gnd sets the timer period. the timer period is: t timer (hours) = c timer ?r prog ? 3hours 0.1f ? 100k charge time is increased if charge current is reduced due to undervoltage current limit, load current, thermal regulation and current limit selection (hpwr). shorting the timer pin to gnd disables the battery charging functions. pin functions
LTC4085-3 9 40853f wall (pin 7): wall adapter present input. pulling this pin above 4.25v will disconnect the power path from in to out. the acpr pin will also be pulled low to indicate that a wall adapter has been detected. ntc (pin 8): input to the ntc thermistor monitoring circuits. the ntc pin connects to a negative temperature coeffcient thermistor which is typically co-packaged with the battery pack to determine if the battery is too hot or too cold to charge. if the batterys temperature is out of range, charging is paused until the battery temperature re- enters the valid range. a low drift bias resistor is required from v ntc to ntc and a thermistor is required from ntc to ground. if the ntc function is not desired, the ntc pin should be grounded. v ntc (pin 9): output bias voltage for ntc. a resistor from this pin to the ntc pin will bias the ntc thermistor. acpr (pin 10): wall adapter present output. active low open drain output pin. a low on this pin indicates that the wall adapter input comparator has had its input pulled above the input threshold. this feature is disabled if no power is present on in or out or bat (i.e., below uvlo thresholds). chrg (pin 11): open-drain charge status output. when the battery is being charged, the chrg pin is pulled low by an internal n-channel mosfet. when the timer runs out or the charge current drops below 10% of the programmed charge current (while in voltage mode) or the input supply or output supply is removed, the chrg pin is forced to a high impedance state. prog (pin 12): charge current program. connecting a resistor, r prog , to ground programs the battery charge current. the battery charge current is programmed as follows: i chg (a) = 50,000v r prog gate (pin 13): external ideal diode gate pin. this pin can be used to drive the gate of an optional external pfet connected between bat and out. by doing so, the impedance of the ideal diode between bat and out can be reduced. when not in use, this pin should be left ? oating. it is important to maintain a high impedance on this pin and minimize all leakage paths. bat (pin 14): connect to a single cell li-ion battery. this pin is used as an output when charging the battery and as an input when supplying power to out. when the out pin potential drops below the bat pin potential, an ideal diode function connects bat to out and prevents v out from dropping signi? cantly below v bat . a precision internal resistor divider sets the ? nal ? oat (charging) potential on this pin. the internal resistor divider is disconnected when in and out are in undervoltage lockout. exposed pad (pin 15): ground. the exposed package pad is electrical ground and must be soldered to the pc board for proper functionality and rated thermal performance. pin functions
LTC4085-3 10 40853f + C + C + C + C + C + C + C + C + C + C + C + C cc/cv regulator charger enable enable current limit i lim_cntl v bus in soft-start soft-start2 current control 0.25v 2.9v battery uvlo 3.85v recharge timer oscillator counter stop chrg eoc control logic reset hold rechrg bat_uv voltage detect in out bat charge control 100k 100k ntc_enable too c0ld too hot ntc ntcerr gnd susp + C + C 100k 2k out gate bat eda ideal_diode 25mv 25mv clk c/10 i lim cl 1v 1000 500ma/100ma 2a clprog hpwr ta die temp 105c 1v chg prog + C 25mv acpr 4.25v wall v ntc ntc 0.1v 2a 40853 bd 3 4 1 12 7 10 9 8 11 6 2 13 14 i chrg uvlo i in block diagram
LTC4085-3 11 40853f the LTC4085-3 is a complete powerpath controller for battery powered usb applications. the LTC4085-3 is de- signed to receive power from a usb source, a wall adapter, or a battery. it can then deliver power to an application connected to the out pin and a battery connected to the bat pin (assuming that an external supply other than the battery is present). power supplies that have limited cur- rent resources (such as usb v bus supplies) should be connected to the in pin which has a programmable current limit. battery charge current will be adjusted to ensure that the sum of the charge current and load current does not exceed the programmed input current limit. an ideal diode function provides power from the battery when output/load current exceeds the input current limit or when input power is removed. powering the load through the ideal diode instead of connecting the load directly to the battery allows a fully charged battery to remain fully charged until external power is removed. once external power is removed the output drops until the ideal diode is forward biased. the forward biased ideal diode will then provide the output power to the load from the battery. furthermore, powering switching regulator loads from the out pin (rather than directly from the battery) results in shorter battery charge times. this is due to the fact that switching regulators typically require constant input power. when this power is drawn from the out pin voltage (rather than the lower bat pin voltage) the current consumed by the switching regulator is lower leaving more current available to charge the battery. the LTC4085-3 also has the ability to receive power from a wall adapter. wall adapter power can be connected to the output (load side) of the LTC4085-3 through an ex- ternal device such as a power schottky or fet, as shown in figure 1. the LTC4085-3 has the unique ability to use the output, which is powered by the wall adapter, as a path to charge the battery while providing power to the load. a wall adapter comparator on the LTC4085-3 can be con? gured to detect the presence of the wall adapter and shut off the connection to the usb to prevent reverse conduction out to the usb bus. operation
LTC4085-3 12 40853f C + C + 7 wall 4.25v (rising) 3.15v (falling) 75mv (rising) 25mv (falling) 1 2 10 14 in usb v bus wall adapter out bat 40853 f01 current limit control enable chrg control ideal diode li-ion load + C acpr + figure 1: simpli? ed block diagrampowerpath operation
LTC4085-3 13 40853f wall present suspend v in > 3.8v v in > (v out + 100mv) v in > (v bat + 100mv) current limit enabled yxx x x n xyx x x n xxn x x n xxx n x n xxx x n n nny y y y table 1. operating modespowerpath states current limited input power (in to out) battery charger (out to bat) wall present suspend v out > 4.35v v out > (v bat + 100mv) charger enabled xxn x n xxx n n xxyyy ideal diode (bat to out) wall present suspend v in v bat > v out v bat > 2.8v diode enabled xxxxnn xxxnxn xxxyyy operating modespin currents vs programmed currents (powered from in) programming output current battery current input current i cl = i chg i out < i cl i out = i cl = i chg i out > i cl i bat = i cl C i out i bat = 0 i bat = i cl C i out i in = i q + i cl i in = i q + i cl i in = i q + i cl i cl > i chg i out < (i cl C i chg ) i out > (i cl C i chg ) i out = i cl i out > i cl i bat = i chg i bat = i cl C i out i bat = 0 i bat = i cl C i out i in = i q + i chg + i out i in = i q + i cl i in = i q + i cl i in = i q + i cl i cl < i chg i out < i cl i out > i cl i bat = i cl C i out i bat = i cl C i out i in = i q + i cl i in = i q + i cl operation
LTC4085-3 14 40853f usb current limit and charge current control the current limit and charger control circuits of the LTC4085-3 are designed to limit input current as well as control battery charge current as a function of i out . the programmed current limit, i cl, is de? ned as: i cl = 1000 r clprog ?v clprog ? ? ? ? ? ? = 1000v r clprog the programmed battery charge current, i chg , is de? ned as: i chg = 50,000 r prog ?v prog ? ? ? ? ? ? = 50,000v r prog input current, i in , is equal to the sum of the bat pin output current and the out pin output current: i in = i out + i bat the current limiting circuitry in the LTC4085-3 can and should be con? gured to limit current to 500ma for usb applications (selectable using the hpwr pin and pro- grammed using the clprog pin). the LTC4085-3 reduces battery charge current such that the sum of the battery charge current and the load current does not exceed the programmed input current limit (one- ? fth of the programmed input current limit when hpwr is low, see figure 2). the battery charge current goes to zero when load current exceeds the programmed input current limit (one-? fth of the limit when hpwr is low). if the load current is greater than the current limit, the output voltage will drop to just under the battery voltage where the ideal diode circuit will take over and the excess load current will be drawn from the battery. i load (ma) 0 current (ma) 300 400 600 500 i in 400 40853 f02a 200 100 C100 0 100 200 300 600500 i load i bat charging i bat (ideal diode) i load (ma) 0 current (ma) 60 80 120 100 i in 80 40853 f02b 40 20 C20 0 20 40 60 120100 i load i bat charging i bat (ideal diode) i load (ma) 0 current (ma) 300 400 600 500 i in 400 40853 f02c 200 100 C100 0 100 200 300 600500 i load i bat charging i bat (ideal diode) i bat = i chg i bat = i cl C i out (2a) high power mode/full charge r prog = 100k and r clprog = 2k (2b) low power mode/full charge r prog = 100k and r clprog = 2k (2c) high power mode with i cl = 500ma and i chg = 250ma r prog = 100k and r clprog = 2k figure 2: input and battery currents as a function of load current operation
LTC4085-3 15 40853f programming current limit the formula for input current limit is: i cl = 1000 r clprog ?v clprog ? ? ? ? ? ? = 1000v r clprog where v clprog is the clprog pin voltage and r clprog is the total resistance from the clprog pin to ground. for example, if typical 500ma current limit is required, calculate: r clprog = 1v 500ma ? 1000 = 2k in usb applications, the minimum value for r clprog should be 2.1k. this will prevent the application current from exceeding 500ma due to LTC4085-3 tolerances and quiescent currents. a 2.1k clprog resistor will give a typical current limit of 476ma in high power mode (hpwr = 1) or 95ma in low power mode (hpwr = 0). v clprog will track the input current according to the fol- lowing equation: i in = v clprog r clprog ? 1000 for best stability over temperature and time, 1% metal ? lm resistors are recommended. ideal diode from bat to out the LTC4085-3 has an internal ideal diode as well as a controller for an optional external ideal diode. if a battery is the only power supply available or if the load current exceeds the programmed input current limit, then the battery will automatically deliver power to the load via an ideal diode circuit between the bat and out pins. the ideal diode circuit (along with the recommended 4.7f capacitor on the out pin) allows the LTC4085-3 to handle large transient loads and wall adapter or usb v bus con- nect/disconnect scenarios without the need for large bulk capacitors. the ideal diode responds within a few micro- seconds and prevents the out pin voltage from dropping signi? cantly below the bat pin voltage. a comparison of the i-v curve of the ideal diode and a schottky diode can be seen in figure 3. if the input current increases beyond the programmed input current limit additional current will be drawn from the battery via the internal ideal diode. furthermore, if power to in (usb v bus ) or out (external wall adapter) is removed, then all of the application power will be pro- vided by the battery via the ideal diode. a 4.7f capacitor at out is sufficient to keep a transition from input power to battery power from causing significant output voltage droop. the ideal diode consists of a precision amplifier that enables a large p-channel mosfet transistor whenever the voltage at out is approximately 20mv (v fwd ) below the voltage at bat. the resistance of the internal ideal diode is approximately 200m. if this is sufficient for the application then no external components are necessary. however, if more conductance is needed, an external pfet can be added from bat to out. the gate pin of the LTC4085-3 drives the gate of the pfet for automatic ideal diode control. the source of the external pfet should be connected to out and the drain should be connected to bat. in order to help protect the external pfet in over- current situations, it should be placed in close thermal contact to the LTC4085-3. forward voltage (v) (bat-out) current (a) schottky diode slope: 1/r dio(on) i max v fwd 40853 f03 figure 3. LTC4085-3 schottky diode vs forward voltage drop operation
LTC4085-3 16 40853f battery charger the battery charger circuits of the LTC4085-3 are designed for charging single cell lithium-ion batteries. featuring an internal p-channel power mosfet, the charger uses a constant-current/constant-voltage charge algorithm with programmable current and a programmable timer for charge termination. charge current can be programmed up to 1.5a. the ? nal ? oat voltage accuracy is 0.8% typi- cal. no blocking diode or sense resistor is required when powering the in pin. the chrg open-drain status output provides information regarding the charging status of the LTC4085-3 at all times. an ntc input provides the option of charge quali? cation using battery temperature. an internal thermal limit reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 105c. this feature protects the LTC4085-3 from excessive temperature, and allows the user to push the limits of the power handling capabil- ity of a given circuit board without risk of damaging the LTC4085-3. another bene? t of the LTC4085-3 thermal limit is that charge current can be set according to typical, not worst-case, ambient temperatures for a given application with the assurance that the charger will automatically reduce the current in worst-case conditions. the charge cycle begins when the voltage at the out pin rises above the output uvlo level and the battery voltage is below the recharge threshold. no charge current actually ? ows until the out voltage is greater than the output uvlo level and 100mv above the bat voltage. at the beginning of the charge cycle, if the battery voltage is below 2.8v, the charger goes into trickle charge mode to bring the cell voltage up to a safe level for charging. the charger goes into the fast charge constant-current mode once the voltage on the bat pin rises above 2.8v. in constant- current mode, the charge current is set by r prog . when the battery approaches the ? nal ? oat voltage, the charge current begins to decrease as the LTC4085-3 switches to constant-voltage mode. when the charge current drops below 10% of the programmed charge current while in constant-voltage mode the chrg pin assumes a high impedance state. an external capacitor on the timer pin sets the total minimum charge time. when this time elapses the charge cycle terminates and the chrg pin assumes a high impedance state, if it has not already done so. while charging in constant-current mode, if the charge current is decreased by thermal regulation or in order to maintain the programmed input current limit the charge time is automatically increased. in other words, the charge time is extended inversely proportional to charge current de- livered to the battery. for li-ion and similar batteries that require accurate ? nal ? oat potential, the internal bandgap reference, voltage ampli? er and the resistor divider provide regulation with 0.8% accuracy. trickle charge and defective battery detection at the beginning of a charge cycle, if the battery voltage is low (below 2.8v) the charger goes into trickle charge reducing the charge current to 10% of the full-scale cur- rent. if the low battery voltage persists for one quarter of the total charge time, the battery is assumed to be defective, the charge cycle is terminated and the chrg pin output assumes a high impedance state. if for any reason the battery voltage rises above ~2.8v the charge cycle will be restarted. to restart the charge cycle (i.e. when the dead battery is replaced with a discharged battery), simply remove the input voltage and reapply it or cycle the timer pin to 0v. operation
LTC4085-3 17 40853f programming charge current the formula for the battery charge current is: i chg =i prog () ? 50,000 = v prog r prog ? 50,000 where v prog is the prog pin voltage and r prog is the total resistance from the prog pin to ground. keep in mind that when the LTC4085-3 is powered from the in pin, the programmed input current limit takes precedent over the charge current. in such a scenario, the charge current cannot exceed the programmed input current limit. for example, if typical 500ma charge current is required, calculate: r prog = 1v 500ma ? ? ? ? ? ? ? 50,000 = 100k for best stability over temperature and time, 1% metal ? lm resistors are recommended. under trickle charge conditions, this current is reduced to 10% of the full- scale value. the charge timer the programmable charge timer is used to terminate the charge cycle. the timer duration is programmed by an external capacitor at the timer pin. the charge time is typically: t timer (hours)= c timer ?r prog ? 3hours 0.1f ? 100k the timer starts when an input voltage greater than the undervoltage lockout threshold level is applied or when leaving shutdown and the voltage on the battery is less than the recharge threshold. at power up or exiting shutdown with the battery voltage less than the recharge threshold the charge time is a full cycle. if the battery is greater than the recharge threshold the timer will not start and charging is prevented. if after power-up the battery voltage drops below the recharge threshold or if after a charge cycle the battery voltage is still below the recharge threshold the charge time is set to one half of a full cycle. the LTC4085-3 has a feature that extends charge time automatically. charge time is extended if the charge current in constant-current mode is reduced due to load current or thermal regulation. this change in charge time is inversely proportional to the change in charge current. as the LTC4085-3 approaches constant-voltage mode the charge current begins to drop. this change in charge current is due to normal charging operation and does not affect the timer duration. once a time-out occurs and the voltage on the battery is greater than the recharge threshold, the charge current stops, and the chrg output assumes a high impedance state if it has not already done so. connecting the timer pin to ground disables the battery charger. chrg status output pin when the charge cycle starts, the chrg pin is pulled to ground by an internal n-channel mosfet capable of driving an led. when the charge current drops below 10% of the programmed full charge current while in constant-voltage mode, the pin assumes a high impedance state (but charge current continues to ? ow until the charge time elapses). if this state is not reached before the end of the program- mable charge time, the pin will assume a high impedance state when a time-out occurs. the chrg current detection threshold can be calculated by the following equation: i detect = 0.1v r prog ? 50,000 = 5000v r prog operation
LTC4085-3 18 40853f for example, if the full charge current is programmed to 500ma with a 100k prog resistor the chrg pin will change state at a battery charge current of 50ma. note: the end-of-charge (eoc) comparator that moni- tors the charge current latches its decision. therefore, the ? rst time the charge current drops below 10% of the programmed full charge current while in constant-volt- age mode will toggle chrg to a high impedance state. if, for some reason, the charge current rises back above the threshold the chrg pin will not resume the strong pull-down state. the eoc latch can be reset by a recharge cycle (i.e. v bat drops below the recharge threshold) or toggling the input power to the part. current limit undervoltage lockout an internal undervoltage lockout circuit monitors the input voltage and disables the input current limit circuits until v in rises above the undervoltage lockout threshold. the current limit uvlo circuit has a built-in hysteresis of 125mv. furthermore, to protect against reverse current in the power mosfet, the current limit uvlo circuit disables the current limit (i.e. forces the input power path to a high impedance state) if v out exceeds v in . if the current limit uvlo comparator is tripped, the current limit circuits will not come out of shutdown until v out falls 50mv below the v in voltage. charger undervoltage lockout an internal undervoltage lockout circuit monitors the v out voltage and disables the battery charger circuits until v out rises above the undervoltage lockout threshold. the battery charger uvlo circuit has a built-in hysteresis of 125mv. furthermore, to protect against reverse current in the power mosfet, the charger uvlo circuit keeps the charger shut down if v bat exceeds v out . if the charger uvlo comparator is tripped, the charger circuits will not come out of shutdown until v out exceeds v bat by 50mv. suspend the LTC4085-3 can be put in suspend mode by forcing the susp pin greater than 1.2v. in suspend mode the ideal diode function from bat to out is kept alive. if power is applied to the out pin externally (i.e., a wall adapter is present) then charging will be unaffected. current drawn from the in pin is reduced to 50a. suspend mode is intended to comply with the usb power speci? cation mode of the same name. ntc thermistor battery temperature charge quali? cation the battery temperature is measured by placing a nega- tive temperature coef? cient (ntc) thermistor close to the battery pack. the ntc circuitry is shown in figure 4. to use this feature, connect the ntc thermistor (r ntc ) between the ntc pin and ground and a resistor (r nom ) from the ntc pin to vntc. r nom should be a 1% resistor with a value equal to the value of the chosen ntc thermistor at 25c (this value is 10k for a vishay nths0603n02n1002j thermistor). the LTC4085-3 goes into hold mode when the resistance (r hot ) of the ntc thermistor drops to 0.48 times the value of r nom , or approximately 4.8k, which should be at 45c. the hold mode freezes the timer and stops the charge cycle until the thermistor indicates a re- turn to a valid temperature. as the temperature drops, the resistance of the ntc thermistor rises. the LTC4085-3 is designed to go into hold mode when the value of the ntc thermistor increases to 2.82 times the value of r nom . this resistance is r cold . for a vishay nths0603n02n1002j thermistor, this value is 28.2k which corresponds to ap- proximately 0c. the hot and cold comparators each have approximately 2c of hysteresis to prevent oscillation about the trip point. grounding the ntc pin will disable the ntc function. operation
LTC4085-3 19 40853f C + C + r nom 10k r ntc 10k ntc v ntc 9 0.1v ntc_enable 40853 f04a LTC4085-3 too_cold too_hot t7 ntc t7 ntc C + 8 C + C + r nom 124k r ntc 100k r1 24.3k ntc v ntc 9 0.1v ntc_enable 40853 f04b too_cold too_hot t7 ntc t7 ntc C + 8 LTC4085-3 (4a) (4b) figure 4. ntc circuits applications information
LTC4085-3 20 40853f alternate ntc thermistors the LTC4085-3 ntc trip points were designed to work with thermistors whose resistance-temperature charac- teristics follow vishay dales r-t curve 2. the vishay nths0603n02n1002j is an example of such a thermis- tor. however, vishay dale has many thermistor products that follow the r-t curve 2 characteristic in a variety of sizes. furthermore, any thermistor whose ratio of r cold to r hot is about 6.0 will also work (vishay dale r-t curve 2 shows a ratio of 2.816/0.4839 = 5.82). power conscious designs may want to use thermistors whose room temperature value is greater than 10k. vishay dale has a number of values of thermistor from 10k to 100k that follow the r-t curve 1. using these as indicated in the ntc thermistor section will give temperature trip points of approximately 3c and 42c, a delta of 39c. this delta in temperature can be moved in either direc- tion by changing the value of r nom with respect to r ntc . increasing r nom will move both trip points to lower temperatures. likewise, a decrease in r nom with respect to r ntc will move the trip points to higher temperatures. to calculate r nom for a shift to lower temperature, for example, use the following equation: r nom = r cold 2.816 ?r ntc at 25c where r cold is the resistance ratio of r ntc at the desired cold temperature trip point. to shift the trip points to higher temperatures use the following equation: r nom = r hot 0.484 ?r ntc at 25c where r hot is the resistance ratio of r ntc at the desired hot temperature trip point. the following example uses a 100k r-t curve 1 thermistor from vishay dale. the difference between the trip points is 39c, from beforeand the desired cold trip point of 0c, would put the hot trip point at about 39c. the r nom needed is calculated as follows: r nom = r cold 2.816 ?r ntc at 25c = 3.266 2.816 ? 100k = 116k the nearest 1% value for r nom is 115k. this is the value used to bias the ntc thermistor to get cold and hot trip points of approximately 0c and 39c, respectively. to extend the delta between the cold and hot trip points, a resistor (r1) can be added in series with r ntc (see figure 4). the values of the resistors are calculated as follows: r nom = r cold C r hot 2.816 C 0.484 r1= 0.484 2.816 C 0.484 ? ? ? ? ? ? ?r cold Cr hot [] Cr hot where r nom is the value of the bias resistor, r hot and r cold are the values of r ntc at the desired temperature trip points. continuing the forementioned example with a desired hot trip point of 50c: r nom = r cold Cr hot 2.816 C 0.484 = 100k ?(3.266 C 0.3602) 2.816C 0.484 = 124.6k,124k nearest 1% r1= 100k ? 0.484 2.816C 0.484 ? ? ? ? ? ? ? 3.266 C 0.3602 () C 0.3602 ? ? ? ? ? ? ? ? ? ? = 24.3k applications information
LTC4085-3 21 40853f the ? nal solution is shown in figure 4, where r nom = 124k, r1 = 24.3k and r ntc = 100k at 25c using the wall pin to detect the presence of a wall adapter the wall input pin identi? es the presence of a wall adapter (the pin should be tied directly to the adapter output voltage). this information is used to disconnect the input pin, in, from the out pin in order to prevent back conduction to whatever may be connected to the input. it also forces the acpr pin low when the voltage at the wall pin exceeds the input threshold. in order for the presence of a wall adapter to be acknowledged, both of the following conditions must be satis? ed: 1. the wall pin voltage exceeds v war (approximately 4.25v); and 2. the wall pin voltage exceeds v wdr (approximately 75mv above v bat ) the input power path (between in and out) is re-enabled and the acpr pin assumes a high impedance state when either of the following conditions is met: 1. the wall pin voltage falls below v wdf (approximately 25mv above v bat ); or 2. the wall pin voltage falls below v waf (approximately 3.12v) each of these thresholds is suitably ? ltered in time to prevent transient glitches on the wall pin from falsely triggering an event. power dissipation the conditions that cause the LTC4085-3 to reduce charge current due to the thermal protection feedback can be approximated by considering the power dissipated in the part. for high charge currents and a wall adapter applied to v out , the LTC4085-3 power dissipation is approximately: p d = (v out C v bat ) ? i bat where, p d is the power dissipated, v out is the supply voltage, v bat is the battery voltage, and i bat is the battery charge current. it is not necessary to perform any worst- case power dissipation scenarios because the LTC4085-3 will automatically reduce the charge current to maintain the die temperature at approximately 105c. however, the approximate ambient temperature at which the thermal feedback begins to protect the ic is: t a = 105c C p d ? ja t a = 105c C (v out C v bat ) ? i bat ? ja example: consider an LTC4085-3 operating from a wall adapter with 5v at v out providing 0.8a to a 3v li-ion battery. the ambient temperature above which the LTC4085-3 will begin to reduce the 0.8a charge current, is approximately t a = 105c C (5v C 3v) ? 0.8a ? 43c/w t a = 105c C 1.6w ? 43c/w = 105c C 69c = 36c applications information
LTC4085-3 22 40853f the LTC4085-3 can be used above 36c, but the charge current will be reduced below 0.8a. the charge current at a given ambient temperature can be approximated by: i bat = 105c C t a v out Cv bat () ? ja consider the above example with an ambient temperature of 55c. the charge current will be reduced to approxi- mately: i bat = 105c C 55c 5v C 3v () ? 43c/w = 50c 86c/a = 0.58a board layout considerations in order to be able to deliver maximum charge current under all conditions, it is critical that the exposed pad on the backside of the LTC4085-3 package is soldered to the board. correctly soldered to a 2500mm 2 double-sided 1oz. copper board the LTC4085-3 has a thermal resistance of approximately 43c/w. failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 43c/w. as an example, a correctly soldered LTC4085-3 can deliver over 1a to a battery from a 5v supply at room temperature. without a backside thermal connection, this number could drop to less than 500ma. v in and wall adapter bypass capacitor many types of capacitors can be used for input bypassing. however, caution must be exercised when using multilayer ceramic capacitors. because of the self resonant and high q characteristics of some types of ceramic capacitors, high voltage transients can be generated under some start-up conditions, such as connecting the charger input to a hot power source. for more information, refer to application note 88. stability the constant-voltage mode feedback loop is stable without any compensation when a battery is connected. however, a 4.7f capacitor with a 1 series resistor to gnd is recommended at the bat pin to keep ripple voltage low when the battery is disconnected. applications information
LTC4085-3 23 40853f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. de package 14-lead plastic dfn (4mm 3mm) (reference ltc dwg # 05-08-1708 rev b) 3.00 0.10 (2 sides) 4.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wged-3) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom viewexposed pad 1.70 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 3.00 ref 1.70 0.05 1 7 14 8 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (de14) dfn 0806 rev b pin 1 notch r = 0.20 or 0.35 45 chamfer 3.00 ref recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 2.20 0.05 0.70 0.05 3.60 0.05 package outline 0.25 0.05 0.25 0.05 0.50 bsc 3.30 0.05 3.30 0.10 0.50 bsc package description
LTC4085-3 24 40853f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2011 lt 0211 ? printed in usa related parts typical application part number description comments battery chargers ltc4065/ltc4065a standalone li-ion battery chargers in 2 2 dfn 4.2v, 0.6% float voltage, up to 750ma charge current, 2mm 2mm dfn, a version has acpr function. ltc4095 standalone lsb li-ion polymer battery charger 2mm 2mm dfn 950a charge current, timer termination +c/10 detection output, 4.2v 0.6% accurate float voltage 4 chrg pin indicator states power management ltc3455 dual dc/dc converter with usb power manager and li-ion battery charger seamless transition between power souces: usb, wall adapter and battery; 95% ef? cient dc/dc conversion ltc4055 usb power controller and battery charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode, 4mm 4mm qfn16 package ltc4066 usb power controller and battery charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 50m ideal diode, 4mm 4mm qfn24 package ltc4085 usb power manager with ideal diode controller and li-ion charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, 4mm 3mm dfn14 package ltc4089/ltc4089-1/ ltc4089-5 high voltage usb power manager with ideal diode controller and high ef? ciency li-ion battery charger high ef? ciency 1.2a charger from 6v to 36v (40v max) input charges single cell li-ion batteries directly from a usb port, thermal regulation; 200m ideal diode with <50m option, 3mm 4mm dfn-14 package, bat-track? adaptive output control (ltc4089/-1); fixed 5v output (ltc4089-5) -1 for 4.1v float voltage batteries ltc4090 high voltage usb power manager with ideal diode controller and high ef? ciency li-ion battery charger high ef? ciency 1.2a charger from 6v to 36v (60v max) input charges single cell li-ion batteries directly from a usb port, thermal regulation; 200m ideal diode with <50m option, 3mm 4mm dfn-14 package, bat-track adaptive output control ltc4411/ltc4412 low loss powerpath controller in thinsot automatic switching between dc sources, load sharing, replaces oring diodes usb power control application with wall adapter input in susp hpwr suspend usb power 500ma/100ma select out prog LTC4085-3 clprog gnd bat gate v ntc ntc li-ion cell to ldos regs, etc chrg acpr wall timer 0.15f 40853 ta02 r ntcbias 10k r ntc 10k 510 r prog 71.5k *series 1 resistor only needed for inductive input supplies r clprog 2.1k + 4.7f 4.7f 510 1k 5v wall adapter input 5v (nom) from usb cable v bus 1* 4.7f 1*

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