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  GM8164 goldtel micro-electronics i/o extension 4 - 1 1 introduction 1.1 g eneral d escription GM8164 is a static s ynchronous ly serial-input parallel-output or a synchronous ly parallel-input serial-output register, which mainly is for i/os extension and completes the following functions: - serial-in/parallel-out , latch output - parallel- in/serial-out 1.2 f eatures - provides 32 input pins and 40 output pins - provides 8 open-drain output pins - fully synchronous data transfers - typical shift frequency 1mhz - very low power consumption, 13 a at 3.3v ,1mhz - very low quiescent current, 3 a at 3.3v - 2.7v ~ 5.6v operating voltage range - expandable for n-bit i/o applications - serial-in/parallel-out , parallel- in/serial-out register pin function - GM8164jn: 40 bit output, 32 bit input GM8164qp: 38 bit output, 32 bit input 1.3 application - i/o expansion - serial input / parallel output - parallel input / serial output - shift right register - shift right with parallel loading - address register - buffer register - bus system register with enable parallel lines at bus side 1.4 description the GM8164 is a cmos device, a static eight-stage serial-in, parallel-out and parallel-in, serial-out register, it can be used to: _ convert serial data to parallel form and direct the parallel data to either of five buses. _ store parallel data. _ accept parallel data from either of five buses and convert that data to serial form. _ i/o inputs that control the operations include a single-phase clock (clk), data latch enable (le), data out enable(oc) , and paral lel/serial (i/o). _ expand to hundreds i/o ports. both the shift and storage clocks are positive-edge triggered. data inputs include 40 parallel data lines of which the eight o 0-o 7 data lines are inputs (open drain outputs) and o 8-o 39 data lines are inputs (outputs) depending on the signal level on the i/o input. all register stages are d-type master-slave flip-flops allowing synchronous or asynchronous data transfer from master to slave. isolation from external noise and the effects of loading is provided by output buffering. 2 specifications
GM8164 goldtel micro-electroni cs i/o extension 4 - 2 2.1 p in c onfiguration 2.1.1 pin out plcc- 84 qfp-80 2.1.2 pins t able GM8164qp GM8164jn i 0 ~ i 31 : i 0 ~ i 31 : i nput port of asynchronous parallel data (including schemitt t rigger ) o 0 ~ o 37 : o 0 ~ o 39 : p arallel data output (o 0 ~o 7 are oc output, input max high voltage 15v) din : din : synchronization serial data input port douta(16 bits) : synchronization serial data output port doutb(32 bits) : synchronization serial data output port doutc (38 bits) doutc(40 bits) : synchronization serial data output port clk : clk : c lock input port i/o : i/o : s erial/parallel data input enable port le : le : o 0 ~o 39 parallel data output l atch controller oc : oc : o 0 ~o 39 parallel data output enable controller v cc : v cc : p ower supply gnd : gnd : g round
GM8164 goldtel micro-electronics i/o extension 4 - 3 2.1.3 truth table register input-levels andresulting register operation oc le i/o clk function describe 0 0 0 ? synchronization serial-in/serial-out, register translocation. input port is in the state of high- impedance resistor , output data will not change 0 0 0 none data from neither internal register nor output port will change, input port is in the state of high-impedance state 0 0 1 ? 0 0 1 none data from input port enter the internal register, output data will not change, internal register translocation is incapable 0 1 0 ? s ynchronization serial-in/serial-out, input port is in the state of high-impedance state , register shifts and exports data to the output port 0 1 0 none input port is in the state of high-impedance state , data from neither internal register nor output port will be changed 0 1 1 ? 0 1 1 none data from input port enter the internal register, but can ? t shift. data export from output port. 1 0 0 ? s ynchronization serial-in/serial-out, internal register translocation , both input port and output port is in the state of high-impedance state 1 0 0 none both input port and output port is in the state of high- impedance state , data in internal register will not change 1 0 1 ? 1 0 1 none data from input port enter the internal register, but can ? t shift. output port is in the state of high-impedance state 1 1 0 ? s ynchronization serial-in/serial-out, internal register translocation , both input port and output port is in the state of high-impedance state 1 1 0 none both input port and output port is in the state of high- impedance state , data in internal register will not change 1 1 1 ? 1 1 1 none data from input port enter the internal register, but can ? t shift. output port is in the state of high-impedance state
GM8164 goldtel micro-electronics i/o extension 4 - 4 2.2 absolute maximum ratings symbol parameter rating units v cc supply voltage -0.5 to + 7 ? v i voltage on in put pin s -0.5 to ? cc + 0.5 ? v o voltage on output pin s -0.5 to ? cc + 0.5 ? i o short circuit output current 25 ma t stg storage temperature -65 to 150 ?? t a operating temperature -40 to 85 ?? 2.3 recommended operating conditions symbol p arameter min m ax unit v cc supply v oltage 2 6 ? v i input voltage 0 v cc ? v o output voltage 0 v cc ? t a operating temperature -25 +85 ?? t r t f ascending ,descendi ng time ? v cc =5 v? 0 500 ns 2.4 dc characteristics -40 ?? +85 ?? parameter test condition v cc (v) min max unit 2 1.5 v high-level input voltage v ih 6 4.2 v 2 0.3 v low-level input voltage v il 6 1.2 v i o =-20 ? 2 1.9 v output high-level voltage v oh v i = v ih or v il i o =-5.2 ma 6 5.9 v i o =20 ? 2 0.1 v output low-level voltage v ol v i = v ih or v i l i o =5.2 ma 6 0.37 v input current i i v i = v cc or ground 6 ? 1 ? static current i cc v i = v cc or ground i o = 0 6 80 ? 3 application example please see ? an8164.pdf ? for details. 4 packaging information
80-pin plastic qfp (14x20) note each lead centerline is located within 0.15 mm of its true position (t.p.) at maximum material condition. item millimeters a b d g 24.7 0.4 20.0 0.2 0.15 0.8 i 18.7 0.4 j p80g-80-1c-3 c 14.0 0.2 h 0.35 0.10 0.8 (t.p.) k 2.35 0.2 1.2 0.2l f 1.0 n p q 0.15 2.05 0.1 0.1 s 2.45 max. m 0.15 + 0.10 - 0.05 r3 + 7 - 3 s sn j detail of lead end r k m l p i s q g f m h 64 65 40 80 1 25 24 41 cd a b


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