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1 ltc1458/ltc1458l quad 12-bit rail-to-rail micropower dacs daisy-chained control outputs the ltc ? 1458/ltc1458l are complete single supply, quad rail-to-rail voltage output, 12-bit digital-to-analog converters (dacs) in so-28 and ssop-28 packages. they include an output buffer amplifier with variable gain ( 1 or 2) and an easy-to-use 3-wire cascadable serial interface. the ltc1458 has an onboard reference of 2.048v and a full-scale output of 4.095v in a 2 gain configuration. it operates from a single 4.5v to 5.5v supply dissipating only 5.5mw (i cc = 1.1ma typ). the ltc1458l has an onboard 1.22v reference and a full- scale output of 2.5v in a 2 gain configuration. it operates from a single supply of 2.7v to 5.5v dissipating 2.4mw. excellent dnl, low supply current and a wide range of built-in functions allow these parts to be used in a host of applications when flexibility, power and single supply operation are important. n quad 12-bit dac n buffered true rail-to-rail voltage output n maximum dnl error: 0.5lsb n 5v operation, i cc : 1.1ma typ (ltc1458) n 3v operation, i cc : 800 m a typ (ltc1458l) n internal or external reference operation n settling time: 14 m s to 0.5lsb n schmitt trigger on clock input allows direct optocoupler interface n power-on reset and clr pin n ssop-28 package n 3-wire cascadable serial interface with 250khz update rate n low cost functional block diagram: quad 12-bit rail-to-rail dac differential nonlinearity vs input code n digital calibration n industrial process control n automatic test equipment n low power systems 1458 bd01 48-bit shift register and dac register clk d in 5v (ltc1458) 3v to 5v (ltc1458l) 2.048v (ltc1458) 1.22v (ltc1458l) refhi c refout v out c v cc reflo c x1/x2 c x1/x2 d x1/x2 a x1/x2 b refhi d v out d reflo d refhi b from m p v out b reflo b refhi a v out a reflo a d out cs/ld clr dac d dac c dac b dac a code 0 dnl (lsb) 0.5 0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 0.5 1024 2048 2560 1458 g09 512 1536 3072 3584 4095 descriptio u features applicatio s u typical applicatio u , ltc and lt are registered trademarks of linear technology corporation.
2 ltc1458/ltc1458l (note 1) v cc to gnd .............................................. C 0.5v to 7.5v logic inputs to gnd ................................ C 0.5v to 7.5v v out a , v out b , v out c , v out d , x1/x2 a , x1/x2 b, x1/x2 c, x1/x2 d ......................................... C 0.5v to v cc + 0.5v refhi a , refhi b, refhi c, refhi d, reflo a , reflo b, reflo c, reflo d ........................................ C 0.5v to v cc + 0.5v maximum junction temperature ......................... 125 c operating temperature range ltc1458c/ltc1458lc ............................ 0 c to 70 c ltc1458i/ltc1458li ........................ C 40 c to 85 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c order part number the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = t min to t max . v cc = 4.5v to 5.5v (ltc1458), 2.7v to 5.5v (ltc1458l), x1/x2 = reflo = gnd, refhi = refout, v out unloaded, unless otherwise noted. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 top view g package 28-lead plastic ssop 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v cc x1/x2 b v out b clr refhi b gnd reflo b reflo a refhi a refout nc v out a x1/x2 a v cc x1/x2 c v out c cs/ld d in refhi c gnd reflo c reflo d refhi d d out clk nc v out d x1/x2 d sw package 28-lead plastic so t jmax = 125 c, q ja = 100 c/w (g) t jmax = 125 c, q ja = 150 c/w (sw) ltc1458cg ltc1458csw ltc1458lcg ltc1458lcsw ltc1458ig ltc1458isw LTC1458LIG ltc1458lisw consult factory for military grade parts. symbol parameter conditions min typ max units dac resolution l 12 bits dnl differential nonlinearity guaranteed monotonic (note 2) l 0.5 lsb inl integral nonlinearity t a = 25 c 1.75 4.0 lsb (note 2) l 2.25 4.5 lsb v os offset error t a = 25 c 3.0 12 mv l 6.0 18 mv v os tc offset error temperature 15 m v/ c coefficient v fs full-scale voltage when using internal reference, ltc1458, t a = 25 c 4.065 4.095 4.125 v ltc1458 l 4.045 4.095 4.145 v when using internal reference, ltc1458l, t a = 25 c 2.470 2.500 2.530 v ltc1458l l 2.460 2.500 2.540 v v fs tc full-scale voltage when using internal reference 24 ppm/ c temperature coefficient reference reference output voltage ltc1458 l 2.008 2.048 2.088 v ltc1458l l 1.195 1.220 1.245 v reference output 20 ppm/ c temperature coefficient reference line regulation l 0.7 2.0 lsb/v reference load regulation 0 i out 100 m a, ltc1458 l 0.2 1.5 lsb ltc1458l l 0.6 3.0 lsb reference input range v refhi v cc C 1.5v v cc /2 v reference input resistance l 15 24 40 k w electrical characteristics absolute axi u rati gs w ww u package/order i for atio uu w
3 ltc1458/ltc1458l electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = t min to t max . v cc = 4.5v to 5.5v (ltc1458), 2.7v to 5.5v (ltc1458l), x1/x2 = reflo = gnd, refhi = refout, v out unloaded, unless otherwise noted. symbol parameter conditions min typ max units reference input capacitance 15 pf short-circuit current refout shorted to gnd l 45 120 ma power supply v cc positive supply voltage for specified performance, ltc1458 l 4.5 5.5 v ltc1458l l 2.7 5.5 v i cc supply current 4.5v v cc 5.5v (note 5) , ltc1458 l 1100 2400 m a 2.7v v cc 5.5v (note 5), ltc1458l l 800 2000 m a op amp dc performance short-circuit current low v out shorted to gnd l 60 120 ma short-circuit current high v out shorted to v cc l 70 120 ma output impedance to gnd input code = 0 l 40 160 w ac performance voltage output slew rate (note 3) l 0.5 1.0 v/ m s voltage output settling time (notes 3, 4) to 0.5lsb 14 m s digital feedthrough 0.3 nv ? s ac feedthrough refhi = 1khz, 2v p-p , (code: all 0s) C 95 db sinad signal-to-noise + distortion refhi = 1khz, 2v p-p , (code: all 1s) 85 db the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = t min to t max . v cc = 5v (ltc1458), 3v (ltc1458l), unless otherwise noted. ltc1458 ltc1458l symbol parameter conditions min typ max min typ max units digital i/o v ih digital input high voltage l 2.4 2.0 v v il digital input low voltage l 0.8 0.6 v v oh digital output high voltage i out = C 1ma l v cc C 1.0 v cc C 0.7 v v ol digital output low voltage i out = 1ma l 0.4 0.4 v i leak digital input leakage v in = gnd to v cc l 10 10 m a c in digital input capacitance guaranteed by design, l 10 10 pf not subject to test switching t 1 d in valid to clk setup l 40 60 ns t 2 d in valid to clk hold l 00ns t 3 clk high time l 40 60 ns t 4 clk low time l 40 60 ns t 5 cs/ld pulse width l 50 80 ns t 6 lsb clk to cs/ld l 40 60 ns t 7 cs/ld low to clk l 20 30 ns t 8 d out output delay c load = 15pf l 150 220 ns t 9 clk low to cs/ld low l 20 30 ns
4 ltc1458/ltc1458l note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: nonlinearity is defined from the first code that is greater than or equal to the maximum offset specification to code 4095 (full scale). note 3: load is 5k w in parallel with 100pf. note 4: dac switched between all 1s and the code corresponding to v os for the part. note 5: digital inputs at 0v or v cc . ltc1458 integral nonlinearity (inl) ltc1458 differential nonlinearity (dnl) code 0 dnl (lsb) 0.5 0.4 0.3 0.2 0.1 0 0.1 0.2 0.3 0.4 0.5 1024 2048 2560 1458 g09 512 1536 3072 3584 4095 code 0 inl error (lsb) 2.0 1.6 1.2 0.8 0.4 0 0.4 0.8 1.2 1.6 2.0 1024 2048 2560 1458 g08 512 1536 3072 3584 4095 minimum supply headroom for full output swing vs load current load current (ma) v cc ?v out (v) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1458 g03 0 ? v out < 1lsb reflo = gnd x1/x2 = gnd code: all 1's v out = 4.095v 5 10 15 20 25 30 minimum output voltage vs output sink current output swing vs load resistance load resistance ( w ) 10 output swing (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100 1k 10k 1458 g05a r l reflo = gnd x1/x2 = gnd dac code = fff h load resistance ( w ) 10 output swing (v) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 100 1k 10k 1458 g06a reflo = gnd x1/x2 = gnd dac code = ooo h r l v cc output sink current (ma) output pull-down voltage (mv) 1000 900 800 700 600 500 400 300 200 100 0.1 1458 g04 0 reflo = gnd x1/x2 = gnd 125 c ?5 c 25 c 5 10 15 20 25 30 output swing vs load resistance electrical characteristics typical perfor a ce characteristics uw
5 ltc1458/ltc1458l temperature ( c) ?5 sfull-scale voltage (v) ?5 5 1458 g06 95 125 4.110 4.105 4.100 4.095 4.090 4.085 4.080 35 65 ltc1458 full-scale voltage vs temperature temperature ( c) ?5 offset voltage (mv) ?5 5 1458 g07 95 125 5 4 3 2 1 0 ? ? ? ? ? 35 65 ltc1458 offset voltage vs temperature temperature ( c) ?5 supply current ( m a) ?5 5 1458 g05 95 125 950 940 930 920 910 900 890 880 870 860 850 35 65 v cc = 5.5v v cc = 5v v cc = 4.5v ltc1458 supply current vs temperature x1/x2 c, x1/x2 d,x1/x2 a, x1/x2 b (pins 1, 14, 16, 27): the input pin that sets the gain for dac c/d/a/b. when grounded the gain will be 2, i.e., output full-scale will be 2 ? refhi. when connected to v out the gain will be 1, i.e., output full-scale will be equal to refhi. v out c , v out d , v out a , v out b (pins 2, 13, 17, 26): the buffered dac outputs. cs/ld (pin 3): the serial interface enable and load control input. d in (pin 4): the serial data input. refhi c, refhi d, refhi a, refhi b,(pins 5, 9, 20, 24): the inputs to the dac resistor ladder for dac c/d/a/b. gnd (pins 6, 23): ground. reflo c, reflo d, reflo a, reflo b, (pins 7, 8, 21, 22): the bottom of the dac resistor ladders for the dacs. these can be used to offset zero-scale above ground. reflo should be connected to ground when no offset is required. d out (pin 10): the output of the shift register which becomes valid on the rising edge of the serial clock. clk (pin 11): the serial interface clock input. v cc (pins 15, 28): the positive supply input. 4.5v v cc 5.5v (ltc1458), 2.7v v cc 5.5v (ltc1458l). re- quires a 0.1 m f bypass capacitor to ground. refout (pin 19): the output of the internal reference. clr (pin 25): the clear pin. clears all dacs to zero-scale when pulled low. typical perfor a ce characteristics uw uu u pi fu ctio s
6 ltc1458/ltc1458l 12-bit dac c register 12-bit dac b register 48-bit shift register 3 4 5 6 27 26 25 24 23 22 21 20 19 18 17 16 15 dac b dac c 12-bit dac d register ld 12-bit dac a register dac a dac d ltc1458: 2.048v ltc1458l: 1.22v power-on reset x1/x2 c v out c cs/ld d in refhi c gnd reflo c reflo d refhi d d out clk nc v out d x1/x2 d v cc x1/x2 b v out b clr refhi b gnd reflo b reflo a refhi a refout nc v out a x1/x2 a v cc 1 2 7 8 9 10 11 12 13 14 28 refhi reflo v out x1/x2 + 1458 bd ld ld ld block diagra w
7 ltc1458/ltc1458l b11 a msb b11 c msb b0 b lsb t 1 t 6 b0 d lsb b11 a current word t 7 t 2 t 9 t 4 t 3 t 8 clk d in d out cs/ld t 5 1458 td b0 d previous word b11 a previous word b10 a previous word b0 b previous word b11 c previous word b0 d previous word resolution (n): resolution is defined as the number of digital input bits, n. it defines the number of dac output states (2 n ) that divide the full-scale range. the resolution does not imply linearity. full-scale voltage (v fs ): this is the output of the dac when all bits are set to 1. voltage offset error (v os ): the theoretical voltage at the output when the dac is loaded with all zeros. the output amplifier can have a true negative offset, but because the part is operated from a single supply, the output cannot go below zero. if the offset is negative, the output will remain near 0v resulting in the transfer curve shown in figure 1. dac code 1458 f01 output voltage negative offset 0v figure 1. effect of negative offset the offset of the part is measured at the code that corre- sponds to the maximum offset specification: v os = v out C [(code)(v fs )/(2 n C 1)] least significant bit (lsb): one lsb is the ideal voltage difference between two successive codes. lsb = (v fs C v os )/(2 n C 1) = (v fs C v os )/4095 nominal lsbs: ltc1458 lsb = 4.095v/4095 = 1mv ltc1458l lsb = 2.5v/4095 = 0.610mv integral nonlinearity (inl): end-point inl is the maxi- mum deviation from a straight line passing through the end-points of the dac transfer curve. because the part operates from a single supply and the output cannot go below zero, the linearity is measured between full scale and the code corresponding to the maximum offset specification. the inl error at a given input code is calculated as follows: inl = [v out C v os C (v fs C v os )(code/4095)]/lsb v out = the output voltage of the dac measured at the given input code ti i g diagra u ww defi itio s uu
8 ltc1458/ltc1458l serial interface the data on the d in input is loaded into the shift register on the rising edge of the clock. data is loaded as one 48-bit word, dac a first, then dac b, dac c and dac d. the msb is loaded first for each dac. the dac registers load the data from the shift register when cs/ld is pulled high. the clk is disabled internally when cs/ld is high. note: clk must be low before cs/ld is pulled low to avoid an extra internal clock pulse. the buffered output of the 48-bit shift register is available on the d out pin which swings from ground to v cc . multiple ltc1458/ltc1458ls may be daisy-chained to- gether by connecting the d out pin to the d in pin of the next chip, while the clk and cs/ld signals remain common to all chips in the daisy-chain. the serial data is clocked to all of the chips, then the cs/ld signal is pulled high to update all of them simultaneously. reference the ltc1458l has an internal reference of 1.22v with a full scale of 2.5v (gain of 2 configuration). the ltc1458 includes an internal 2.048v reference, making 1lsb equal to 1mv (gain of 2 configuration). when the buffer gain is 2, the external reference must be less than v cc /2 and be capable of driving the 15k minimum dac resistor ladder. the external reference must always be less than v cc C 1.5v. the reference output voltage noise spectral density at 1khz is 300nv/ ? hz. voltage output the rail-to-rail buffered output of the ltc1458 family can source or sink 5ma when operating with a 5v supply over the entire operating temperature range while pulling to within 300mv of the positive supply voltage or ground. the output swings to within a few millivolts of either supply rail when unloaded and has an equivalent output resistance of 40 w when driving a load to the rails. the output can drive 1000pf without going into oscillation. the output voltage noise spectral density at 1khz is 600nv/ ? hz. differential nonlinearity (dnl): dnl is the difference between the measured change and the ideal 1lsb change between any two adjacent codes. the dnl error between any two codes is calculated as follows: dnl = ( d v out C lsb)/lsb d v out = the measured voltage difference between two adjacent codes digital feedthrough: the glitch that appears at the analog output caused by ac coupling from the digital inputs when they change state. the area of the glitch is specified in (nv)(sec). defi itio s uu operatio u
9 ltc1458/ltc1458l using two dacs to digitally program the full scale and offset of a third figure 2 shows how to use one ltc1458 to make a 12-bit dac with a digitally programmable full scale and offset. dac a and dac b are used to control the offset and full scale of dac c. dac a is connected in a 1 configuration and controls the offset of dac c by moving reflo c above ground. the minimum value to which this offset can be programmed is 10mv. dac b is connected in a 2 configuration and controls the full scale of dac c by driving refhi c. note that the voltage at refhi c must be less than or equal to v cc /2, corresponding to dac bs code 2,500 for v cc = 5v, since dac c is being operated in 2 mode for full rail-to-rail output swing. the transfer characteristic is: v outc = 2 ? [d c ? (2 ? d b C d a ) + d a ] ? refout where refout = the reference output d a = (dac a digital code)/4096 this sets the offset. d b = (dac b digital code)/4096 this sets the full scale. d c = (dac c digital code)/4096 v cc x1/x2 b v out b clr refhi b gnd reflo b reflo a refhi a refout nc v out a x1/x2 a v cc x1/x2 c v out c cs/ld d in refhi c gnd reflo c reflo d refhi d d out clk nc v out d x1/x2 d ltc1458 ltc1458l 0.1 m f v out 5v 1458 f02 500 w figure 2 applicatio s i for atio wu uu
10 ltc1458/ltc1458l package descriptio n u dimensions in inches (millimeters) unless otherwise noted. g package 28-lead plastic ssop (0.209) (ltc dwg # 05-08-1640) g28 ssop 1098 0.13 ?0.22 (0.005 ?0.009) 0 ?8 0.55 ?0.95 (0.022 ?0.037) 5.20 ?5.38** (0.205 ?0.212) 7.65 ?7.90 (0.301 ?0.311) 1234 5 6 7 8 9 10 11 12 14 13 10.07 ?10.33* (0.397 ?0.407) 25 26 22 21 20 19 18 17 16 15 23 24 27 28 1.73 ?1.99 (0.068 ?0.078) 0.05 ?0.21 (0.002 ?0.008) 0.65 (0.0256) bsc 0.25 ?0.38 (0.010 ?0.015) note: dimensions are in millimeters dimensions do not include mold flash. mold flash shall not exceed 0.152mm (0.006") per side dimensions do not include interlead flash. interlead flash shall not exceed 0.254mm (0.010") per side * **
11 ltc1458/ltc1458l package descriptio n u dimensions in inches (millimeters) unless otherwise noted. sw package 28-lead plastic small outline (wide 0.300) (ltc dwg # 05-08-1620) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. s28 (wide) 1098 0 ?8 typ note 1 0.009 ?0.013 (0.229 ?0.330) 0.016 ?0.050 (0.406 ?1.270) 0.291 ?0.299** (7.391 ?7.595) 45 0.010 ?0.029 (0.254 ?0.737) 0.037 ?0.045 (0.940 ?1.143) 0.004 ?0.012 (0.102 ?0.305) 0.093 ?0.104 (2.362 ?2.642) 0.050 (1.270) bsc 0.014 ?0.019 (0.356 ?0.482) typ note 1 0.697 ?0.712* (17.70 ?18.08) 1 23 4 5 6 78 0.394 ?0.419 (10.007 ?10.643) 910 25 26 11 12 22 21 20 19 18 17 16 15 23 24 14 13 27 28 note: 1. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
12 ltc1458/ltc1458l ? linear technology corporation 1996 14588lfa lt/lcg 0700 2k rev a ? printed in usa related parts part number description comments ltc1257 single 12-bit v out dac, full scale: 2.048v, v cc : 4.75v to 15.75v, 5v to 15v single supply, complete v out dac in reference can be overdriven up to 12v, i.e., fs max = 12v so-8 package ltc1446/ltc1446l dual 12-bit rail-to-rail output dacs in so-8 package ltc1446: v cc = 4.5v to 5.5v, v out = 0v to 4.095v ltc1446l: v cc = 2.7v to 5.5v, v out = 0v to 2.5v ltc1450/ltc1450l single 12-bit rail-to-rail output dacs with parallel interface ltc1450: v cc = 4.5v to 5.5v, v out = 0v to 4.095v ltc1450l: v cc = 2.7v to 5.5v, v out = 0v to 2.5v ltc1451 single rail-to-rail 12-bit dac, full scale: 4.095v, v cc : 4.5v to 5.5v low power, complete v out dac in so-8 package ltc1452 single rail-to-rail 12-bit v out multiplying dac, v cc : 2.7v to 5.5v low power, multiplying v out dac with rail-to-rail buffer amplifier in so-8 package ltc1453 single rail-to-rail 12-bit v out dac, full scale: 2.5v, v cc : 2.7v to 5.5v 3v, low power, complete v out dac in so-8 package ltc1454/ltc1454l dual 12-bit v out dacs in so-16 package with added functionality ltc1454: v cc = 4.5v to 5.5v, v out = 0v to 4.095v ltc1454l: v cc = 2.7v to 5.5v, v out = 0v to 2.5v ltc1456 single rail-to-rail output 12-bit dac with clear pin, low power, complete v out dac in so-8 package full scale: 4.095v, v cc : 4.5v to 5.5v with clear pin ltc1655/ltc1655l single 16-bit v out dac with serial interface in so-8 v cc = 5v (3v), low power, deglitched, v out = 0v to 4.096v (0v to 2.5v) ltc1661 dual 10-bit v out dac in 8-lead msop package v cc = 2.7v to 5.5v micropower, rail-to-rail output ltc1662 ultralow power, dual 10-bit dac in 8-lead msop package 1.5 m a i cc per dac, 2.7v to 5.5v supply range ltc1664 quad 10-bit v out dac in 16-pin narrow ssop pin compatible with the ltc1660, 2.7v to 5.5v supply range ltc1665/ltc1660 octal 8/10-bit v out dac in 16-pin narrow ssop v cc = 2.7v to 5.5v, micropower, rail-to-rail output v cc x1/x2 b v out b clr refhi b gnd reflo b reflo a refhi a refout nc v out a x1/x2 a v cc x1/x2 c v out c cs/ld d in refhi c gnd reflo c reflo d refhi d d out clk nc v out d x1/x2 d ltc1458 ltc1458l 0.1 m f 1458 ta03 ltc1458: 0v to 4.095v ltc1458l: 0v to 2.5v ltc1458: 0v to 4.095v ltc1458l: 0v to 2.5v ltc1458: 2.048v ltc1458l: 1.22v ltc1458: 0v to 4.095v ltc1458l: 0v to 2.5v ltc1458: 0v to 4.095v ltc1458l: 0v to 2.5v ltc1458: 4.5v to 5.5v ltc1458l: 2.7v to 5.5v p typical applicatio u linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com

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