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preliminary specification ?2000 fairchild semiconductor international www.fairchildsemi.com rev. 0.9.2 may. 2000. 1 features spindle motor driver ? soft commutation ? spindle brake after retract ? adjustable brake delay time ? 1.2a max. current power driver ? low output saturation voltage: 1.5v typical @1.2a ? pwm decoder & filter for soft commutation ? the external circuit (asic) based start-up, commutation and motor speed control ? advanced control accuracy by dual gain slop voice coil motor driver ? trimmed low offset current ? 1.2a max. current power driver ? automatic retract with constant voltage output ? class ab linear amplifier with no dead zone ? low output saturation voltage: 0.8v typical @1.0a ? internal full bridge with vpnp(vertical pnp) & npn transistors power monitoring ? power on reset with delay ? hysteresis on both power comparators ? over temperature & over current shut down ? 5v and 12v power monitor threshold accuracy 2% others ? can be used with 5volt and 3.3volt control signals(cntl1,cntl2 & cntl3) for asic interface package ? 48qfph (48 pin quad flat package heat-sink) description the FAN8623 is an asic combination chip, designed for the hdd application, it includes the following functions: spin- dle motor drive, voice coil motor drive, retract and power management. to drive and control the spindle, the external asic provides the appropriate control signals (start up, commutation, speed control) to the FAN8623. the spindle motor is monitored by the fg output and the motor speed control is accomplished via the pwmsp input. the asic controls the voice coil motor current via pwmh and pwml inputs and the power management circuit monitors the power supply voltages. 48-qfph-1414 typical application ? hard disk drive (hdd) ordering information device package operating temp. FAN8623 48-qfph-1414 0 ~ 70 c FAN8623 12v spindle motor and voice coil motor driver
FAN8623 2 preliminary specification pin assignments 48 47 46 45 44 43 42 41 40 39 38 37 1 2 3 4 5 6 7 8 9 10 11 12 27 26 25 30 29 28 33 32 31 36 35 34 13 14 15 16 17 18 19 20 21 22 23 24 pwmsf cfsf adj sense5 vdd fg vref mclk por cdly pwmh pwml n subgnd v pcs w subgnd errout vdd errin sense vcm+ pgnd cfsp pwmsp cntl3 cntl2 cntl1 gnd cbrake brake sense12 ccomp pvcc1 u cfvcm vcmref filout cret half vcc vcc cret2 rret pvcc2 vcm - subgnd senseout tab tab tab tab FAN8623
FAN8623 3 preliminary specification pin definitions pin number pin name io pin function description 1 pwmsf i pwm input for spindle soft commutation 2 cfsf - capacitor for spindle pwm soft commutation filter 3 adj - reference voltage adjustable 4 sense5 - adjustable threshold voltage to 5v 5 vdd - 5v power supply 6 fg o frequency generation to spindle speed 7 vref o voltage reference output for asic power 8 mclk i clock from asic for commutation 9 por o fault output(power on reset & thermal shut down) 10 cdly - delay capacitor for power on reset 11 pwmh i pwm signal input (msb) 12 pwml i pwm signal input (lsb) 13 cfvcm - filter capacitor for vcm pwm control 14 vcmref o voltage reference output for vcm 15 filout o vcm pwm output 16 cret - delay capacitor for retract 17 halfvcc o 1/2 vcc pin 18 vcc - 12v power line 19 cret2 - power for vcm retract 20 rret - adjustable retract voltage 21 pvcc2 - 12v power line for vcm output 22 vcm( - ) o vcm negative output 23 subgnd - ground 24 senseout o vcm current sense amplifier output 25 pgnd - ground 26 vcm(+) o vcm positive output 27 sense i vcm current sense amplifier input 28 errin i vcm error amplifier negative input 29 vdd - 5v power supply 30 errout o vcm error amplifier output 31 subgnd - ground 32 w o spindle motor w phase output
FAN8623 4 preliminary specification pin definitions (continued) internal block diagram pin number pin name io pin function description 33 pcs o spindle soutput current sensing 34 v o spindle motor v phase output 35 subgnd - ground 36 n - spindle motor neutral point 37 u o spindle motor u phase output 38 pvcc1 - 12v power line for spindle 39 ccomp - spindle output control compensation 40 sense12 - adjustable for threshold voltage to 12v 41 brake o dynamic brake 42 cbrake - back-emf charging capacitor for brake power 43 gnd - ground 44 cntl1 i control input for spindle and brake 45 cntl2 i control input for start-up clock and soft commutation 46 cntl3 i control input for vcm amplifier & retract 47 pwmsp i pwm input for spindle speed control 48 cfsp - filter capacitor for spindle pwm control custom digital asic power-on reset interface spindle motor driver retract brake 3-phase bldc motor voice coil motor por vreg fg mclk pwmsp pwmh u v w n vcm+ vcm - voice coil motor driver pwml pwmsf cntl 1,2,3 FAN8623
FAN8623 5 preliminary specification equivalent circuits pwm decoder filter input of spindle part pwm decoder filter capacitor of spindle part regulator part sense5 input fg output mclk input #1, #47 22 ? internal switch 100 v dd + - v dd #2, #48 internal referecnce voltage + - + - 27 ? internal 1.3v v dd v dd #3 #7 #4 27 ? v dd 27 ? v dd #6 50k #8 27 ? 50k 50k v dd
FAN8623 6 preliminary specification equivalent circuits (continued) vcm power amplifier reference power on reset part vcm current sense input vcm pwm high input vcm pwm low input vcm pwm filter capacitor #17 12.6k 12.6k #18 + - 15 27 ? 27 ? v dd v dd v dd #10 #9 50k internal 2.5v tsd #27 v cc #11 27 ? internal switch 500 v dd #12 27 ? internal switch 15.6 v dd + - + - + - v cc 4k internal 4v #13
FAN8623 7 preliminary specification equivalent circuits (continued) filtered vcm pwm command output sense12 input capacitor for retract power maximum retract current set input spindle motor output compensation capacitor spindle motor output and back-emf sensing part + - v cc internal dec out #15 #40 60 ? v cc retract block #19 uvw 30 ? v cc #20 2k 27 ? v cc v dd v cc #39 - + + - retract block v cc #32, 34, 37 v cc 60 ? internal 4.2v #36 v cc #33 60 ?
FAN8623 8 preliminary specification equivalent circuits (continued) dynamic brake part cntl1, 2, 3 input vcm output and control part #42 #41 27 ? v cc u v dd 40 ? 2k #44, #45, #46 27 ? v dd v cc 8k + - + - - + + - v cc v cc v cc #26 #22 #27 #24 #28 #30 60 ? internal 6v internal 6v 60 ? v cc vcc #17 #18
FAN8623 9 preliminary specification absolute maximum ratings (ta = 25 c) notes: 1. power dissipation is reduced 16mw / c for using above ta=25 c. 2. do not exceed pd and soa(safe operation area). power dissipation curve recommended operating conditions (ta = 25 c) parameter symbol value unit maximum signal block supply voltage for 5v line v ddmax 6.0 v maximum signal block supply voltage for 12v line v ccmax 15.0 v maximum power block supply voltage for 12v line pv ccmax 15.0 v maximum output current of spindle motor i somax 1.2 a maximum output current of vcm i vomax 1.2 a power dissipation p d 3.0 note w storage temperature t stg - 55 ~ 125 c maximum junction temperature t jmax 150 c operating ambient temperature t a 0 ~ 70 c parameter symbol min. typ. max. unit supply voltage v cc , pv cc1 , pv cc2 10.8 12.0 13.2 v supply voltage for logic part v dd 4.5 5.0 5.5 v 0 0 25 50 70 100 125 ambient temperature, ta [ c] 150 175 1,000 2,000 3,000 pd[mw] soa
FAN8623 10 preliminary specification electrical characteristics (ta=25 c, unless otherwise specified) parameter symbol condition min. typ. max. units supply current (1) 5v line supply current 1 i dd1 brake mode (cntl1= low) ? 55 65 ma 5v line supply current 2 i dd2 stand by ? 20 25 ma 5v line supply current 3 i dd3 normal mode ( cntl1 = cntl3 = high ) ?2025ma 5v line supply current 4 i dd4 retract mode (cntl3=low) ? 20 25 ma 12v line supply current 1 i cc1 brake mode ( cntl1 =low) ? 7 12 ma 12v line supply current 2 i cc2 stand by ? 9 15 ma 12v line supply current 3 i cc3 normal mode ( cntl1 = cntl3 = high) ?3050ma 12v line supply current 4 i cc4 retract mode (cntl3 =low) ? 9 14 ma power monitor threshold voltage level for 12v v th12 v cc =sweep, v dd =5v 9.1 9.45 9.8 v hysteresis on 12v comparator v hys12 v cc =sweep, v dd =5v 100 200 300 mv adjustable pin voltage for 12v v12 v cc =12v, v dd =5v 3.0 3.2 3.4 v threshold voltage level for 5v v th5 v cc =12v, v dd =sweep 3.7 4.05 4.4 v hysteresis on 5v comparator v hys5 v cc =12v, v dd =sweep 50 100 150 mv adjustable pin voltage for 5v v5 v cc =12v, v dd =5v 2.90 3.23 3.55 v power on reset generator charging current for por capacitor i cpor v cc =12v, v dd =5v - 17.0 - 13.5 - 10.0 ua por threshold voltage v thpor cdly=sweep 2.3 2.5 2.7 v output high voltage v poh v cc =12v, v dd =5v 4.5 ? v dd v output low voltage v pol v cc =12v, v dd =5v 0 ? 0.5 v power on reset delay (2) td por c dly =220nf ? 40 ? ms control input (3) logic control input 1 high voltage v ctl1h -2.07??v logic control input 1 high current i ctl1h cntl1 = high 65 100 160 ua logic control input 1 low voltage v ctl1l -??1.43v logic control input 1 low current i ctl1l cntl1= low -200 -165 -130 ua
FAN8623 11 preliminary specification electrical characteristics (continued) (ta=25 c, unless otherwise specified) parameter symbol condition min. typ. max. units running mode check back-emf threshold voltage (2) v bth ?658095mv fg output high voltage v fgh ?4.5??v fg output low voltage v fgl ???0.5v running mode check rm1 u=v=w=5v, n=100hz - 100 ? hz spindle fg generation fg frequency fg u,v,w=120 shift pulse(100hz) ? 300 ? hz fg duty d tfg u,v,w=120 shift pulse(1khz) 45 50 55 % spindle pwm control pwm high level input voltage (2) v spmh ?3.0??v pwm low level input voltage (2) v spml ???2.0v high input current at pwmsp i psp1 pwmsp=100% 100 150 200 ua cfsp voltage2(100% duty of pwmsp) v sp2 pwmsp=100% 1.5 1.7 1.9 v low input current at pwmsp i psp2 pwmsp=0% - 200 - 150 - 100 ua cfsp voltage1(0% duty of pwmsp) v sp1 pwmsp=0% 3.1 3.3 3.5 v cfsp voltage amplitude v spd ? 1.2 1.6 2.0 v cfsp voltage3 (50% of pwmsp) v sp3 pwmsp=50% 2.35 2.5 2.65 v cfsp charging current i cfsp1 pwmsp=0%, cfsp=2.5v - 200 - 150 - 100 ua cfsp discharge current i cfsp2 spmsp=100%, cfsp=2.5v 100 150 200 ua brake cbrake output voltage v bc ?11.0??v brake output high voltage v bh (test only) ? v dd ?v brake output low voltage v bl ???0.5v
FAN8623 12 preliminary specification electrical characteristics (continued) (ta=25 c, unless otherwise specified) parameter symbol condition min. typ. max. units spindle pwm soft commutation pwm high level input voltage (2) v sfmh ?3.0??v pwm low level input voltage (2) v sfml ???2.0v high input current at pwmsf i pfp1 pwmsf=100% 100 150 200 ua cfsf voltage2(100% duty of pwmsf) v sf2 pwmsf=100% 2.60 2.75 2.90 v low input current at pwmsf i psf2 pwmsf=0% - 200 - 150 - 100 ua cfsf voltage1(0% duty of pwmsf) v sf1 pwmsf=0% 2.10 2.25 2.40 v cfsf voltage amplitude v sfd ? 425 475 525 mv cfsf voltage3 (50% of pwmsf) v sf3 pwmsf=50% 2.35 2.50 2.65 v cfsf charging current i cfsf1 pwmsf=0%, cfsp=2.5v - 150 - 100 - 50 ua cfsf discharge current i cfsf2 spmsf=100%, cfsp=2.5v 50 100 150 ua spindle output u saturation voltage_upper v su5u i o = 1a ? ? 1.0 v v saturation voltage_upper v su5v i o = 1a ? ? 1.0 v w saturation voltage_upper v su5w i o = 1a ? ? 1.0 v u saturation voltage_lower v sv5l i o = 1a ? ? 0.7 v v saturation voltage_lower v su5l i o = 1a ? ? 0.7 v w saturation voltage_lower v su5l i o = 1a ? ? 0.7 v u output frequency f u cntl2=12khz ? 1 ? khz v output frequency f v cntl2=12khz ? 1 ? khz w output frequency f w cntl2=12khz ? 1 ? khz leakage current i lq ? - 20 0 20 ua transconductance gain spm gm sp r pcs =0.25 ? ?0.85 ? a/v ccomp charging current1 i comp1 pwmsp=0% - 10 0 10 ua ccomp charging current2 i comp2 pwmsp=50% - 400 - 300 - 200 ua ccomp charging current3 i comp3 pwmsp=100% - 750 - 630 - 500 ua
FAN8623 13 preliminary specification electrical characteristics (continued) (ta=25 c, unless otherwise specified) parameter symbol condition min. typ. max. units regulator adjustable pin voltage v adj ? 1.29 1.31 1.33 v regulator output voltage v reg ? 3.1 3.3 3.5 v regulator line regulation (2) r line ???2.0% regulator load regulation (2) r load i o = 500ma ? ? 2.0 % vcm pwm control high pwmh input current i pwmh1 pwmh = 100% 36 48 60 ua low pwmh input current i pwmh2 pwmh = 0% - 200 - 150 - 100 ua high pwml input current i pwml1 pwml = 100% 36 48 60 ua low pwml input current i pwm2 pwml = 0% - 200 - 150 - 100 ua pwmh high level input voltage (2) v pwmh1 ?3.0??v pwmh low level input voltage (2) v pwmh2 ???2.0v pwml high level input voltage (2) v pwml1 ?3.0??v pwml low level input voltage (2) v pwm2 ???2.0v cfvcm voltage1 v cfvc1 pwmh=100%,pwml=100% ? 8.5 ? v cfvcm voltage5 v cfvc5 pwmh=50%,pwml=50% ? 6.00 ? v cfvcm voltage9 v cfvc9 pwmh=0%,pwml=0% ? 3.5 ? v pwm current ratio (vcm) r pwm ??64?? pwmh current variation i vpwm ? 1.03 1.25 1.37 ma pwml current variation i vpwm ? 16.0 19.6 22.0 ua vcm pwm filter maximum phase shift (2) df measure at 500hz, cfvcm=10nf ? ? 2 deg filter cut-off frequency (2) f co ??40?khz filter attenuation at 1mhz (2) a filter ??70?db
FAN8623 14 preliminary specification electrical characteristics (continued) (ta=25 c, unless otherwise specified) parameter symbol condition min. typ. max. units vcm reference voltage vcm reference voltage v ref cntl3= high 5.7 6.0 6.3 v vcm error amplifier amplifier output high v eoh ? 10.8 ? ? v amplifier output low v eol ???1.2v short circuit current (2) i esc ? 8??ma input offset voltage (2) v ose ? - 15 0 15 mv error amplifier open loop gain (2) a ve ??80?db unit gain bandwidth (2) bg e ? ?2?mhz vcm sense amplifier amplifier output high v soh ? 10.8 ? ? v amplifier output low v sol ???1.2v short circuit current (2) i ssc ?10??ma input offset voltage (2) v ose ? - 15 0 15 mv unit gain bandwidth (2) bg s ? ?2?mhz sense amplifier voltage gain (2) a vs ??12?db vcm power amplifier power amplifier gain a po ? ? 21.6 ? db power amplifier output high voltage v poh ?11.0??v power amplifier output low voltage v pol ???1.0v input offset voltage (2) v ose ? - 15 0 15 mv unit gain bandwidth (2) bg p ? ?2?mhz
FAN8623 15 preliminary specification electrical characteristics (continued) (ta=25 c, unless otherwise specified) notes: 1. no spindle or vcm load. 2. guaranteed by design. 3. logic control input2 & 3 spec?s are equal to logic control input1. parameter symbol condition min. typ. max. units vcm amplifier total vcm offset current i osvcm pwmh=pwml=50% duty ?20 0 20 ma vcm transconductance gain gm vcm ? ? 0.45 ? a/v vcm+ saturation voltage lower v vms1 i o =700ma ? ? 0.6 v vcm- saturation voltage upper v vms2 rvcm=15 ? ??0.6v vcm+ saturation voltage upper v vms3 rvcm=15 ? ??0.6v vcm- saturation voltage lower v vms4 rvcm=15 ? ??0.6v leakage current power amplifier1 i vcml1 ? - 20 0 20 ua retract min. operating voltage of cret2 v cret2 cret2=sweep ? ? 3.6 v source voltage v src cret2=5v ? ? 1.2 v sinking saturation voltage v rtsat cret2=5v ? ? 0.5 v retract voltage v rct rret=10.0k ? ?0.5? v power transistor leakage i lret ? ?10 0 10 ua thermal shut down operating temperature tsd ? ? 150 ? c thermal hysteresis t hys ??30? c
FAN8623 16 preliminary specification application information spindle motor drive circuit the FAN8623 is a combination chip consisting of spindle motor and voice coil motor designed for hdd system. according to the spindle conditions, the digital asic provides optimum control signals (start-up, commutation, speed control, and commu- tation mode) to the FAN8623. back-emf (bemf) signal of the spindle motor is fed back to asic via fg line. the mclk and pwm signals are used to determine the commutation timing and to control the spindle speed, respectively. spindle driver the spindle includes both low and high side drivers (h-bridge) for a three-phase sensorless brushless dc motor. to reduce the saturation voltage, the vertical pnp transistor is used as the high side driver. frequency generation (fg) fg stands for frequency generation. it is the output signal to the asic. it contains important information about the motor speed. according to the fg frequency, the digital asic provides different motor clock signals to the motor drive ic via mclk. it checks the motor speed to send the vcm enable signal via cntl3. fg frequency (hz), motor speed (rpm) and pole number are directly related as shown below in the three phase motor. fg frequency(hz) = motor speed(rpm) pole number / 2 3 / 60 in a typical application,(8 pole motor) fg frequency = 5400 8 /2 3 / 60 = 1080 hz mclk & mask the mclk is a motor clock used as the standard clock signal for the proper commutation timing of the spindle motor. it is supplied by the asic. as shown in table 1, it has different delay times depending on the mode of the spindle. table 1. after the fg_edge signal detection, the mclk occurs after a half fg_edge delay time in the acceleration mode and 1/ 32 fg_edge delay time in the soft commutation mode. mclk (td) mask commutation start-up mode 2ms (external asic) 1ms hard acceleration mode fg(n-1) / 2 fg(n-1) / 4 hard running mode fg(n-1) / 32 344.45 m ssoft
FAN8623 17 preliminary specification mask when the coil current is abruptly changed in a short time interval, a spark voltage occurs. this spark voltage mixes with the fg output to give the wrong spindle information to the asic. to eliminate the spark voltage from the fg output, the masking circuit is needed. figure 1. bemf, fg, and mclk in the acceleration mode figure 2. mclk vs mask in the start-up mode vcoil l di dt ---- - ? = w_bemf v_bemf u_ bemf u_comp v_comp w_comp fg fg_edge mclk 120 60 electrically 30 delay fg mclk mask 1msec 2msec fg 8msec commutation noise, false zero cross 2msec 1msec
FAN8623 18 preliminary specification figure 3. mclk vs mask in the acceleration mode fg mslk mask t1/4 t2/4 t1/2 t2/2 t2 fg 8msec, t1 commutation noise, false zero cross
FAN8623 19 preliminary specification pwmdec and speed control motor speed is measured by the asic via the fg output. the digital asic compares fg frequency with the target motor speed and sends the speed compensation signal to the pwmsp input of the FAN8623. this pwm signal is internally filtered and is converted into dc voltage through the built-in pwm decoder filter. the analog output of the filter depends on the duty of the pwm signal. the filter is a 3rd order, low-pass filter. the first pole location of the filter is determined by the exter nal capacitor connected to pin(48) cfsp. figure 4. spindle current vs pwmsp duty variation ( r33 = 0.25 ? ) start-up mode in the sensorless bldc motor the back-emf is used to determine the rotor position. at standstill condition, there is no back-emf voltage and no fg output. there is no information about the motor position. to drive the spindle in the start-up mode, the digital asic sends the spindle enable signal via cntl1 and supplies the high or open signal via cntl2 to be used as commutation signal of the spindle motor. pwmsp vs i spm 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 duty(%) i out
FAN8623 20 preliminary specification the digital asic continuously provides high or open signal until the back-emf generated is large enough to produce the fg signal for the self commutation. during a fixed time, if the back-emf generated is too small and the spindle motor is not driven by the self commutation, the asic resets all signals sent and retries the spindle. notes: 1. cntl1: spindle motor control 2. cntl2: commutation mode control 3. cntl3; vcm control 4. ?1?: enable; ?0?: disable; acceleration mode when the back-emf detected is large enough to determine motor position, the mode is changed from start-up to acceleration. the asic sends the optimum commutation timing signal via mclk according to the fg input. by using the back-emf, the spindle is self-commuted at acceleration and running modes. during the motor drive, the spindle motor is commuted at that point which is electrically 30 delayed after the fg_edge. running mode the running mode is when the spindle motor speed arrives within 1% of the target speed. the commutation mode, commu- tation delay time, mclk delay time (td) and masking time are changed at the running mode. the spindle motor speed is controlled by pwm signal within 0.01%. the soft commutation using the current slope of the motor may reduce audiable noise, emi (electromagnetic interference) and spark voltage which is generated on the motor coil at the commutation. cntl1 (1) cntl2 (2) cntl3 (3) spm driver brake commutation vcm driver retract high 1 0 hard 1 0 open (floating) 0 0 hard 0 0 low 0 1 soft 0 1
FAN8623 21 preliminary specification figure 5. motor start-up sequence figure 6. fg vs pwmsp duty variation open high open low target rpm rotation speed internal ready internal commutation mode change high open start-up hard-commutation soft-commutation vcm enable 100msec +1% - 1% cntl1 spindle on cntl2 cntl3 vcm on high 10msec high fg low duty (%) 100% d% 0 f trarget fg frequency
FAN8623 22 preliminary specification figure 7. acceleration and running the spindle motor u_bemf + - 0 v_bemf + - 0 w_bemf + - 0 iu source sink iv source sink iu source sink iv source sink iw source sink (1) acceleration mode: hard-commutation mode (2) running mode: soft-commutation mode iw source sink
FAN8623 23 preliminary specification figure 8. mclk generation flow chart yes yes no no running acceleration start high frequency noise elimination using filtered fg generate start counter counting the fg duration hard commutation saturation = ? waiting 2msec mclk generation mclk = fg(n-1)/2 mask = fg(n-1)/4 mask = 1msec fg polarity check = same? keep going waiting for fg edge store count value of the fg mclk = fg(n-1)/32 mask = 344.45usec start up retry
FAN8623 24 preliminary specification voice coil motor vcm driver the voice coil motor driver is linear, class ab, h-bridge type driver, it includes all power transistors. after the vcm is enabled via cntl3, the vcm current level is controlled by two pwm signals. the input voltage level at pin pwmh weighs, at a maximum, 64 times more than the input voltage at pin pwml. these pwm signals are filtered by an internal second- order low-pass filter and converted into pwmout (dc voltage). the filter pwmout depends only on the duty cycle and not on the logic level. the pwm filter's pole is adjustable by pin cfvcm connected to the external capacitor. figure 9. pwm decoder & filter schematic 2 figure 10. vcm driver schematic + - + - 13 12 11 + - + - pwmh input pwml input r1 1/2 vdd vin r2 r1 1/2 vdd vin r2 vref cfvcm r1 r1 a c1 c1 filtout gm gm 15 - + + - - + + - - filtout vref r5 r3 vcm+ r6 vcm - r3 r5 r7 errin errout rext cext r24 sense i vcm v+ l rl rsense v - vcm senseout vb r4 vs + - 26 27 22 24 30 28 15 r15 r5 r5 vref pwm decoder & filter 17 18 vcc halfvcc c9
FAN8623 25 preliminary specification the transconductance of vcm amplifier gain, gm, is: therefore aloop >>1, the transconductance (gm) can be adjusted by selecting the external components r18, r25 and sense resister rsense. if r15 = r24, rsense = 1 ? 1 / as = 0.45 vcm current (i vcm ) is: notes: pwmh = 1 when 100% duty pwmh = 0.5 when 50% duty pwmh = 0 when 0% duty retract circuit the retract function is the operation where the vcm moves from the data zone to the parking zone. it is off in the normal state . it operates when power interrupt cause the spindle to stop. gm i vcm vin ------------ 2aerrorapowerr24 ?? ? 2 r15 rsense as aerror apower r15 r24 + () z vcm rsense + () + ?? ?? ? ------------------------------------------------------------------------------------------------------------------------------- -------------------------------------------------------------------- - == gm aloop 1aloop + -------------------------- r24 r15 ---------- - 1 rsense --------------------- - 1 as ------ - ?? ?? = aloop 2 r15 as aerror apower ??? ? r15 r24 + () z vcm rsense + () ---------------------------------------------------------------------------------- = gm r24 r15 ---------- - 1 rsense --------------------- - 1 as ------ - 2 ??? ? imotor 4 pwmh 0.5 ? () 1 64 ------ pwml 0.5 ? () + r24 r15 ---------- - 1 rsense --------------------- - 1 as ------- - =
FAN8623 26 preliminary specification figure 11. retract block schematic iref cret rret vcm cret2 16 20 26 22 19 r2 = 2k iretdly retract enable u v w retract delay rsense 2.7v q1 r1 = 3k iretdly 10 a ] [ = v q1 sat , 0.2 v ] [ = vret r2 rret (, ) r1 r2 r ret ++ ------------------------------------------- 2.7 2v be ? v q1 sat , v ] [ ? ? = tdly cret v be ? iretdly --------------------------- =
FAN8623 27 preliminary specification power management features low power interrupt: the low power interrupt operation occurs when the power supply voltage (5v,12v) level drops below each threshold voltage. the threshold voltage (vth) and time delay (tdly) may be adjustable by the external component value. figure 12. power on reset block schematic power on reset the power-on reset circuit monitors the voltage level of both +5v or +12v power supplies and chip temperature (thermal shut down). the power-on reset circuit disables the spindle, and the whole vcm circuit when the power supply voltage level drops below the reference voltage. figure 13. power on reset function tdly cdly vth i --------- vth 2.5v i 14 a = , = () , = 10 9 40 4 vdd vcc r7 r8 por cdly 5v sense 12v sense r4 r5 2.5v vdd q15 i = 14 a + + _ + _ r4 = 7k, r5 = 11k r7 = 25k, r8 = 9k tsd vhys t vth vbe por vdd, vcc tdly t
FAN8623 28 preliminary specification default (pin4, pin42 : not connected) regulator the FAN8623 includes the voltage regulator for asic and other circuits. it consists bias circuit, the band gap reference and th e external npn power transistor. the regulator voltage can be adjusted by the external resistor, r3a, r3b. figure 14. low drop regulator schematic if r3a = 20k, r3b = 13k vhys 53mv = vdd vhys 5v () ; r4 r5 + r5 --------------------- - vhys = vdd vhys 12v () ; r7 r8 + r8 --------------------- - vhys = vdd th , 4.1v ? vcc th , 9.4v ? vdd vhys 5v () ; 7k 11k + 11k ---------------------- - 53mv 90mv ? = vdd vhys 12v () ; 25k 9k + 9k ---------------------- - 53mv 200mv ? = vreg vref 1 r3a r3b ----------- + ?? ?? vref , 1.3v == vdd vreg r3a r3b vref 3 + - 7 vadjust bias block bandgap reference vref vreg vref 1 r3a r3b ----------- + ?? ?? 1.3 1 20k 13k --------- - + ?? ?? 3.3v ===
FAN8623 29 preliminary specification figure 15. start-up mode figure 16. acceleration mode 1 figure 17. acceleration mode 2 bemf detection str_clk str_mask u_out fg mclk*2 u_out fg mclk*2 u_out fg 2msec t1 t1/2 t1/4
FAN8623 30 preliminary specification figure 18. output in hard-commutation mode figure 19. commutation mode converting figure 20. soft-commutation mode u_ou t v_ou t w_out sw it ch ing mo de co nt ert ing fg com output u_ou t v_ou t w_out
FAN8623 31 preliminary specification figure 21. vcm recalibration flow
FAN8623 32 preliminary specification typical application circuits 9 6 8 44 45 46 39 47 48 1 2 11 12 13 14 29 17 23, 35 24 15 28 30 18 5 25 26 17 22 21 16 20 19 31 33 32 34 37 38 42 41 36 43 7 11 40 4 5v c11 q1 r3a gnd r3b por fg mclk cntl1 cntl2 cntl3 c38 pwmsf pwmsp c48 c2 pwmh pwml c13 halfvcc gnd senseout filout errin r24 r15 c30 r30 errout vcc vdd pgnd rsense pvcc cret rret r20 cret2 c19 pcs subgnd r33 u v w pvcc n m41a c41 c42 v w m41b sense5 sense12 cdly vref adj power on reset bandgap zero cross detector fg generator commutation & spindle motor 3 state input control brake amp brake u v w brake cbrake 3-phase output driver ccomp pwm decoder & filter pwm decoder & filter thermal shutdown pwm decoder & filter amp vlimit retract retract vcm enable vcmref6v + - vcm+ vcm - sense amplifier vcm - sense vcm - vcm+ sense u v w control reference & bias c16 3 - + - + - + gain:12 gain:8 r s c s c17 vcc +5v d4
FAN8623 33 preliminary specification application circuits 12v 5v r40a r4a r40b r4b c10 12v 5v vreg r3a r3b v u 12v 2003 c39 c42 m41b m41a u v w c39 r33 c19 r15 r24 r30 c30 rsense sense c48 c2 c13 pwml pwmh pwmsf pwmsp cntl3 cntl2 cntl1 mclk fg por digital custom asic vcm+ filout vcm - cfsp cfsf cfvcm 9 6 8 44 45 46 47 1 11 12 48 2 13 17 22 27 26 15 24 28 30 23, 25, 31, 35 senseout errout errin gnd 20 19 21 33 39 32 34 37 36 41 42 41 3 7 5, 29 17 10 40 4 sense5 cdly vcc vdd sense12 vref adj brake cbrake pvcc1 n u v w ccomp pcs pvcc2 cret2 rret FAN8623 : options c16 cret 16 c3 q1 12v r s c s halfvcc c17 r20 d4
FAN8623 preliminary specification 12/1/00 0.0m 001 stock#dsxxxxxxxx ? 2000 fairchild semiconductor international life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor international. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others.

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