multilynx cl2161 universal hfc interactive cable transceiver the communications company tm tuner adc annex a fec annex b fec docsis pre process fec encode docsis mac des encoder des decoder bus interface unit copy/crc engine sdram control sdram downstream mac processor cpu and dsp qam demod cl2161 qpsk mod amp control spi idc uart gpio diplexer vga high-level block diagram of multilynx cl2161 overview the multilynx cl2161 is a universal cable transceiver solution for advanced set-top boxes (stbs) and cable modems compliant with dvb in-band, docsis, and eurodocsis standards. the cl2161 is built for stb and cable modem manufacturers requiring the maximum performance with the lowest system bom cost. its high level of integration provides manufacturers with a flexible, yet quick time-to-market solution. the cl2161 is a complete and highly integrated solution combining a qam demodulator for downstream reception, a qpsk/16-qam modulator for upstream transmission, and a field-proven docsis 1.0/1.1-compliant media access controller (mac). the downstream channel provides full 16-256 qam demodulation and is compliant with itu j.83 annex a and b and integrates a 10 bit a/d converter. the upstream qpsk/16-qam burst transmitter along with itu j.112 annex a-, b-compliant fec encoding provides a robust and cost-effective solution for docsis applications. the hardware mac (with packet parsing, filtering, and decryption), and the two internal processors ?an 88 mhz mini-risc and 117 mhz sparc v8 processor, upon which the standard specific mac software is executed ?allow for flexible implementation of dvb in-band, docsis, or eurodocsis standards. the cl2161 has a full complement of low-speed peripheral interface devices including those commonly used on commercial tuners such as spi, inter-device communications (idc), uart, and gpio interfaces.
multilynx cl2161 universal hfc interactive cable transceiver the sparc processor internal to the cl2161 includes a dsp instruction set necessary for ip telephony applications. when combined with a mpeg source encoder/decoder, this solution delivers video telephony technology to the consumer. the communications company tm for more information please call: lsi logic corporation north american headquarters, milpitas, ca tel: 800 574 4286 north america milpitas, ca usa phone: 1-408-490-8000 fax: 1-408-490-8590 quebec, canada phone: 1-514-426-5011 fax: 1-514-426-7119 europe crawley, west sussex united kingdom phone: 44-1293-651100 fax: 44-1293-651119 china beijing, china phone: 86-10-626-38296 fax: 86-10-626-38322 chengdu, china phone: 86-28-6713-150 fax: 86-28-6713-694 japan kohoku-ku, yokohama kanagawa japan phone: 81-45-474-7571 fax: 81-45-474-7570 korea seoul, korea phone: 822-561-9011 fax: 822-561-9021 taiwan taipei, taiwan phone: 886-22-517-4938 fax: 886-22-517-4937 lsi logic logo design, the communications company, and multilynx are trademarks or registered trademarks of lsi logic corporation. all other brand and product names may be trademarks of their respective companies. lsi logic corporation reserves the right to make changes to any products and services herein at any time without notice. lsi logic does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by lsi logic; nor does the purchase, lease, or use of a product or service from lsi logic convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of lsi logic or of third parties. copyright ?2001 by lsi logic corporation. all rights reserved. order no. i20069 901.1k.jg.ik - printed in usa forward channel standards compliance itu-t j.83 annex a and b, docsis 1.0, docsis 1.1 a/d converter internal 10-bit symbol rate variable from 1 ?7.2 mbaud qam constellations 16 - 256 qam if input frequencies 36 mhz or 44 mhz if inputs output optional transport stream output return channel standards compliance docsis 1.0 and docsis 1.1 d/a converter internal 10-bit rf output 5 mhz to 65 mhz modulation qpsk and 16 qam docsis 1.0 features advanced modem pre-equalization of transmit signal internal cmts clock synchronization: no vcxo additional features analog and digital gain control processor and control internal microprocessor 117 mhz sparc v8 processor for media access control software clock generation onboard pll running from a single external crystal agc output supports many variable gain amplifier devices, including, but not limited to: analog devices ad8321, lucent technologies v4911, anadigics ara05050 and ara 1400, maxim max3501 tuner control implemented via spi, idc, or gpio peripherals interface modules inter-device communications (idc, mastermode only) on-chip uart serial peripheral interface (spi) general purpose i/o (gpio) mac standards compliance docsis 1.0, docsis 1.1, eurodocsis, dvb in-band host master mode coldfire, 68k, async flash slave mode pci, power pc, coldfire (5206, 5307), 68k, sh3/4 physical input voltage 3.3v + 5% (tolerates 5v inputs, except sdram), 1.8v packaging 208-pin pqfp sparc operating frequency 117 mhz or 88 mhz
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