1 ps8098a 02/25/97 product description pericom semiconductor?s pi74lpt series of logic circuits are produced in the company?s advanced 0.6 micron cmos technology, achieving industry leading speed grades. the pi74lpt162q952 has 16-bit registered transceivers organized with two sets of eight d-type latches with separate input and output controls for each set. for data flow from a to b, for example, the a-to-b enable (xceab) input must be low to enter data from xax. the data present on the a port will be clocked on the b register when xclkab toggles from low-to-high. the xoeab control performs the output enable function on the b port. control of data from b to a is similar, but uses the xceab, xclkab, and xoeab inputs. by connecting the control pins of the two independent transceivers together, a full 16-bit operation can be achieved. the output buffers are designed with a power-off disable allowing ?live insertion? of boards when used as backplane drivers. the pi74lpt162q952 can be driven from either 3.3v or 5.0v devices allowing this device to be used as a translator in a mixed 3.3/5.0v system. 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74lpt162q952 fast cmos 3.3v 16-bit registered transceivers logic block diagram d 1 clkab c 1 oeab 1 ceab 1 clkba 1 ceba 1 b 0 to 7 other channels d c 1 a 0 1 oeba d 2 clkab c 2 oeab 2 ceab 2 clkba 2 ceba 2 b 0 to 7 other channels d c 2 a 0 2 oeba product features ? compatible with lcx? and lvt? families of products ? supports 5v tolerant mixed signal mode operation ? input can be 3v or 5v ? output can be 3v or connected to 5v bus ? advanced low power cmos operation ? excellent output drive capability: balanced drives (12ma sink and source) ? 25-ohm series resistor on outputs to reduce overshoot and undershoot ? pin compatible with industry standard double-density pinouts ? low ground bounce outputs ? hysteresis on all inputs ? industrial operating temperature range: ?40c to +85c ? multiple center pins and distributed vcc/gnd pins minimize switching noise ? packages available: ? 56-pin 240 mil wide plastic tssop (a) ? 56-pin 300 mil wide plastic ssop (v)
pi74lpt162q952 3.3v 16-bit registered transceivers 2 ps8098a 02/25/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 product pin description truth table (1,2) product pin configuration notes: 1. h = high voltage level l = low voltage level x = don?t care or irrelevant - = low-to-high transition z = high impedance 2. a-to-b data flow shown. b-to-a flow control is the same, except using xceba, xclkba, and xoeba. 3. level of b before the indicated steady-state input conditions were established. pin name description xoeab a-to-b output enable input (active low) x oeba b-to-a output enable input (active low) x ceab a-to-b clock enable input (active low) xceba b-to-a clock enable input (active low) x clkab a-to-b clock input x clkba b-to-a clock input x a x a-to-b data inputs or b-to-a 3-state outputs x b x b-to-a data inputs or b-to-a 3-state outputs gnd ground v cc power inputs outputs xceabxclkabxoeab xax xbx hxlx b (3 ) xllx b (3 ) l - ll l l - lh h xxhxhigh-z 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 25 26 27 28 32 31 30 29 1oeab 1clkab 1ceab gnd 1a0 1a1 vcc 1a2 1a3 1a4 1a5 1a6 1a7 2a0 2a1 2a2 gnd 2a3 2a4 2a5 2a6 2a7 vcc gnd gnd 2ceab 2clkab 2oeab 1oeba 1clkba 1ceba gnd 1b0 1b1 vcc 1b2 1b3 1b4 1b5 1b6 1b7 2b0 2b1 2b2 gnd 2b3 2b4 2b5 2b6 2b7 vcc gnd gnd 2ceba 2clkba 2oeba 56-pin a,v
3 ps8098a 02/25/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74lpt162q952 3.3v 16-bit registered transceivers note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 2.7v to 3.6v) parameters description test conditions (1) min. typ (2) max. units v ih input high voltage (input pins) guaranteed logic high level 2.2 ? 5.5 v input high voltage (i/o pins) 2.0 ? 5.5 v v il input low voltage guaranteed logic low level ?0.5 ? 0.8 v (input and i/o pins) i ih input high current (input pins) v cc = max. v in = 5.5v ? ? 1 a input high current (i/o pins) v cc = max. v in = v cc ??1a i il input low current (input pins) v cc = max. v in = gnd ? ? 1 a input low current (i/o pins) v cc = max. v in = gnd ? ? 1 a i ozh high impedance output current v cc = max. v out = 5.5v ? ? 1 a i ozl (3-state output pins) v cc = max. v out = gnd ? ? 1 a v ik clamp diode voltage v cc = min., i in = ?18ma ? ?70 ?1.2 v i odh output high current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) ?36 ? ?110 ma i odl output low current v cc = 3.3v, v in = v ih or v il , v o = 1.5v (3) 25 ? 100 ma v oh output high voltage v cc = min. i oh = ?12.0ma 2.4 3.0 ? v v in = v ih or v il v ol output low voltage v cc = min. i ol =12.0ma ? 0.40 0.55 v v in = v ih or v il i os short circuit current (4) v cc = max. (3) , v out gnd ?60 ?85 ?240 ma i off power down disable v cc = 0v, v in or v out - 4.5v ? ? 100 a v h input hysteresis ? 150 ? mv notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device typ e. 2. typical values are at vcc = 3.3v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is guaranteed but not tested. 5. v oh = v cc ? 0.6v at rated current. maximum ratings (above which the useful life may be impaired. for user guidelines, not tested) storage temperature ............................................................... ?65c to +150c ambient temperature with power applied .............................. ?40c to +85c supply voltage to ground potential (inputs & vcc only) ......... ?0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) ...... ?0.5v to +7.0v dc input voltage ....................................................................... ?0.5v to +7.0v dc output current ................................................................................ 120 ma power dissipation .................................................................................... 1.0w
pi74lpt162q952 3.3v 16-bit registered transceivers 4 ps8098a 02/25/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power supply current v cc = max. v in = gnd or v cc 0.1 10 a d i cc quiescent power supply current v cc = max. v in = v cc ? 0.6v (3) 2.0 30 a ttl inputs high i ccd dynamic power supply (4) v cc = max., v in = v cc 50 75 a / outputs open v in = gnd mhz x oe = gnd one bit toggling 50% duty cycle i c total power supply v cc = max., v in = v cc ? 0.6v 0.6 2.3 ma current (6) outputs open v in = gnd f i = 10 mh z 50% duty cycle x oe = gnd one bit toggling v cc = max., v in = v cc ? 0.6v 2.1 4.7 (5) outputs open v in = gnd f i = 2.5 mh z 50% duty cycle x oe = gnd 16 bits toggling notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device. 2. typical values are at vcc = 3.3v, +25c ambient. 3. per ttl driven input; all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current (i ccl , i cch and i ccz ) d i cc = power supply current for a ttl high input d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) n cp = number of clock inputs at f cp f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
5 ps8098a 02/25/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74lpt162q952 3.3v 16-bit registered transceivers capacitance (t a = 25c, f = 1 mhz) note: 1. this parameter is determined by device characterization but it not production tested. pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com switching characteristics over operating range (1) lpt162q952a lpt162q952b lpt162q952c com. com. com. parameters description conditions (2) min. (3) max. min. (3) max. min. (3) max. units t plh propagation delay c l = 50pf 2.0 10.0 2.0 7.5 2.0 6.3 ns t phl x clkab, x clkba to x b x , x a x r l = 500 w t pzh output enable time 1.5 10.5 1.5 8.0 1.5 7.0 ns t pzl x oeba, x oeab to x a x , x b x t phz output disable time (4) 1.5 10.0 1.5 7.5 1.5 6.5 ns t plz x oeba, x oeab to x a x , x b x t su set-up time high or low 2.5 ? 2.5 ? 2.5 ? ns xax, xbx to xclkab, xclkba t h hold time high or low 2.0 ? 2.0 ? 2.0 ? ns xax, xbx to xclkab, xclkba t su setup time high or low 3.0 ? 3.0 ? 3.0 ? ns xceab, xceba to xclkab, xclkba t h hold time high or low 2.0 ? 2.0 ? 2.0 ? ns xceab, xceba to xclkab, xclkba t w pulse width high (4) or 3.0 ? 3.0 ? 3.0 ? ns low, xclkab or xclkba t sk (o) output skew (5) ? 0.5 ? 0.5 ? 0.5 ns notes: 1. propagation delays and enable/disable times are with vcc = 3.3v 0.3v, normal range. for vcc = 2.7v, extended range, all propagation delays and enable/disable times should be degraded by 20%. 2. see test circuit and waveforms. 3. minimum limits are guaranteed but not tested on propagation delays. 4. this parameter is guaranteed but not production tested. 5. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. s r e t e m a r a p ) 1 ( n o i t p i r c s e ds n o i t i d n o c t s e t. p y t. x a ms t i n u c in e c n a t i c a p a c t u p n iv in v 0 =5 . 46 f p c out e c n a t i c a p a c t u p t u ov o t uv 0 =5 . 58
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