1 ps8143 10/22/97 product description pericom semiconductor?s pi74fct3 series of logic circuits are produced in the company?s advanced 0.5 micron cmos technology, achieving industry leading speed. the pi74fct16322601 uses d-type latches and d-type flip-flops with 3-state outputs to allow data flow in transparent, latched, and clocked modes. data flow in each direction is controlled by output enable (oeab and oeba), latched enable (leab and leba), and clock (clkab and clkba) inputs. the clock can be controlled by the clock enable (clkenab and clkenba) inputs. for a-to-b data flow, the device operates in the transparent mode when leab is high. when leab is low, the a data is latched if clkab is held at a high or low logic level. if leab is low, the a-bus is stored in the latch/flip-flop on the high-to-low transition of clkab. when oeab is low, the outputs are active. when oeab is high, the outputs are in the high-impedance state. data flow for b to a is similar to that of a to b but uses oeba, leba, clkba, and clkenba. to reduce overshoot and undershoot, the inputs/outputs include 26 w series resistors. to ensure the high-impedance state during power up or power down, oe should be tied to vcc through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. the pi74fct16322601 has ?bus hold? which retains the data input?s last state whenever the data input goes to high-impedance preventing ?floating? inputs and eliminating the need for pullup/down resistors. 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 product features ? pi74fct16322601 is designed for low voltage operation ?v cc = 2.3v to 3.6v ? hysteresis on all inputs ? typical v olp (output ground bounce) < 0.8v at v cc = 3.3v, t a = 25c ? typical v ohv (output v oh undershoot) < 2.0v at v cc = 3.3v, t a = 25c ? inputs/outputs have equivalent 26 ohm series resistors, no external resistors are required. ? bus hold retains last active bus state during 3-state eliminates the need for external pullup resistors ? industrial operation at ?40c to +85c ? packages available: ? 56-pin 240 mil wide plastic tssop (a56) ? 56-pin 300 mil wide plastic ssop (v56) pi74fct16322601 18-bit universal bus transceiver with 3-state outputs logic block diagram oeab clkenab clkab leab leba clkba clkenba oeba a1 3 27 29 30 28 2 55 56 1 ce 1d c1 clk ce 1d c1 clk b1 54 to 17 other channels
pi74fct16322601 18-bit universal bus transceiver 2 ps8143 10/22/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pin name description clken clock enable input (active low) oe output enable input (active low) le latch enable (active high) clk clock input (active high) ax data i/o bx data i/o gnd ground v cc power 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 25 26 27 28 32 31 30 29 product pin description truth table (1) ? note: 1. h = high signal level l = low signal level z = high impedance - = low-to-high transition product pin configuration 56-pin a, v s t u p n i t u p t u o b b a n e k l cb a e ob a e lb a k l ca x hxxx z xlhxll xlhshh hllxx hllxx lll - ll lll - hh llllx lllhx b 0 ? b 0 ? b 0 ? b 0 oeab leab a1 gnd a2 a3 v cc a4 a5 a6 gnd a7 a8 a9 a10 a11 a12 gnd a13 a14 a15 v cc a16 a17 gnd a18 oeba leba clkenab clkab b1 gnd b2 b3 v cc b4 b5 b6 gnd b7 b8 b9 b10 b11 b12 gnd b13 b14 b15 vcc b16 b17 gnd b18 clkba clkenba ? a-to-b data flow is shown: b-to-a flow is similar but uses oeba, leba, clkba, and clkenba. ? output level before the indicated steady-state input conditions were established. output level before the indicated steady-state input conditions were established, provided that clkab is low before leab goes low. x
pi74fct16322601 18-bit universal bus transceiver 3 ps8143 10/22/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 storage temperature ............................................................................ ?65c to +150c ambient temperature with power applied .......................................... ?40c to +85c input voltage range, v in ................................................................ ?0.5v to v cc +0.5v output voltage range, v out .......................................................... ?0.5v to v cc +0.5v dc input voltage .................................................................................... ?0.5v to +5.0v dc output current ............................................................................................. 100 ma power dissipation .................................................................................................... 1.0w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) note: 1. unused control inputs must be held high or low to prevent them from floating. s r e t e m a r a pn o i t p i r c s e ds n o i t i d n o c t s e t. n i m. p y t. x a ms t i n u v ih e g a t l o v h g i h t u p n i v cc v 7 . 2 o t v 3 . 2 = v v cc v 6 . 3 o t v 7 . 2 =0 . 2 v il e g a t l o v w o l t u p n i v cc v 7 . 2 o t v 3 . 2 =7 . 0 v v cc v 6 . 3 o t v 7 . 2 =8 . 0 n i ve g a t l o v t u p n i0v cc v t u o ve g a t l o v t u p t u o0v cc v i oh t n e r r u c t u p t u o l e v e l - h g i h v cc v 3 . 2 =6 - a m v cc v 7 . 2 =8 - v cc v 0 . 3 =2 1 - i ol t n e r r u c t u p t u o l e v e l - w o l v cc v 3 . 2 =6 a m v cc v 7 . 2 =8 v cc v 0 . 3 =2 1 a te r u t a r e p m e t r i a - e e r f g n i t a r e p o0 4 -5 8c recommended operating conditions (1)
pi74fct16322601 18-bit universal bus transceiver 4 ps8143 10/22/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 3.3v 10%) s r e t e m a r a ps n o i t i d n o c t s e tv cc ) 1 ( . n i m. p y t ) 2 ( . x a ms t i n u v oh i oh 0 0 1 ? = m a. x a m o t . n i m2 . 0 - c c v v i oh a m 4 ? =v ih =v 7 . 1v 3 . 29 . 1 i oh 6 ? =ma v ih =v 7 . 1v 3 . 27 . 1 v ih 0 . 2 =v v 0 . 34 . 2 i oh a m 8 ? = v ih v 0 . 2 = v 7 . 20 . 2 i oh a m 2 1 ? = v ih v 0 . 2 = v 0 . 30 . 2 v ol i ol 0 0 1 = m a. x a m o t . n i mv cc -2 . 02 . 0 v i ol =a m 4v il =v 7 . 0v 3 . 24 . 0 i ol a m 6 = v il =v 7 . 0v 3 . 25 5 . 0 v il =v 8 . 0v 0 . 35 5 . 0 i ol =a m 8 v il =v 8 . 0 v 7 . 26 . 0 i ol =a m 2 1 v il =v 8 . 0 v 0 . 38 . 0 i i v i =v cc d n g r ov 6 . 35 m a i i ) d l o h ( ) 3 ( v i =v 7 . 0 v 3 . 2 5 4 v i =v 7 . 15 4 - v i =v 8 . 0 v 0 . 3 5 7 v i =v 0 . 25 7 - v i =v 6 . 3 o t 0v 6 . 30 0 5 i oz ) 4 ( v o =v cc d n g r ov 6 . 30 1 i cc v i =v cc d n g r o i o 0 = v 6 . 30 4 d i cc v t a t u p n i e n o cc t a s t u p n i r e h t o , v 6 . 0 - v cc . d n g r o v 6 . 3 o t v 30 5 7 c i s t u p n i l o r t n o cv i =v cc d n g r ov 3 . 34f p c io s t r o p b r o ao v=v cc d n g r ov 3 . 38f p notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device typ e. 2. typical values are at vcc = 3.3v, +25c ambient and maximum loading. 3. bus hold maximum dynamic current required to switch the input from one state to another. 4. for i/o ports, the i oz includes the input leakage current.
pi74fct16322601 18-bit universal bus transceiver 5 ps8143 10/22/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 timing requirements over operating range s r e t e m a r a pn o i t p i r c s e d 1 0 6 2 2 3 6 1 t c f s t i n u v 2 . 0 v 5 . 2 = c c vv 7 . 2 = c c vv 3 . 0 v 3 . 3 = c c v n i mx a mn i mx a mn i mx a m f k c o l c y c n e u q e r f k c o l c00 4 10 0 5 100 5 1z h m t w e s l u p n o i t a r u d h g i h e l3 . 33 . 33 . 3 s n w o l r o h g i h k l c3 . 33 . 33 . 3 t u s e m i t p u t e s h g i h k l c e r o f e b a t a d3 . 24 . 21 . 2 h g i h k l c , w o l e l e r o f e b a t a d0 . 26 . 16 . 1 w o l k l c , w o l e l e r o f e b a t a d3 . 12 . 11 . 1 h g i h k l c e r o f e b n e k l c0 . 20 . 27 . 1 t h e m i t d l o h h g i h k l c r e t f a a t a d7 . 07 . 08 . 0 h g i h k l c , w o l e l r e t f a a t a d3 . 16 . 14 . 1 w o l k l c , w o l e l r e t f a a t a d7 . 10 . 27 . 1 h g i h k l c r e t f a n e k l c3 . 05 . 06 . 0 d / t d v ) 1 ( l l a f r o e s i r n o i t i s n a r t t u p n i00 100 10 0 1v / s n note: 1. unused control inputs must be held high or low to prevent them from floating.
pi74fct16322601 18-bit universal bus transceiver 6 ps8143 10/22/97 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 r e t e m a r a p m o r f ) t u p n i ( o t ) t u p t u o ( v 2 . 0 v 5 . 2 = c c vv 7 . 2 = c c vv 3 . 0 v 3 . 3 = c c v s t i n u . n i m ) 2 ( . x a m . n i m ) 2 ( . x a m . n i m ) 2 ( . x a m f x a m 0 4 10 5 10 5 1z h m t d p ab8 . 14 . 52 . 56 . 15 . 4s n t d p ba8 . 14 . 52 . 56 . 15 . 4s n t d p b a e lb5 . 11 . 69 . 55 . 11 . 5s n t d p a b e la5 . 11 . 69 . 55 . 11 . 5s n t d p b a k l cb27 . 63 . 66 . 15 . 5s n t d p a b k l ca2 . 17 . 63 . 66 . 15 . 5s n t n e b a e ob7 . 16 . 67 . 66 . 17 . 5s n t s i d b a e ob5 . 29 . 53 . 58 . 18 . 4s n t n e a b e oa7 . 16 . 67 . 66 . 17 . 5s n t s i d a b e oa5 . 29 . 53 . 58 . 18 . 4s n switching characteristics over operating range (1) pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com notes: 1. see test circuit and waveforms. 2. minimum limits are guaranteed but not tested on propagation delays. operating characteristics, t a = 25c r e t e m a r a ps n o i t i d n o c t s e t v c c v 2 . 0 v 5 . 2 =v c c v 3 . 0 v 3 . 3 = s t i n u l a c i p y tl a c i p y t c d p n o i t a p i s s i d r e w o p e c n a t i c a p a c d e l b a n e s t u p t u o c l , f p 0 5 = z h m 0 1 = f 1 40 5 f p d e l b a s i d s t u p t u o66
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