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publication# 080154 rev: d amendment: / 0 issue date: october 1999 am7946 subscriber line interface circuit distinctive characteristics ideal for long loop applications on-hook transmission ?40 v to ?58 v battery operation on-hook transmission internal v ee regulator low standby power on-chip thermal management (tmg) feature scaled line voltage (vab) output logic selectable for 2.2 v metering or long loop feed two-wire impedance set by scaled external impedance programmable constant-current feed programmable loop-detect threshold current gain = 500 ground-key detector tip open state for ground-start lines polarity reversal option available three on-chip relay drivers and snubber circuits (32-plcc only) block diagram c2 c1 two-wire interface hpa hpb input decoder and control detector ring-trip detector power-feed controller da db bgnd vcc vneg rdc agnd/dgnd vbat a(tip) b(ring) ryout2 det cas ringout rd tmg relay driver ring relay driver d1 rsn signal transmission vtx d2 off-hook detector ground-key e1 c3 ovh vdc rsg rye
2 am7946 data sheet ordering information standard products legerity standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the elements below. am7946 j c temperature range c = commercial (0 c to 70 c)* package type j = 32-pin plastic leaded chip carrier (pl 032) device number/description am7946 subscriber line interface circuit ?1 performance grade option ?1 = 52 db longitudinal balance, polarity reversal ?2 = 63 db longitudinal balance, polarity reversal ?3 = 52 db longitudinal balance, no polarity reversal ?4 = 63 db longitudinal balance, no polarity reversal note: * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ?40c to +85c is guaranteed by characterization and periodic sampling of production units. valid combinations am7946 ?1 jc ?2 ?3 ?4 valid combinations valid combinations list configurations planned to be supported in volume for this device. consult the local legerity sales office to confirm availability of specific valid combinations, to check on newly released combinations, and to obtain additional data on legerity?s standard military? grade products.
slic products 3 connection diagrams top view vcc bgnd a(tip) 32-pin plcc da 4 3 2 1 32 31 30 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 vbat hpb hpa vneg rsn 26 27 28 29 ryout2 c3 ryout1 rdc rye vtx d1 e1 c2 tmg rd vdc cas ovh rsg c1 det d2 ringout db nc b(ring) agnd/dgnd notes: 1. pin 1 is marked for orientation. 2. nc = no connect
4 am7946 data sheet pin descriptions pin names type description agnd/dgnd gnd analog and digital ground. a(tip) output output of a(tip) power amplifier. bgnd gnd battery (power) ground. b(ring) output output of b(ring) power amplifier. c3 ? c1 inputs decoder. slic control pins. c3 is msb and c1 is lsb. ttl compatible. cas capacitor anti-saturation pin for capacitor to filter reference voltage when operating in anti- saturation region. d2 ? d1 input relay driver control. d2 ? d1 control the relay drivers ryout1 and ryout2. a logic low on d1 activates the ryout1 relay driver. a logic low on d2 activates the ryout2 relay driver. ttl compatible. da input ring-trip negative. negative input to ring-trip comparator. db input ring-trip positive. positive input to ring-trip comparator. det output switchhook detector. when enabled, a logic low indicates that a selected condition is detected. the detect condition is selected by the logic inputs (c3 ? c1 and e1). the output is open collector with a built-in 15 k ? pull-up resistor. e1 input ground-key enable. a logic high selects the off-hook detector. a logic low selects the ground-key detector. ttl compatible. hpa capacitor high-pass filter capacitor. a(tip) side of the high-pass filter capacitor. hpb capacitor high-pass filter capacitor. b(ring) side of the high-pass filter capacitor. ovh input overhead voltage control. a logic high enables nonmetering overhead. a logic low enables 2.2 v metering dc overhead. ttl compatible. rd resistor detect resistor. detector threshold set and filter pin. rdc resistor dc feed resistor. connection point for the dc feed current programming network. the other end of the network connects to the receiver summing node (rsn). the sign of v rdc is negative for normal polarity and positive for reverse polarity. ringout output ring relay driver. open collector driver with emitter internally connected to bgnd. this is activated in the ringing state. rsg input saturation guard. a resistor from this pin to ground allows the saturation cut in voltage to be increased while maintaining ac transmission overhead voltage. rsn input receive summing node. the metallic current (both ac and dc) between a(tip) and b(ring) is equal to 500 times the current into this pin. the networks which program receive gain, two-wire impedance, and feed resistance all connect to this node. rye output common emitter of ryout1/2. emitter output of ryout1 and ryout2. normally connected to relay ground. ryout1, ryout2 output (option) relay/switch driver. open collector driver with emitter internally connected to rye. tmg ? thermal management. an external resistor connects between this pin and vbat to offload power dissipation from the am7946 slic. functions during normal polarity and reverse polarity states. vbat battery battery supply and connection to substrate. vcc power +5 v power supply. vdc output scaled vab output. v dc = |(v ab / 20)|. range of 0 v to 2.5 v. this output is filtered by c hp . vneg power ? 4.75 v to vbat negative supply. this pin is the return for the internal vee regulator. vtx output transmit audio. the voltage at this output is equal to the metallic voltage across a(tip) and b(ring). vtx also sources the two-wire input impedance programming network.
slic products 5 absolute maximum ratings storage temperature ......................... ? 55 c to +150 c v cc with respect to agnd/dgnd ..... ? 0.4 v to +7.0 v v neg with respect to agnd/dgnd ...... +0.4 v to v bat v bat with respect to agnd/dgnd: continuous..................................... +0.4 v to ? 80 v 10 ms ............................................. +0.4 v to ? 85 v bgnd with respect to agnd/dgnd........ +3 v to ? 3 v a(tip) or b(ring) to bgnd: continuous ....................................... ? 70 v to +1 v 10 ms (f = 0.1 hz) ............................ ? 70 v to +5 v 1 s (f = 0.1 hz) ............................... ? 80 v to +8 v 250 ns (f = 0.1 hz) ......................... ? 90 v to +12 v current from a(tip) or b(ring) ....................... 150 ma ringout or ryout1 or ryout2 current.......75 ma ringout voltage ................................. bgnd to +7 v ringout transient............................. bgnd to +10 v rye voltage ..........................................bgnd to v bat ryout1 or ryout2 voltage .................. rye to +7 v ryout1 or ryout2 transient .............. rye to +10 v da and db inputs voltage on ring-trip inputs ..................... v bat to 0 v current into ring-trip inputs ............................ 10 ma c3 ? c1, d2 ? d1, e1, ovh input voltage ......................... ? 0.4 v to v cc + 0.4 v maximum power dissipation, continuous, t a = 85 c, no heat sink (see note): in 32-pin plcc package..............................1.33 w thermal data ................................................................. ja in 32-pin plcc package....................... 45 c/w typ note: thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165 c. the device should never see this temperature and operation above 145 c junction temperature may degrade device reliability. see the slic packaging considerations for more information. stresses above those listed under absolute maximum ratings may cause permanent device failure. functionality at or above these limits is not implied. exposure to absolute maximum ratings for extended periods may affect device reliability. operating ranges commercial (c) device ambient temperature .............................0 c to +70 c* v cc ................................................ +4.75 v to +5.25 v v neg ................................................... ? 4.75 v to v bat v bat ...................................................... ? 40 v to ? 58 v agnd/dgnd .......................................................... 0 v bgnd with respect to agnd/dgnd....................... ? 100 mv to +100 mv load resistance on vtx to ground .............. 20 k ? min the operating ranges define those limits between which the functionality of the device is guaranteed. * functionality of the device from 0 c to +70 c is guaranteed by production testing. performance from ? 40 c to +85 c is guaranteed by characterization and periodic sampling of production units.
6 am7946 data sheet electrical characteristics description test conditions (see note 1) min typ max unit note v vtx , analog output offset voltage 0 c to +70 c ? 40 c to +85 c ? 35 ? 40 +35 +40 mv ? 4 overload level, 2-wire active state, ovh = high 2.5 vpk 2a overload level, 2-wire active state, ovh = low 6.0 overload level on hook, r lac = 600 ? , ovh = high 1.06 vrms 2b total harmonic distortion (thd) 0 dbm +7 dbm ? 64 ? 55 ? 50 ? 40 db thd, on hook 0 dbm, r lac = 600 ? ? 36 5 longitudinal performance (see test circuit c) longitudinal to metallic l-t, l-4 balance 200 hz to 1 khz: ? 1, ? 3* normal polarity ? 2, ? 4 reverse polarity ? 2 normal polarity, ? 2, ? 4 ? 40 c to +85 c 52 63 58 58 db 4 1 khz to 3.4 khz: ? 1, ? 3* normal polarity ? 2, ? 4 reverse polarity ? 2 normal polarity, ? 2, ? 4 ? 40 c to +85 c 52 58 54 54 4 longitudinal signal generation 4-l 200 hz to 800 hz normal polarity 40 longitudinal current per pin (a or b) active or oht state 27 35 marms longitudinal impedance at a or b 0 to 100 hz 10 35 ? /pin idle channel noise c-message weighted noise r ldc = 600 ? +25 c to +85 c r ldc = 600 ? ? 40 c to +25 c +7 +10 +12 dbrnc ? 4 psophometric weighted noise r ldc = 600 ? +25 c to +85 c r ldc = 600 ? ? 40 c to +25 c ? 83 ? 80 ? 78 dbmp ? 4 insertion loss and balance return signal (see test circuits a and b) gain accuracy 2- to 4-wire, 4- to 4-wire 0 dbm, 1 khz, nonmetering 0 dbm, 1 khz, 2.2 v metering on hook, oht ? 6.22 ? 6.12 ? 6.37 ? 6.02 ? 5.92 ? 6.02 ? 5.82 ? 5.72 ? 5.67 db 4 gain accuracy 4- to 2-wire 0 dbm, 1 khz, nonmetering 0 dbm, 1 khz, 2.2 v metering on hook, oht ? 0.20 ? 0.20 ? 0.35 0 0 0 +0.20 +0.20 +0.35 gain accuracy over frequency 300 to 3400 hz 0 c to +70 c relative to 1 khz ? 40 c to +85 c ? 0.10 ? 0.15 +0.10 +0.15 4 4 gain tracking relative to 0 dbm +3 dbm to ? 55 dbm 0 c to +70 c ? 40 c to +85 c ? 0.10 ? 0.15 +0.10 +0.15 4 4 gain tracking, on hook, oht relative to 0 dbm 0 dbm to ? 37 dbm 0 c to +70 c ? 40 c to +85 c +3 dbm to 0 dbm ? 0.10 ? 0.15 ? 0.35 +0.10 +0.15 +0.35 4 4 4 group delay 0 dbm, 1 khz 3 s 4, 6 note: * performance grade
slic products 7 electrical characteristics (continued) line characteristics i l , loop-current accuracy i l in constant-current region 0.915i l i l 1.085i l ma i l , long loops, active state r ldc = 1840 ? , v bat = ? 50 v, ovh = low 20.5 r ldc = 2030 ? , v bat = ? 50 v, ovh = high 20.5 i l , accuracy, standby state t a = 25 c 0.8i l i l 1.2i l constant-current region 16 22 39 i l lim active, a and b to ground oht, a and b to ground 100 50 130 4 i l , open circuit state r l = 0 ? 100 a i a , pin a leakage, tip open state r l = 0 ? 100 i b , pin b current, tip open state b to ground b to v bat + 6 v 26 15 ma v a , standby state, ground-start signaling a to ? 48 v = 7 k ? , b to ground = 100 ? ? 7.5 ? 5 v 4 v ab , open circuit voltage bat = ? 50 v 42.75 44.5 8 power supply rejection ratio (v ripple = 100 mvrms), active normal state v cc 50 hz to 3.4 khz 30 40 db 5 v neg 50 hz to 3.4 khz 30 50 v bat 50 hz to 3.4 khz 28 55 effective internal resistance cas pin to ground 85 170 255 k ? 4 power dissipation on hook, open circuit state 30 70 mw on hook, standby state 60 85 on hook, oht state 120 180 on hook, active state r tmg = 2.5 k ? 180 270 off hook, standby state 860 1300 off hook, active state r l = 300 ? , r tmg = 2.5 k ? 550 800 supply currents, battery = ? 58 v i cc , on-hook v cc supply current open circuit state standby state oht state active normal state 2.7 3.3 4.9 6.3 3.8 4.4 7.5 8.5 ma i neg , on-hook v neg supply current open circuit state standby state oht state active normal state 0 0 0.70 0.70 0.1 0.1 1.1 1.1 i bat , on-hook v bat supply current open circuit state standby state oht state active normal state 0.35 1.0 1.9 3.0 1.0 1.5 4.7 5.7 rfi rejection rfi rejection 100 khz to 30 mhz, (see figure f) 1.0 mvrms 4 i l v bat 3v ? r l 400 + -------------------------------- - =
8 am7946 data sheet electrical characteristics (continued) relay driver schematics logic inputs (c3 ? c1, d2 ? d1, e1, ovh) v ih , input high voltage 2.0 v v il , input low voltage 0.8 i ih , input high current ? 75 40 a i il , input low current ? 400 logic output (det ) v ol , output low voltage i out = 10 ma 1.0 v v ol , output low voltage i out = 0.8 ma 0.40 v oh , output high voltage i out = ? 0.1 ma 2.4 ring-trip detector input (da, db) bias current ? 500 ? 50 na offset voltage source resistance = 2 m ? ? 50 0 +50 mv 6 loop detector i t , loop-detect threshold r d = 35.4 k ? , active state 330/r d 375/r d 420/r d ma r d = 35.4 k ? , standby state 380/r d 430/r d 480/r d ground-key detector thresholds ground-key resistive threshold b to ground 2 5 10 k ? ground-key current threshold b to ground 10 ma relay driver output (ryout1, ryout2, and ringout) v ol , on voltage (each output) i ol = 30 ma +0.25 +0.4 v v ol , on voltage (each output) i ol = 40 ma +0.35 +0.6 4 i oh , off leakage (each output) v oh = +5 v 100 a zener breakover (each output) i z = 100 a 6.6 7.9 v zener on voltage (each output) i z = 30 ma 11 ryout1 bgnd ryout2 bgnd rye ringout bgnd
slic products 9 notes: 1. unless otherwise noted, test conditions are bat = ? 52 v, v cc = +5 v, v neg = ? 5 v, r l = 600 ? , r dc1 = r dc2 = 28.4 k ? , r d = 35.4 k ? , r sg = 0 ? to gnd, r tmg = 2.5 k ? , no fuse resistors, c hp = 0.22 f, c dc = 0.1 f, c cas = 0.1 f, d1 = 1n400x, two-wire ac input impedance is a 600 ? resistance synthesized by the programming network shown below. 2. a. overload level is defined when thd = 1%. b. overload level is defined when thd = 1.5%. 3. balance return signal is the signal generated at v tx by v rx . this specification assumes that the two-wire ac load impedance matches the programmed impedance. 4. not tested in production. this parameter is guaranteed by characterization or correlation to other tests. 5. this parameter is tested at 1 khz in production. performance at other frequencies is guaranteed by characterization. 6. tested with 0 ? source impedance. 2 m ? is specified for system design only. 7. group delay can be greatly reduced by using a z t network such as that shown in note 1 above. the network reduces the group delay to less than 2 s and increases 2wrl. the effect of group delay on linecard performance also may be compen- sated for by synthesizing complex impedance with the qslac ? or dslac ? device. 8. if |bat| drops below 50 v, the vab voltage tracks the battery to preserve transmission capability. open-circuit vab can be modified using r sg . note: only ? 1 and ? 2 performance grade devices support polarity reversal. table 1. slic decoding (det ) output state c3 c2 c1 two-wire status e1 = 1 e1 = 0 0 1 2 3 4 5 6 7 000 001 010 011 100 101 110 111 open circuit ringing active on-hook tx (oht) tip open standby active polarity reversal oht polarity reversal ring trip ring trip loop detector loop detector loop detector loop detector loop detector loop detector ring trip ring trip ground key ground key ground key ground key ground key ground key r t2 = 75 k ? c t1 = 125 pf r t1 = 75 k ? vtx rsn v rx r rx = 150 k ? ~
10 am7946 data sheet table 2. user-programmable components z t is connected between the vtx and rsn pins. the fuse resistors are r f and z 2win is the desired 2-wire ac input impedance. when computing z t , the internal current amplifier pole and any external stray capacitance between vtx and rsn must be taken into account. z rx is connected from v rx to r sn . z t is defined above, and g 42l is the desired receive gain. r dc1 , r dc2 , and c dc form the network connected to the rdc pin. r dc1 and r dc2 are approximately equal. i l is the desired loop current in the constant-current region. r d and c d form the network connected from r d to gnd and i t is the threshold current between on hook and off hook. c cas is the filter regulator filter capacitor and f c is the desired filter cutoff frequency. thermal management equations ( normal active, polarity reverse active, and tip open states ) r tmg is connected from t mg to v bat and is used to limit power dissipation within the slic in active and tip open states only. power dissipated in the resistor, r tmg , during active and tip open states. power dissipated in the slic while in active and tip open states. z t 250 z 2win 2r f ? () ( ) = z rx z l g 42l ----------- 500z t z t 250 z l 2r f + () + ------------------------------------------------- ? = r dc1 r dc2 1250 i l ----------- - = + c dc 1.5 ms r dc1 r dc2 + r dc1 r dc2 ------------------------------- - ? = r d 375 i t -------- - c d 0.5 ms r d ---------------- - = , = c cas 1 3.4 10 5 f c ? ----------------------------- = r tmg v bat 6v ? i l ------------------------------- - p rtmg v bat 6v ? i l r l ? ? () 2 r tmg ----------------------------------------------------------------- = p slic v bat i l ? p rtmg ? r l i l () 2 ? 0.12w + =
slic products 11 dc feed characteristics 0 i l (ma) vab (volts) 30 60 1 2 3 r dc = r dc1 + r dc2 = 56.8 k ? a. load line (typical) notes: 1. 2. v bat 48 v ovh 1 = , < vab 1 1250 r dc ----------- - r l ? = vab 2 0.818 v bat ? 5.356 i l r dc 369 ---------- - ? ? + = vab 3 0.818 v bat ? 2.740 i l r dc 359 ---------- - ? ? + = v bat 48 v, ovh = 1 vab 1 1250 r dc ----------- - r l ? = vab 2 0.818 v bat ? 2.276 ? i l r dc 369 ---------- - ? ? 18587 r sg 35500 v bat 48 ? ----------------------------- + + 1777 0.131 r sg 35500 v bat 48 ? ----------------------------- + ? + ----------------------------------------------------------------------------------------- + = vab 3 0.818 v bat ? 4.894 ? i l r dc 359 ---------- - ? ? 18587 r sg 35466 v bat 48 ? ----------------------------- + + 1777 0.131 r sg 35466 v bat 48 ? ----------------------------- + ? + ----------------------------------------------------------------------------------------- + = 10 20 50 40 30 20 10 v bat 52 v ovh 0 = , < vab 1 1250 r dc ----------- - r l ? = vab 2 0.818 v bat ? 5.356 i l r dc 369 ---------- - ? ? + = vab 3 0.818 v bat ? 2.740 i l r dc 359 ---------- - ? ? + =
12 am7946 data sheet dc feed characteristics (continued) 3. where v bat 52 v ovh 0 = , vab 1 1250 r dc ----------- - r l ? =r l r load r fuse + = vab 2 0.904 v bat ? 11.031 ? i l r dc 369 ---------- - 18587 r sg 174000 v bat 48 ? ----------------------------- + + 1777 0.131 r sg 174000 v bat 48 ? ----------------------------- + ? + ----------------------------------------------------------------------------------------- + ? ? = vab 3 0.904 v bat ? 13.649 ? i l r dc 359 ---------- - ? ? 18587 r sg 174000 v bat 48 ? ----------------------------- + + 1777 0.131 r sg 174000 v bat 48 ? ----------------------------- + ? + ----------------------------------------------------------------------------------------- + = r l r dc2 a b rsn rdc slic figure 1. dc feed characteristics feed current programmed by r dc1 and r dc2 a b i l r dc1 c dc b. feed programming
slic products 13 test circuits r t r rx v ab v l r l 2 i l2-4 = 20 log (v tx / v ab ) a. two- to four-wire insertion loss a(tip) b(ring) agnd vtx rsn slic r t v ab a(tip) b(ring) agnd vtx rsn slic r l r rx v rx i l4-2 = 20 log (v ab / v rx ) brs = 20 log (v tx / v rx ) b. four- to two-wire insertion loss and balance return signal r t r rx r l 2 r l 2 v rx s1 c s2 v l v l a(tip) b(ring) agnd vtx rsn slic 1 c << r l l-4 long. bal. = 20 log (v tx / v l ) l-t long. bal. = 20 log (v ab / v l ) 4-l long. sig. gen. = 20 log (v l / v rx ) c. longitudinal balance r l 2 v ab s2 open, s1 closed s2 closed, s1 open
14 am7946 data sheet test circuits (continued) a(tip) b(ring) e. ground-key switching r g d. two-wire return loss test circuit r r return loss = ? 20 log (2 v m / v s ) z d : the desired impedance; e.g., the characteristic impedance of the line v m z in v s a(tip) b(ring) agnd vtx rsn slic r t2 r rx c t1 r t1 z d f. rfi test circuit 50 ? l 1 200 ? 200 ? c 1 c 2 b hf gen vtx a slic under test l 2 cax 33 nf cbx 33 nf rf 1 rf 2 50 ? 50 ? 1.5 vrms 80% amplitude modulated 100 khz to 30 mhz
slic products 15 test circuits (continued) g. am7946 test circuit vcc r d rd vtx agnd/ dgnd rsn r rx r dc2 r dc1 c dc r t rdc c3 c2 c1 +5 v vbat det d 1 bgnd ringout hpb c hp hpa db da a(tip) b(ring) bat 2.2 nf 2.2 nf v tx v rx a(tip) b(ring) e1 d2 tmg r tmg vdc d1 ovh ryout1 ryout2 rye vneg ? 5 v cas rsg c cas c d 0.1 f battery ground analog ground digital ground
16 am7946 data sheet physical dimension pl032 revision summary revision a to b ? minor changes were made to the data sheet style and format to conform to legerity standards. revision b to revision c ? in table 2, user-programmable components, added ?polarity reverse active? to the ?thermal management...? header. ? minor changes were made to the data sheet style and format to conform to legerity standards. revision c to revision d ? the physical dimension (pl032) was added to the physical dimension section. ? updated the pin description table to correct inconsistencies. .050 ref. .026 .032 top view pin 1 i.d. .485 .495 .447 .453 .585 .595 .547 .553 16-038fpo-5 pl 032 da79 6-28-94 ae side view seating plane .125 .140 .009 .015 .080 .095 .042 .056 .013 .021 .400 ref. .490 .530
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