View TB2118FG_3154845.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TB2118FG 2006-04-12 1 toshiba bi ? cmos integrated circuit silicon monolithic TB2118FG high speed pll for dts TB2118FG is a high ? speed phase ? locked loop (pll) lsi for car audio tuners with a built ? in charge pump circuit. all functions are controlled through serial bus lines. the device is used to configure high ? performance digital tuning systems. features ? built ? in high ? speed program divider with built ? in prescalers. fm: 30~150mhz (pulse swallowing method) am: 1~40mhz (pulse swallowing method) ? phase comparator outputs are constant current output for both fm and am. current values can be switched using serial data. in high ? speed mode for large current output seek, the lockup time between fm band edges can be set to approx. 500s by selecting an appropriate vt range and low ? pass filter constant. ? rds supported n ? value data and charge pump output current data (total of 18 ? bits) can be selected using two resisters. ? built ? in low ? pass filter op ? amps for fm and am. ? built ? in 20 ? bit binary counter for counting if frequency. ? crystal oscillator can be used 10.25mhz or 10.35mhz. ? two output ports (open ? collector output) and two i / o ports (cmos) supported. ? package is ssop 24 pin. (note) pins 1 and 24 are susceptible to surge. take care when handling. weight: 0.31g (typ.)
TB2118FG 2006-04-12 2 pin connection 24 x i 23 a ? gnd 22 reg. 21 v cc 20 am cp 19 v t 18 fm cp 17 d ? gnd x o 1 osc 2 ce 3 d in 4 ck 5 d out 6 sr 7 i / o ? 18 16 am vco 15 fm vco 14 v dd 13 ifc i / o ? 29 out ? 211 v dd2 12 10 out ? 1 block diagram 14 8 7 9 12 21 23 17 x 19 13 5 6 4 3 15 2 16 24 18 10 11 1 x 20 22 osc circuit phase comparator reference counter prescaler 4 ? bit swallow counter 12 ? ? ? bit binary counter 40 ? bit shift register serial interface i / o port output port d ? gnd v cc a ? gnd v dd i / o ? 1 i / o ? 2 sr v dd2 out ? 1 out ? 2 constant power supply voltage + ? ?
TB2118FG 2006-04-12 3 pin function pin no. symbol pin name function and operation remarks 1 x o 24 x i crystal oscillator pins ? serial data input: setting f0 and f1 bits selects the frequency of the crystal oscillator to be connected. buff. on /off osc circuit osc x in x out 2 osc crystal oscillator output pin ? setting the osc bit outputs the oscillation frequency. 0 = output off 1 = output on D 15 fm vco fm band local signal input ? serial data input: when am / fm bit = "0" fm vco is selected. ? input signal is directly transferred to the swallow counter. ? input frequency: 30 to 150mhz ? divided frequency: 528 to 65.535 16 am vco am band local signal input ? serial data input: when am / fm bit = "1" am vco is selected. ? when mode = "1" am band is selected (by pulse swallow). input frequency: 1.0 to 40mhz divided frequency: 528 to 65.535 r fin 13 ifc if signal input ? input frequency: 0.1 to 15mhz ? the selected signal is input to a 20 ? bit general ? purpose counter via a gate circuit. r fif 3 ce chip enable input 5 ck clock input 4 d in serial data input 6 d out serial data output serial interface pins. ? data used for controlling TB2118FG are exchanged between controllers. ? control data are input via d in in sync. with clock input via ck. control data input start / stop is specified using ce. ? general ? purpose counter data are output in sync. with clock input via ck from d out . ? the ck / ce / d in pin is schmitt trigger input. ce / ck / d in d out
TB2118FG 2006-04-12 4 pin function pin no. symbol pin name function and operation remarks 7 sr register control pin. ? selects register 1 or 2. "l" = register 1 output "h" = register 2 output D 8 i / o ? 1 9 i / o ? 2 i / o ports ? input or output is switched in units of bits by serial data input. ? cmos input / cmos output ? at power on, set to input ports. v dd 10 out ? 1 11 out ? 2 output ports ? open collector output ports. 12 v dd2 ? single power supply for reference frequency block ? v dd2 = 3.0 to 5.5v (note that v dd v dd2 ) ? due to the crystal high ? frequency receive interference characteristic, we recommend an r d setting so that v dd2 = 3.5v. 14 12 v dd v dd2 r d 14 v dd 17 d ? gnd cmos power pins ? power pins for digital block (digital circuits). ? v cc = 4.5 to 5.5v, d ? gnd = 0v 21 v cc 23 a ? gnd bipolar power pins ? power pins for analog block (eg, op ? amps, constant ? voltage supply) ? v cc = 8 to 10v, a ? gnd = 0v D 22 reg. ripple filter connecting pin. ripple filter connecting pin for internal constant voltage supply. insert about 10f (as high as possible) between this pin and a ? gnd. D 19 v t tuning voltage ? input from the plus terminal of the op ? amp is internally biased to 2.5v. ? external crystal for phase correction is required because low gain is set by high through rate. 21 + ? 100 ? 1000 p f
TB2118FG 2006-04-12 5 pin function pin no. symbol pin name function and operation remarks 20 am cp am charge pump output charge pump output for am ? serial data input: when am / fm = "1" error output from the phase comparator is output as constant current. f ref > f sig : ( ? ) current output f ref = f sig : high impedance f ref < f sig : (+) current output ? serial data: output current can be switched using cr0 and cr1 bits. ? normally (when using am op ? amp), set the op sel bit to "1". 18 fm cp fm charge pump output charge pump output for fm ? serial data input: when am / fm = "0" error output from the phase comparator is output as constant current. f ref > f sig : ( ? ) current output f ref = f sig : high impedance f ref < f sig : (+) current output ? serial data: output current can be switched using cr0 and cr1 bits. ? normally (when using fm op ? amp), set the op sel bit to "0". v dd inverter amp 19 current switcher phase comparator
TB2118FG 2006-04-12 6 operation 1. configuration of control data (serial data input / output) 1) data input mode (valid data length changes according to the address.) a 0 a 1 a 2 a 3 input mode valid data length remarks 0 # 0 1 (1) 24bits processes frequency change. 0 # 1 0 (2) 32bits processes band change. 0 # 1 1 (3) 40bits processes power on (initialization). when "0" is set in bits marked with #, data are loaded to register 1; when "1" is set, to register 2. (note) either "0" or "1" can be set in bits marked with *. ts1 and ts2 are pins for internal testing. at power on, be sure to clear to "0" (data set). * * * * a 3 a 0 a 1 a 2 (note) (address) p00 p01 p02 p03 p07 p04 p05 p06 p08 p09 p10 p11 p15 p12 p13 p14 cr0 cr1 p00 p01 p02 p03 p07 p04 p05 p06 p08 p09 p10 p11 p15 p12 p13 p14 cr0 cr1 register 1 register 2 start out1 out2 * i / o1 i / o2 f0 f1 osc ioc1 ts2 ioc2 doc ts1 r 0 r 1 r 2 g0 am / fm g1 opsel mode input mode (1) input mode (2) input mode (3) (note) test bit
TB2118FG 2006-04-12 7 2) data output mode (note) either "0" or "1" can be set in bits marked with *. * * * * (note) (address) * * * * * * * * 1 0 0 0 c 00 c 01 c 02 c 03 c 07 c 04 c 05 c 06 c 08 c 09 c 10 c 11 c 15 c 12 c 13 c 14 c 16 c 17 c 18 c 19 over busy i / o1 i / o2
TB2118FG 2006-04-12 8 3) serial data transfer formats ? data input mode (at input, d out becomes high impedance.) (note) when power for TB2118FG is fully on, input data after 100ms or more. until data input starts, set the ce pin to gnd to avoid any noise input. data output mode (note) normally, d out is high impedance. during data output, data output mode is terminated by changing ce = h to l. 0.5 s min. 1 s min. ce ck can be omitted 0.5 s min. 0.5 s min. 0.5 s min. end 0.1 s max. d in 0.5 s min. can be omitted in p ut address a 0 a 1 a 2 a 3 d0 d1 d2 d3 d4 d5 d36 d37 d38 d40 d39 internal data ce ck can be omitted end d in can be omitted output address a 0 a 1 a 2 a 3 0.1 s max. (low level) d0 d1 d2 d3 d4 d5 d20 d21 d22 d24 d23 d out (high impedance) internal registers preset by pull ? up resistor value (high level) (high impedance)
TB2118FG 2006-04-12 9 2. setting reference frequency ? related (reference divider block) items 1) setting crystal oscillator (osc) with TB2118FG, the two ? frequency oscillator shown below can be driven by self ? oscillation. f0 bit f1 bit input frequency 0 0 10.25mhz 0 1 10.35mhz (note) at power on, f0 / f1 = 0. ? connection example (note) use a crystal oscillator with r s = 50 ? and less and c l = 12pf or less. 2) setting reference frequency (r 0 , r 1 , r 2 ) r 0 r 1 r 2 10.25mhz 10.35mhz 0 0 0 D D 1 0 0 50khz 50khz 0 1 0 D D 1 1 0 D D 0 0 1 10khz D 1 0 1 D 9khz 0 1 1 D D 1 1 1 1khz D (note) do not select settings where is enterd instead of frequency. 3) osc output select (osc) = oscillation frequency is output from the osc out pin. osc osc out pin 0 output off 1 output on (note) at power on, osc = 0. 1 24 2 x out 2 pf x in 6 pf c l osc out
TB2118FG 2006-04-12 10 3. setting programmable counter block 1) circuit configuration the progammable counter block consists of a 2 ? modulus prescaler, 4 ? bit swallow counter, and 12 ? bit programmable binary counter. 2) setting input pin / dividing mode (am / fm, mode) am / fm mode input pin input frequency divided frequency dividing mode 0 0 fm vco 30~150mhz 1 1 am vco 1~40mhz 528~65.535 by pulse swallow (16 ? bit) 3) setting divided frequency (p 00 to p 15 ) ? by pulse swallow (in fw or sw mode), n = 528 to 65.535 x psc 15 16 2 ? modulus prescaler 12 ? bit (p 04 to p 15 ) programmable binary counter 4 ? bit ( p 00 to p 03 ) swallow counter am vco fm vco (am) (mode, am / pm) (fm) prs f sig to phase comparator p00 p01 p02 p03 p07 p04 p05 p06 p08 p09 p10 p11 p15 p12 p13 p14 lsb 2 0 msb 2 15
TB2118FG 2006-04-12 11 4. control of phase comparator and charge pumps the phase comparator compares the phase difference between the reference frequency signal (f ref ) and the programmable counter divisor output (f sig ) and outputs the result. the constant current driver block outputs phase error signals as a current. 1) setting charge pumps and op ? amps (opsel) the opsel bit is used to select a charge pump and an op ? amp. opsel charge pump (cp) output op ? amp am cp output fm cp output 0 dofm fm amp hz do 1 doam am amp do hz hz = high impedance do = tri ? state output 2) setting current value (cro) am / fm = "1" (am in input) am / fm = "0" (fm in input) cr1 cr0 am cp out output current cr1 cr0 fm cp out output current 0 0 0.3ma 0 0 250a 0 1 0.5ma 1 0 5ma 3) connection example (the filter circuit is an example for reference. check and design depending on the desired characteristics for your set.) v t 20 100 ? 1000 p f 0.47 f 15 k ? 18 19 0.047 f 3.3 k ? 100 pf 8200 p f fm cp out v t a m cp out
TB2118FG 2006-04-12 12 5. control of general ? purpose counter circuit the general ? purpose counter is a 20 ? bit counter used to measure the intermediate frequency. this is used at auto tuning for detecting a radio station. setting "1" in the start bit starts counting after counter reset. 1) circuit configuration 2) setting if counter gate time / wait time (g 0 , g 1 ) g 0 g 1 gate time wait time 0 0 1ms 1 0 4ms 3.3~4.3ms 0 1 16ms 1 1 64ms 7.3~8.3ms 3) counter output data (c 00 to c 19 ) 13 20 ? bit binary counter overflow detection ifc gate time control circuit busy detector start g 0 g 1 reset busy over c 00 to c 19 lsb 2 0 msb 2 19 c 00 c 01 c 02 c 03 c 07 c 04 c 05 c 06 c 08 c 09 c 10 c 11 c 15 c 12 c 13 c 14 c 19 c 16 c 17 c 18
TB2118FG 2006-04-12 13 4) detecting counter operating status busy counter operating status over counter value 0 counting ended 0 n 2 20 ? 1 1 counting 1 n 2 20 (overflow) (*) setting the doc bit to "1" enables constant output of busy state from the d out pin. note that at this time, the busy status is the inversion of the busy bit: busy status = 0 (counting) and busy status = 1 (counting ended). the doc bit is set to "0" at power on. 5) counter timing (when pll data are updated and counting starts) ce (new data) (old data) wait time gate time ( * ) constant output from d out pin enabled. pll data gate counter input busy over
TB2118FG 2006-04-12 14 6. setting general ? purpose i / o ports 1) setting output ports (out ? 1, out ? 2) out1, 2 output port status 0 driver off (high impedance) 1 driver on (low level) 2) setting i / o control and i / o output ports (i / o1, i / o2, i / oc1, ioc2) ioc1, 2 i / o port setting i / o1, 2 output port status 0 input port (cmos input) 0 low ? level output 1 output port (cmos output) 1 high ? level output (note) valid only when set to output port. at power on, i / o ports are set to input. 3) reading i / o port data (i / o1, i / o2: output mode data) i / o1, 2 input port status 0 low ? level output 1 high ? level output (note) valid only when set to input port. 7. others 1) control (doc) of serial data output (d out ) doc d out output status remarks 0 other than in output made, high impedance. D 1 outputs busy status of general ? purpose counter (constant output mode). 0: counting 1: counting ended at power on, doc = 0.
TB2118FG 2006-04-12 15 absolute maximum ratings (ta = 25c) characteristics symbol rating unit power supply voltage (1) v dd ? 0.3~6.0 v power supply voltage (2) v cc ? 0.3~11.0 v v dd input voltage v in (1) ? 0.3~v dd +0.3 v v cc input voltage v in (2) ? 0.3~v cc +0.3 v applied voltage on pins (6), (10), (11) v ceo 12 v powe dissipation p d 430 mw operating temperature t opr ? 40~85 c storage temperature t stg ? 65~150 c electrical characteristics (unless otherwise specified, ta = 25c, v cc = 8.5, v dd = 5v, v dd2 = 3.5v, v ss = gnd = 0v) supply voltage and current (v cc , v dd , v dd2 , a ? gnd, d ? gnd) characteristics symbol test cir ? cuit test condition min. typ. max. unit v cc 8.0 8.5 10.0 v dd 4.5 5.0 5.5 operating power supply voltage v dd2 D ta = ? 40~85c 3.0 3.5 5.5 v i cc v cc = 10v max. D 17.0 25.0 i dd v dd = 5.5v max. D 20.0 29.0 operating power supply current i dd2 D f xt = 10.25mhz ta = 25c fm in = 150mhz v dd2 = 5.5v max. D 0.25 1.0 ma crystal oscillator circuit (x tin , x tout ) crystal oscillator frequency f xt D connect the crystal oscillator to x tin and x tout . D 10.25 10.35 mhz oscillator output level osco 1 osc pin 100 560 D mv rms test circuit 1 monitor 10 k ? 10 p f 2
TB2118FG 2006-04-12 16 operating frequency range (fm in , am in , am / fm if) characteristics symbol test cir ? cuit test condition min. typ. max. unit fm vco operating frequency f fm D v in = 0.2vp ? p, sine wave input, capacitive coupling, by pulse swallow 30 ~ 150 mhz am vco operating frequency f am D v in = 0.2vp ? p, sine wave input, capacitive coupling, by pulse swallow 1.0 ~ 40 mhz ifc operating frequency f if D v in = 0.2vp ? p, sine wave input, capacitive coupling, ifc pin 0.1 ~ 15 mhz input range (fm vco , am vco , ifc) ifc input level ifc v in D input frequency 0.1~15mhz 0.2 ~ v dd ? 0.5 vp ? p input frequency 30~120mhz (*) 0.141 ~ v dd ? 0.5 fm vco input level fm vco v in D input frequency 120~150mhz 0.2 ~ v dd ? 0.5 vp ? p input frequency 1.0~15mhz (*) 0.113 ~ v dd ? 0.5 am vco input level am vco v in D input frequency 15~40mhz 0.2 ~ v dd ? 0.5 vp ? p (*) weekly code 9843~. serial interface (ce, ck, d in , d out , sr) high level v ih (1) v dd ? 1.5 ~ v dd input voltage low level v il (1) D ce, ck, d in , sr pins 0 ~ 1.5 v high level i ih (1) v ih = 5v ? 1.0 D +1.0 input current low level i il (1) D v il = 0v ? 1.0 D +1.0 a low ? level output current i ol (1) D v ol = 0.2v 0.8 3.0 D ma output off ? leak current i off (1) D d out pin v oh = 5v ? 1.0 D +1.0 a output ports (out ? 1, out ? 2) low ? level output current i ol (2) D v ol = 0.2v 0.8 3.0 D ma output off ? leak current i off (2) D v oh = 10v ? 1.0 D +1.0 a
TB2118FG 2006-04-12 17 i / oports (i / o ? 1, i / o ? 2) high level i ih (2) v ih = 5v ? 1.0 D +1.0 input current low level i il (2) D v il = 0v ? 1.0 D +1.0 a high level v ih (2) v dd ? 1.5 ~ v dd input voltage low level v il (2) D 0 ~ 1.5 v high level i oh (1) v oh = 4.0v ? 5.0 ? 7.5 D output current low level i ol (3) D v ol = 1.0v 3.5 4.5 D ma charge pumps (amcp out , fmcp out ) test characteristics symbol test cir ? cuit condition cr0 bit cr1 bit min. typ. max. unit i ofm (1) 0 0 0.20 0.25 0.4 fm charge pump output current i ofm (2) D dofm pin 0 1 4.0 5.0 7.0 ma i oam (1) 0 0 0.2 0.3 0.45 am charge pump output current i oam (2) D D doam pin 1 0 0.4 0.5 0.75 ma op ? amps (v t ) i ol v in = v dd , v out = 8.5v 1.0 2.0 D am op ? amp output current i oh D v in = gnd, v out = 0v ? 1.0 ? 2.0 D ma i ol v in = v dd , v out = 8.5v 5.0 9.0 D fm op ? amp output current i oh D v in = gnd, v out = 0v ? 5.0 ? 9.0 D ma v t output voltage v vt D 0.3 ~ vcc ? 1.1 v
TB2118FG 2006-04-12 18 application circuit 1 x tin agnd rf v cc a m cpout fm cpout dgnd amvco 24 23 22 21 20 19 18 17 16 15 13 14 1 2 3 4 5 6 7 8 9 10 12 11 v t fmvco v dd if in v dd d ? gnd v cc a ? gnd x tout osc out ce d in ck sr i / o ? 1 i / o ? 2 d out out ? 1 out ? 2 v dd2 v dd2 x v cc 10 f 0.047 f 6 p f x ?tal 10.25 mhz 10.35 mh z max. 12 pf v dd v t 100 ? 1000 p f a m vco a m vco am / fm if 0.01 f 0.047 f r d 0.047 f 2 p f 0.01 f psc regurato r 4 bit swallow counter phase comparator oscillation circuit 2 modulas prescaler 12 bit programable counter 40 bit shift resister 20 bit counter reference counter b us i n t er f ace n data i / o p or t s out por t s on / off buffer amp amp amp ? + ? +
TB2118FG 2006-04-12 19 package dimensions weight: 0.31g (typ.)
TB2118FG 2006-04-12 20 restrictions on product use 060116eb a ? the information contained herein is subject to change without notice. 021023_d ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizi ng toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handli ng guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc. 021023_a ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk. 021023_b ? the products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_q ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. 021023_c ? the products described in this document are subject to the foreign exchange and foreign trade laws. 021023_e about solderability, following conditions were confirmed ? solderability (1) use of sn-37pb solder bath solder bath temperature = 230c dipping time = 5 seconds the number of times = once use of r-type flux (2) use of sn-3.0ag-0.5cu solder bath solder bath temperature = 245c dipping time = 5 seconds the number of times = once use of r-type flux

▲Up To Search▲

Price & Availability of TB2118FG

	To Download TB2118FG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .