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august 2007 rev. 13 1/17 17 STLVDS32B high speed differential line receivers features meets or exceeds the requirements of ansi tia/eia-644 standard operates with a single 3.3 v supply designed for signaling rate up to 400 mbps differential input thre sholds 100 mv max typical propagation delay time of 2.5 ns power dissipation 60 mw typical per receiver at 200 mhz low voltage ttl (lvttl) logic output levels pin compatible with the am26ls32, sn65lvd32 open circuit fail safe esd protection: 7 kv receiver pins 3 kv all pins vs gnd description the stlvds32 is a differential line receiver that implements the electrical characteristics of low voltage differential signaling (lvds). this signaling technique lowers the output voltage levels of 5 v differential standard levels (such as tia/eia-422b) to reduce the power, increase the switching speeds and allow operations with a 3.3 v supply rail. this differential receiver provides a valid logical output state with a 3.3 v supply rail. it also provid es a valid logical output state with a 100 mv differential input voltage within the input common mode voltage range. the input common mode voltage allows 1 v of ground potential difference between two lvds nodes. the intended application of this device and signalling technique is bo th point-to-point and multidrop data transmission over controlled impedance media approximately 100 . the transmission media may be printed circuit board traces, backplanes or cables. the ultimate rate and distance of data transfer depend upon the attenuation characteristics of the media and noise coupling to the environment. the stlvds32 version is characterized for operation from -55c to 125c. sop tssop table 1. device summary order code temperature range package packaging STLVDS32Bdr -55 to 125 c so16 (tape & reel) 2500 parts per reel STLVDS32Btr -55 to 125 c tssop16 (tape & reel) 2500 parts per reel www.st.com
STLVDS32B 2/17 contents 1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 typical performance characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
STLVDS32B pin configuration 3/17 1 pin configuration figure 1. pin connections and functional diagram table 2. pin description pin n symbol name and function 2, 6, 10, 14 1a to 4a receiver inputs 1, 7, 9, 15 1b to 4b negated receiver inputs 3, 5, 11, 13 1y to 4y receiver outputs 4 g enable 12 g enable 8 gnd ground 16 v cc supply voltage
pin configuration STLVDS32B 4/17 l=low level, h=high level, x=don?t care, z= high impedance figure 2. logic diagram and logic symbol table 3. truth table differential inpu ts enables outputs a, b g g y v id 100mv hxh xlh -100mv < v id < 100mv hx? xl? v id -100mv hxl xll xlhz open hxh xlh
STLVDS32B maximum ratings 5/17 2 maximum ratings note: absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these condition is not implied. table 4. absolute maximum ratings symbol parameter value unit v cc supply voltage (1) 1. all voltages except differential i/o bus voltage, are with respect to t he network ground terminal. -0.5 to 4.6 v v i input voltage -0.5 to (v cc + 0.5) v v i input voltage (a or b inputs) -0.5 to 4.6 v esd human body model pins receivers 7 kv all pins vs gnd 3 t stg storage temperature range -65 to +150 c table 5. recommended operating conditions symbol parameter min. typ. max. unit v cc supply voltage 3.0 3.3 3.6 v v ih high level input voltage (enable) 2.0 v v il low level input voltage (enable) 0.8 v |v id | magnitude of differential input voltage 0.1 0.6 v v ic common mode input voltage 0.5|v id | 2.4-0.5|v id | v v cc - 0.8 t a operating temperature range -40 85 c
electrical characteristics STLVDS32B 6/17 3 electrical characteristics table 6. electrical characteristics (over recommended operating conditions unless otherwise noted. all typical values are at t a = 25c, and v cc = 3.3 v). symbol parameter test conditions min. typ. max. unit v ith+ positive going differential input voltage threshold 100 mv v ith- negative going differential input voltage threshold -100 mv v oh high level output voltage i oh = -8 ma 2.4 v i oh = -4 ma 2.8 v ol low level output voltage i oh = 8 ma 0.4 v i cc supply current enabled, no load 10 18 ma disabled 0.25 0.5 ma i i input current (a or b inputs) v i = 0 v -2 -10 -20 a v i = 2.4 v -1.2 -3 i i(off) power off input current (a or b inputs) v cc = 0, v i = 3.6 v 10 20 a i cs cold spare leakage current v i = 3.6 v, v dd = 0 v 20 a i ih high level input current (en, g, g or inputs) v ih = 2 v 10 a i il low level input current (en, g, g or inputs) v il = 0.8 v 10 a i oz high impedance output current v o = 0 or v cc 10 a
STLVDS32B electrical characteristics 7/17 note: 1 t sk(o) is the maximum delay time difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. 2t sk(p) is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. 3t sk(pp) is the differential channel-to-channel skew of any event between devices. this specification applies to devices at the same v cc , and within 5c of each other within the operating temperature range table 7. switching characteristics (over recommended operating conditions unless otherwise noted. all typical values are at t a = 25c, and v cc = 3.3 v). symbol parameter test conditions min. typ. max. unit t plh propagation delay time, low to high output c l = 10 pf, figure 3. 1.5 2.5 3.3 ns t phl propagation delay time, high to low output 1.5 2.5 3.3 ns t r output signal rise time 0.4 ns t f output signal fall time 0.4 ns t sk(o) channel to channel output skew ( note: 1 ) 0.1 0.3 ns t sk(p) pulse skew (|t phl - t plh |) ( note 2 )0.20.4ns t sk(pp) part to part skew ( note 3 )1ns t pzh propagation delay time, high impedance to high level output figure 4. 312ns t pzl propagation delay time, high impedance to low level output 512ns t phz propagation delay time, high level to high impedance output 512ns t plz propagation delay time, low level to high impedance output 512ns
typical characteristics STLVDS32B 8/17 4 typical characteristics note: a: all input pulse are supplied by a generator having the following characteristics: t r or t f 1 ns, pulse repetition rate (prr) = 50 mpps, pulse width = 10 0.2 ns. note: b: c l includes instrumentation and fixture capacitance within 6 mm of the d.u.t. figure 3. timing test and waveforms
STLVDS32B typical characteristics 9/17 note: a: all input pulse are supplied by a generator having the following characteristics: t r or t f 1 ns, pulse repetition rate (prr) = 50 mpps, pulse width = 10 0.2 ns. note: b: c l includes instrumentation and fixture capacitance within 6 mm of the d.u.t. figure 4. enable and disable time test circuit and waveform
typical performance characteristics STLVDS32B 10/17 5 typical performance characteristics (unless otherwise specified t j = 25c) figure 5. output current vs output voltage figure 6. output current vs output voltage
STLVDS32B package mechanical data 11/17 6 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com.
package mechanical data STLVDS32B 12/17 dim. mm. inch. min. typ. max. min. typ. max. a 1.75 0.06 8 a 1 0.1 0.25 0.004 0.010 a 2 1.64 0.06 3 b 0. 3 5 0.46 0.01 3 0.01 8 b 1 0.1 9 0.25 0.007 0.010 c 0.5 0.01 9 c1 45 (typ.) d 9 . 8 10 0. 38 50. 393 e5. 8 6.2 0.22 8 0.244 e 1.27 0.050 e 38 . 89 0. 3 50 f 3 . 8 4.0 0.14 9 0.157 g 4.6 5. 3 0.1 8 1 0.20 8 l 0.5 1.27 0.01 9 0.050 m 0.62 0.024 s8 (m a x.) s o-16 mechanical data 0016020d
STLVDS32B package mechanical data 13/17 dim. mm. inch. min. typ. max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0. 8 1 1.05 0.0 3 1 0.0 39 0.041 b 0.1 9 0. 3 0 0.007 0.012 c0.0 9 0.20 0.004 0.007 9 d4. 9 5 5.1 0.1 93 0.1 9 7 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4. 3 4.4 4.4 8 0.16 9 0.17 3 0.176 e 0.65 b s c 0.0256 b s c k0 8 0 8 l 0.45 0.60 0.75 0.01 8 0.024 0.0 3 0 t ss op16 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 00 8 0 338 d
package mechanical data STLVDS32B 14/17 dim. mm. inch. min. typ. max. min. typ. max. a 33 0 12. 99 2 c 12. 8 1 3 .2 0.504 0.51 9 d 20.2 0.7 9 5 n60 2. 3 62 t 22.4 0. 88 2 ao 6.45 6.65 0.254 0.262 bo 10. 3 10.5 0.406 0.414 ko 2.1 2. 3 0.0 8 2 0.0 9 0 po 3 . 9 4.1 0.15 3 0.161 p7. 98 .1 0. 3 11 0. 3 1 9 tape & reel s o-16 mechanical data
STLVDS32B package mechanical data 15/17 dim. mm. inch. min. typ. max. min. typ. max. a 33 0 12. 99 2 c 12. 8 1 3 .2 0.504 0.51 9 d 20.2 0.7 9 5 n60 2. 3 62 t 22.4 0. 88 2 ao 6.7 6. 9 0.264 0.272 bo 5. 3 5.5 0.20 9 0.217 ko 1.6 1. 8 0.06 3 0.071 po 3 . 9 4.1 0.15 3 0.161 p7. 98 .1 0. 3 11 0. 3 1 9 tape & reel t ss op16 mechanical data
revision history STLVDS32B 16/17 7 revision history table 8. revision history date revision changes 07-jul-2004 9 t r and t f description changed in table 6 - pag 7. 05-dec-2005 10 temperature range has been changed in cover page, add i cs on table 5. 28-mar-2006 11 order code updated and new template. 20-mar-2007 12 title in cover page updated. 28-aug-2007 13 added table 1. in cover page.
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