pi74fct16952t/162952/162h952t 16-bit registered transceivers 1 ps2042a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 logic block diagram pi74fct16952t pi74fct162952t pi74fct162h952t 16-bit registered transceivers product description: pericom semiconductor?s pi74fct series of logic circuits are pro- duced in the company?s advanced 0.6 micron cmos technology, achieving industry leading speed grades. the pi74fct16952t, pi74fct162952t, and pi74fct162h952t are 16-bit registered transceivers organized with two sets of eight d-type latches with separate input and output controls for each set. for data flow from a to b, for example, the a-to-b enable (xceab) input must be low in order to enter data from xax. the data present on the a port will be clocked on the b register when xclkab toggles from low-to-high. the xoeab control performs the output enable function on the b port. control of data from b to a is similar, but uses the xceba, xclkba, and xoeba inputs. by connecting the control pins of the two independent transceivers together, a full 16-bit operation can be achieved. the output buffers are designed with a power-off disable allowing ?live insertion? of boards when used as backplane drivers. the pi74fct16952t output buffers are designed with a power- off disable function allowing ?live insertion? of boards when used as backplane drivers. the pi74fct162952t has 24 ma balanced output drivers. it is designed with current limiting resistors at its outputs to control the output edge rate resulting in lower ground bounce and undershoot. this eliminates the need for external terminating resistors for most interface applications. the pi74fct162h952t has ?bus hold? which retains the input?s last state whenever the input goes to high-impedance preventing ?floating? inputs and eliminating the need for pull-up/down resistors. product features: common features: ? pi74fct16952t, pi74fct162952t, and pi74fct2h952t are high-speed, low power devices with high current drive ?v cc = 5v 10% ? hysteresis on all inputs ? packages available: ? 56-pin 240 mil wide plastic tssop (a) ? 56-pin 300 mil wide plastic ssop (v) pi74fct16952t features: ? high output drive: i oh = ?32 ma; i ol = 64 ma ? power off disable outputs permit ?live insertion? ? typical v olp (output ground bounce) < 1.0v at v cc = 5v, t a = 25c pi74fct162952t features: ? balanced output drivers: 24 ma ? reduced system switching noise ? typical v olp (output ground bounce) < 0.6v at v cc = 5v, t a = 25c pi74fct162h952t features: ? bus hold retains last active bus state during 3-state ? eliminates the need for external pull-up resistors d 1 clkab c 1 oeab 1 ceab 1 clkba 1 ceba 1 b 0 to 7 other channels d c 1 a 0 1 oeba d 2 clkab c 2 oeab 2 ceab 2 clkba 2 ceba 2 b 0 to 7 other channels d c 2 a 0 2 oeba
pi74fct16952t/162952/162h952t 16-bit registered transceivers 2 ps2042a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pin name description xoeab a-to-b output enable input (active low) xoeba b-to-a output enable input (active low) xceab a-to-b clock enable input (active low) xceba b-to-a clock enable input (active low) xclkab a-to-b clock input xclkba b-to-a clock input xax a-to-b data inputs or b-to-a 3-state outputs (1) xbx b-to-a data inputs or b-to-a 3-state outputs (1) gnd ground v cc power note : 1. for the pi74fct162h952t, these pins have ?bus hold?. all other pins are standard, outputs, or i/os. product pin description product pin configuration inputs outputs xceab xclkab xoeab xax xbx hxl x b (3) xll x b (3) l - ll l l - lh h x x h x high z truth table (1,2) 1. h = high voltage level l = low voltage level x = don?t care or irrelevant - = low-to-high transition z = high impedance 2. a-to-b data flow shown, b-to-a flow control is the same, except using xceba, xclkba, and xoeba. 3. level of b before the indicated steady-state input conditions were established. 1 oeab 1 1 clkab 2 1 ceab 3 gnd 4 1 a 0 5 1 a 1 6 v cc 7 1 a 2 8 1 a 3 9 1 a 4 10 gnd 11 1 a 5 12 1 a 6 13 1 a 7 14 2 a 0 15 2 a 1 16 2 a 2 17 gnd 18 2 a 3 19 2 a 4 20 2 a 5 21 v cc 22 2 a 6 23 2 a 7 24 1 oeba 56 1 clkba 55 1 ceba 54 gnd 53 1 b 0 52 1 b 1 51 v cc 50 1 b 2 49 1 b 3 48 1 b 4 47 gnd 46 1 b 5 45 1 b 6 44 1 b 7 43 2 b 0 42 2 b 1 41 2 b 2 40 gnd 39 2 b 3 38 2 b 4 37 2 b 5 36 v cc 35 2 b 6 34 2 b 7 33 gnd 25 2 ceab 26 2 clkab 27 2 oeab 28 gnd 32 2 ceba 31 2 clkba 30 2 oeba 29 56-pin v56 a56
pi74fct16952t/162952/162h952t 16-bit registered transceivers 3 ps2042a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 5.0v 10%) parameters description test conditions (1) min. typ (2) max. units v ih input high voltage guaranteed logic high level 2.0 v v il input low voltage guaranteed logic low level 0.8 v i ih input high current standard input, v cc = max. v in = v cc 1a i ih input high current standard i/o, v cc = max. v in = v cc 1a i ih input high current bus hold input (4) , v cc = max. v in = v cc 100 a i ih input high current bus hold i/o (4) , v cc = max. v in = v cc 100 a i il input low current standard input, v cc = min. v in = gnd ?1 a i il input low current standard i/o, v cc = min. v in = gnd ?1 a i il input low current bus hold input (4) , v cc = min. v in = gnd 100 a i il input low current bus hold i/o (4) , v cc = min. v in = gnd 100 a i bhh bus hold bus hold input (4) , v cc = min. v in = 2.0v ?50 a i bhl sustain current v in = 0.8v +50 i ozh (5) high-impedance v cc = max. v out = 2.7v 1 a i ozl (5) output current v cc = max. v out = 0.5v ?1 a (3-s tate o utputs ) v ik clamp diode voltage v cc = min., i in = ?18 ma ?0.7 ?1.2 v i os short circuit current v cc = max. (3) , v out = gnd ?80 ?140 ?200 ma i o output drive current v cc = max. (3) , v out = 2.5v ?50 ?180 ma v h input hysteresis 100 mv maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) storage temperature ................................................................. ?55c to +125c ambient temperature with power applied ................................ ?40c to +85c supply voltage to ground potential (inputs & vcc only) .......... ?0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) ....... ?0.5v to +7.0v dc input voltage ......................................................................... ?0.5v to +7.0v dc output current ................................................................................... 120 ma power dissipation ......................................................................................... 1.0w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. pins with bus hold are identified in the pin description. 5. this specification does not apply to bi-directional functionalities with bus hold.
pi74fct16952t/162952/162h952t 16-bit registered transceivers 4 ps2042a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct16952t output drive characteristics (over the operating range) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?3.0 ma 2.5 3.5 v i oh = ?15.0 ma 2.4 3.5 i oh = ?32.0 ma 2.0 3.0 v ol output low voltage v cc = min., v in = v ih or v il i ol = 64 ma 0.2 0.55 v i off power down disable v cc = 0v, v in or v out 4.5v ? ? 100 a pi74fct162952t/162h952t output drive characteristics (over the operating range) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?24.0 ma 2.4 3.3 v v ol output low voltage v cc = min., v in = v ih or v il i ol = 24 ma 0.3 0.55 v i odl output low current v cc = 5v, v in = v ih or v il , v out = 1.5v (3) 60 115 150 ma i odh output high current v cc = 5v, v in = v ih or v il , v out = 1.5v (3) ?60 ?115 ?150 ma notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is determined by device characterization but is not production tested. capacitance (t a = 25c, f = 1 mhz) parameters (4) description test conditions typ max. units c in input capacitance v in = 0v 4.5 6 pf c out output capacitance v out = 0v 5.5 8 pf
pi74fct16952t/162952/162h952t 16-bit registered transceivers 5 ps2042a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power v cc = max. v in = gnd 0.1 500 a supply current or v cc d i cc supply current per v cc = max. v in = 3.4v (3) 0.5 1.5 ma input @ ttl high i ccd supply current per v cc = max., outputs open v in = v cc 75 120 a/ input per mhz (4) xoeab or xoeba = gnd v in = gnd mhz one input toggling 50% duty cycle i c total power supply v cc = max., v in = v cc 0.8 1.7 (5) ma current (6) outputs open v in = gnd f cp = 10 mh z ( x clkab) 50% duty cycle xoeab = xceab = gnd xoeab = v cc v in = 3.4v 1.3 3.2 (5) one bit toggling v in = gnd f i = 5 mhz v cc = max., v in = v cc 3.8 6.5 (5) outputs open v in = gnd f cp = 10 mh z ( x clkab) 50% duty cycle xoeab = xceab = gnd xoeab = v cc v in = 3.4 8.3 20.5 (5) 16 bits toggling v in = gnd f i = 2.5 mh z 50% duty cycle notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device. 2. typical values are at vcc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i all currents are in milliamps and all frequencies are in megahertz.
pi74fct16952t/162952/162h952t 16-bit registered transceivers 6 ps2042a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 16952at 16952bt 16952ct 16952dt 16952et com. com. com. com. com. parameters description conditions (1) min max min max min max min max min max unit t plh propagation delay c l = 50 pf 2.0 10.0 2.0 7.5 2.0 6.3 2.0 4.4 1.5 3.7 ns t phl x clkab, x clkba to x b x , x a x r l = 500 w t pzh output enable time 1.5 10.5 1.5 8.0 1.5 7.0 1.5 4.8 1.5 4.4 ns t pzl x oeba, x oeab to x a x , x b x t phz output disable time (3) 1.5 10.0 1.5 7.5 1.5 6.5 1.5 4.0 1.5 4.0 ns t plz x oeba, x oeab to x a x , x b x t su setup time high or low 2.5 ? 2.5 ? 2.5 ? 2.0 ? 1.5 ? ns x a x , x b x to x clkab, x clkba t h hold time high or low 2.0 ? 2.0 ? 1.5 ? 1.0 ? 0.0 ? ns x a x , x b x to x clkab, x clkba t su setup time high or low 3.0 ? 3.0 ? 3.0 ? 2.0 ? 2.0 ? ns x ceab, xceba to to xclkab, xclkba t h hold time high or low 2.0 ? 2.0 ? 2.0 ? 1.5 ? 0.0 ? ns x ceab, xceba to to xclkab, xclkba t w pulse width high(3) or 3.0 ? 3.0 ? 3.0 ? 3.0 ? 3.0 ? ns low, xclkab or xclkba t sk ( o )o utput s kew (4) ? 0.5 ? 0.5 ? 0.5 ? 0.5 ? 0.5 ns pi74fct16952t switching characteristics over operating range notes: 1. see test circuit and wave forms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not production tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. 16952at 16952bt 16952ct 16952dt 16952et com. com. com. com. com. parameters description conditions (1) min max min max min max min max min max unit t plh propagation delay c l = 50 pf 2.0 10.0 2.0 7.5 2.0 6.3 2.0 4.4 1.5 3.7 ns t phl x clkab, x clkba to x b x , x a x r l = 500 w t pzh output enable time 1.5 10.5 1.5 8.0 1.5 7.0 1.5 4.8 1.5 4.4 ns t pzl x oeba, x oeab to x a x , x b x t phz output disable time (3) 1.5 10.0 1.5 7.5 1.5 6.5 1.5 4.0 1.5 4.0 ns t plz x oeba, x oeab to x a x , x b x t su setup time high or low 2.5 ? 2.5 ? 2.5 ? 2.0 ? 1.5 ? ns x a x , x b x to x clkab, x clkba t h hold time high or low 2.0 ? 2.0 ? 1.5 ? 1.0 ? 0.0 ? ns x a x , x b x to x clkab, x clkba t su setup time high or low 3.0 ? 3.0 ? 3.0 ? 2.0 ? 2.0 ? ns x ceab, xceba to to xclkab, xclkba t h hold time high or low 2.0 ? 2.0 ? 2.0 ? 1.5 ? 0.0 ? ns x ceab, xceba to to xclkab, xclkba t w pulse width high(3) or 3.0 ? 3.0 ? 3.0 ? 3.0 ? 3.0 ? ns low, xclkab or xclkba t sk ( o )o utput s kew (4) ? 0.5 ? 0.5 ? 0.5 ? 0.5 ? 0.5 ns pi74fct162952t switching characteristics over operating range
pi74fct16952t/162952/162h952t 16-bit registered transceivers 7 ps2042a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 notes: 1. see test circuit and wave forms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter is guaranteed but not production tested. 4. skew between any two outputs, of the same package, switching in the same direction. this parameter is guaranteed by design. pericom semiconductor corporation 2380 bering drive ? san jose, ca 95131 ? 1-800-435-2336 ? fax (408) 435-1100 ? http://www.pericom.com 16952at 16952bt 16952ct 16952dt 16952et com. com. com. com. com. parameters description conditions (1) min max min max min max min max min max unit t plh propagation delay c l = 50 pf 2.0 10.0 2.0 7.5 2.0 6.3 2.0 4.4 1.5 3.7 ns t phl x clkab, x clkba to x b x , x a x r l = 500 w t pzh output enable time 1.5 10.5 1.5 8.0 1.5 7.0 1.5 4.8 1.5 4.4 ns t pzl x oeba, x oeab to x a x , x b x t phz output disable time (3) 1.5 10.0 1.5 7.5 1.5 6.5 1.5 4.0 1.5 4.0 ns t plz x oeba, x oeab to x a x , x b x t su setup time high or low 2.5 ? 2.5 ? 2.5 ? 2.0 ? 1.5 ? ns x a x , x b x to x clkab, x clkba t h hold time high or low 2.0 ? 2.0 ? 1.5 ? 1.0 ? 0.0 ? ns x a x , x b x to x clkab, x clkba t su setup time high or low 3.0 ? 3.0 ? 3.0 ? 2.0 ? 2.0 ? ns x ceab, xceba to to xclkab, xclkba t h hold time high or low 2.0 ? 2.0 ? 2.0 ? 1.5 ? 0.0 ? ns x ceab, xceba to to xclkab, xclkba t w pulse width high(3) or 3.0 ? 3.0 ? 3.0 ? 3.0 ? 3.0 ? ns low, xclkab or xclkba t sk ( o )o utput s kew (4) ? 0.5 ? 0.5 ? 0.5 ? 0.5 ? 0.5 ns pi74fct162h952t switching characteristics over operating range
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