|
If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
Datasheet File OCR Text: |
august 2010 doc id 14335 rev 5 1/29 29 l6226q dmos dual full bridge driver features operating supply voltage from 8 to 52 v 2.8 a output peak current (1.4 a dc) r ds(on) 0.73 typ. value @ t j = 25 c operating frequency up to 100 khz programmable high side overcurrent detection and protection diagnostic output paralleled operation cross conduction protection thermal shutdown under voltage lockout integrated fast free wheeling diodes applications bipolar stepper motor dual or quad dc motor description the l6226q is a dmos dual full bridge designed for motor control applic ations, realized in bcdmultipower technology, which combines isolated dmos power transistors with cmos and bipolar circuits on the same chip. available in qfn32 5x5 package, the l6226q features thermal shutdown and a non-dissipative overcurrent detection on the high side power mosfets plus a diagnostic output that can be easily used to implement the overcurrent protection. figure 1. block diagram d99in1088a gate logic over current detection over current detection gate logic vcp vboot en a in1 a in2 a en b in1 b in2 b v boot 5v 10v vs a v s b out1 a out2 a out1 b out2 b sense a charge pump voltage regulator thermal protection v boot v boot 10v 10v bridge a bridge b sense b progcl b ocd b ocd a progcl a ocd a ocd b www.st.com
contents l6226q 2/29 doc id 14335 rev 5 contents 1 electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4 non-dissipative overcurrent detection and pr otection . . . . . . . . . . . . . . . 12 4.5 thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 paralleled operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 output current capability and ic power dissipation . . . . . . . . . . . . . . 23 8 thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 9 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 10 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 11 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 l6226q electrical data doc id 14335 rev 5 3/29 1 electrical data 1.1 absolute maximum ratings 1.2 recommended operating conditions table 1. absolute maximum ratings symbol parameter parameter value unit v s supply voltage v sa = v sb = v s 60 v v od differential voltage between vs a , out1 a , out2 a , sense a and vs b , out1 b , out2 b , sense b v sa = v sb = v s = 60 v, v sensea = v senseb = gnd 60 v ocd a ,ocd b ocd pins voltage range -0.3 to + 10 v progcl a , progcl b progcl pins voltage range -0.3 to + 7 v v boot bootstrap peak voltage v sa = v sb = v s v s + 10 v v in ,v en input and enable voltage range -0.3 to + 7 v v sensea, v senseb voltage range at pins sense a and sense b -1 to + 4 v i s(peak) pulsed supply current (for each v s pin), internally limited by the overcurrent protection v sa = v sb = v s , t pulse < 1 ms 3.55 a i s rms supply current (for each v s pin) v sa = v sb = v s 1.4 a t stg , t op storage and operating temperature range -40 to 150 c table 2. recommended operating conditions symbol parameter parameter min max unit v s supply voltage v sa = v sb = v s 852v v od differential voltage between vs a , out1 a , out2 a , sense a and vs b , out1 b , out2 b , sense b v sa = v sb = v s , v sensea = v senseb 52 v v sensea, v senseb voltage range at pins sense a and sense b (pulsed t w < t rr ) (dc) -6 -1 6 1 v v i out rms output current 1.4 a t j operating junction temperature -25 +125 c f sw switching frequency 100 khz electrical data l6226q 4/29 doc id 14335 rev 5 1.3 thermal data table 3. thermal data symbol parameter value unit r th(ja) thermal resistance j unction-ambient max. (1) 1. mounted on a double-layer fr4 pcb with a dissipating copper surface of 0.5 cm 2 on the top side plus 6 cm 2 ground layer connected through 18 via holes (9 below the ic). 42 c/w l6226q pin connection doc id 14335 rev 5 5/29 2 pin connection figure 2. pin connection (top view) note: 1 the pins 2 to 8 are connected to die pad. 2 the die pad must be connected to gnd pin. pin connection l6226q 6/29 doc id 14335 rev 5 table 4. pin description n pin type function 1, 21 gnd gnd signal ground terminals. 9 out1b power output bridge b output 1. 11 ocdb open drain output bridge b overcurrent detection and thermal protection pin. an internal open drain transistor pulls to gnd when overcurrent on bridge b is detected or in case of thermal protection. 12 senseb power supply bridge b source pin. this pin must be connected to power ground directly or through a sensing power resistor. 13 in1b logic input bridge b input 1 14 in2b logic input bridge b input 2 15 progclb r pin bridge b overcurrent level programming. a resistor connected between this pin and ground sets the programmable current limiting value for the bridge b. by connecting this pin to ground the maximum current is set. this pin cannot be left non-connected. 16 enb logic input bridge b enable. low logic level switches off all power mosfets of bridge b. if not used, it has to be connected to +5 v. 17 vboot supply voltage bootstrap voltage needed for driving the upper power mosfets of both bridge a and bridge b. 19 out2b power output bridge b output 2. 20 vsb power supply bridge b power supply voltage. it must be connected to the supply voltage together with pin vsa. 22 vsa power supply bridge a power supply voltage. it must be connected to the supply voltage together with pin vsb. 23 out2a power output bridge a output 2. 24 vcp output charge pump oscillator output. 25 ena logic input bridge a enable. low logic level switches off all power mosfets of bridge a. if not used, it has to be connected to +5 v. 26 progcla r pin bridge a overcurrent level programming. a resistor connected between this pin and ground sets the programmable cu rrent limiting value for the bridge a. by connecting this pin to ground the maximum current is set. this pin cannot be left non-connected. 27 in1a logic input bridge a logic input 1. 28 in2a logic input bridge a logic input 2. 29 sensea power supply bridge a source pin. this pin must be connected to power ground directly or through a sensing power resistor. 30 ocda open drain output bridge a overcurrent detection and thermal protection pin. an internal open drain transistor pulls to gnd when overcurrent on bridge a is detected or in case of thermal protection. 31 out1a power output bridge a output 1. l6226q electrical characteristics doc id 14335 rev 5 7/29 3 electrical characteristics t a = 25 c, vs = 48 v, unless otherwise specified table 5. electrical characteristics symbol parameter test condition min typ max unit v sth(on) turn-on threshold 5.8 6.3 6.8 v v sth(off) turn-off threshold 5 5.5 6 v i s quiescent supply current all bridges off; t j = -25 c to 125 c (1) 510ma t j(off) thermal shutdown temperature 165 c output dmos transistors r ds(on) high-side + low-side switch on resistance t j = 25 c 1.47 1.69 t j = 125 c (1) 2.35 2.70 i dss leakage current en = low; out = v s 2ma en = low; out = gnd -0.3 ma source drain diodes v sd forward on voltage i sd = 2.8 a, en = low 1.15 1.3 v t rr reverse recovery time i f = 1.4 a 300 ns t fr forward recovery time 200 ns logic input v il low level logic input voltage -0.3 0.8 v v ih high level logic input voltage 2 7 v i il low level logic input current gnd logic input voltage -10 a i ih high level logic input current 7 v logic input voltage 10 a v th(on) turn-on input threshold 1.8 2.0 v v th(off) turn-off input threshold 0.8 1.3 v v th(hys) input threshold h ysteresis 0.25 0.5 v switching characteristics t d(on)en enable to out turn on delay time (2) i load =1.4 a, resistive load 500 800 ns t d(on)in input to out turn on delay time i load =1.4 a, resistive load (dead time included) 1.9 s t rise output rise time (2) i load =1.4 a, resistive load 40 250 ns t d(off)en enable to out turn off delay time (2) i load =1.4 a, resistive load 500 800 1000 ns t d(off)in input to out turn off delay time i load =1.4 a, resistive load 500 800 1000 ns t fall output fall time (2) i load =1.4 a, resistive load 40 250 ns electrical characteristics l6226q 8/29 doc id 14335 rev 5 figure 3. switching char acteristic definition t dt dead time protection 0.5 1 s f cp charge pump frequency -25 c < t j < 125 c 0.6 1 mhz over current detection i s over input supply over current detection threshold -25 c |