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tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 1 post office box 655303 ? dallas, texas 75265 1-w output (v cc 4.5 v) 2.7-v to 9-v input operating range 78% typical efficiency 160-khz fixed-frequency current-mode pwm controller en input inhibits operation and reduces supply current to 1 m a output voltage limited to ? v o ? 12 v v cc soft start 8-pin soic and dip packages 40 c to 85 c free-air temperature range pin-for-pin compatible with max755 description the tps6755 is an adjustable inverting dc/dc converter capable of operating from inputs as low as 2.7 v. the only external components required are an inductor, an output filter capacitor, an input filter capacitor, a reference filter capacitor, two resistors, and a schottky rectifier. an enable input is provided to shut down the inverter when an output voltage is not needed. the typical supply current is 1.9 ma at no-load and is further reduced to 1- m a when the enable input is low. the device features a 160-khz current-mode pulse-width-modulation (pwm) controller with a p-channel mosfet power switch. the gate drive uses the converter output to reduce the die area needed to realize the 0.4- w mosfet. soft start is accomplished with the addition of one small capacitor at ss. a 1.22-v reference is available for external loads up to 125 m a. the tps6755 is attractive for board-level dc/dc conversion in computer peripherals and in battery-powered equipment requiring high efficiency and low supply current. available in an 8-pin dip or an 8-pin soic package, the tps6755 operates over a free-air temperature range of 40 c to 85 c. en ref ss comp v cc out gnd fb tps6755 1 2 3 4 8 7 6 5 1 m f + 47 m f + 82 pf 2 10 m f 10 m h 1n5817 100 m f + 5 v v i 2.7 v to 9 v enable 2 not required for loads of 100 ma or less 10.2 k w 42.2 k w figure 1. typical circuit please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 8 7 6 5 en ref ss comp v cc out gnd fb d or p package (top view) production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. copyright ? 1996, texas instruments incorporated
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 2 post office box 655303 ? dallas, texas 75265 available options packaged devices chip form t a small outline (d) plastic dip (p) chip form (y) 40 c to 85 c tps6755id tps6755ip tps6755y the d package is also available taped and reeled (TPS6755IDR). functional block diagram en en 1 en _ + 5 4 error amplifier voltage reference 6 2 x3 ss clamp 1.2 m w x3 r s q 160-khz oscillator pwm comparator s driver fb power switch pmos overcurrent comparator 7 8 v cc out fb comp gnd ref 3 ss current- sense amplifier drive latch
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 3 post office box 655303 ? dallas, texas 75265 chip information these chips, when properly assembled, display characteristics similar to the tps6755. thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. the chips may be mounted with conductive epoxy or a gold-silicon preform. 75 82 888 1 2 3 455 tps6755y (1) (2) (3) (8) (7) (6) en ref ss out fb v cc gnd bonding pad assignments chip thickness: 15 typical bonding pads: 4 4 minimum t j max = 150 c tolerances are 10%. all dimensions are in mils. 6 7 7 (4) (5) comp terminal functions terminal description name no. description en 1 enable. en > 2 v turns on the tps6755. en 0.4 v turns it off. ref 2 1.22-v reference voltage output. ref can source 125 m a for external loads. ss 3 soft start. a capacitor between ss and gnd brings the output voltage up slowly. comp 4 compensation. a capacitor to ground stabilizes the feedback loop. fb 5 feedback. fb connects to the dc/dc converter output. gnd 6 ground out 7 power mosfet drain connection v cc 8 supply-voltage input
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 4 post office box 655303 ? dallas, texas 75265 detailed description the following descriptions refer to the functional block diagram. current-sense amplifier the current-sense amplifier, which has a fixed gain of 3, amplifies the slope-compensated current-sense voltage (a summation of the voltage on the current-sense resistor and the oscillator ramp) and feeds it to the pwm comparator. driver latch the latch, which consists of a set/reset flip-flop and associated logic, controls the state of the power switch by turning the driver on and off. a high output from the latch turns the switch on; a low output turns it off. in normal operation the flip-flop is set high during the clock pulse, but gating keeps the latch output low until the clock pulse is over. the latch is reset when the pwm comparator output goes high. enable (en) a logic low on en puts the tps6755 in shutdown mode. in shutdown, the output power switch, voltage reference, and other functions shut off and the supply current is reduced to 10 m a maximum. the soft-start capacitor is discharged through a 1.2-m w resistance and the output falls to zero volts. error amplifier the error amplifier is a high-gain differential amplifier used to regulate the converter output voltage. the amplifier generates an error signal, which is fed to the pwm comparator, by comparing a sample of the output voltage to the reference and amplifying the difference. the output sample is obtained from a resistive divider connected between fb and ref. fb is connected externally to the converter output, and the divider output is connected to the error-amplifier input. an 82-pf capacitor connected between comp and gnd is required to stabilize the control loop for loads greater than 100 ma. oscillator and ramp generator the oscillator circuit provides a 160-khz clock to set the converter operating frequency, and a timing ramp for slope compensation. the clock waveform is a pulse, a few hundred nanoseconds in duration, that is used to limit the maximum power switch duty cycle to 95%. the timing ramp is summed with the current-sense signal at the input to the current-sense amplifier. overcurrent comparator the overcurrent comparator monitors the current in the power switch. the comparator trips and initiates a soft-start cycle if the power-switch current exceeds 2 a peak. power switch the power switch is a 0.4- w p-channel mosfet with current sensing. the drain is connected to out and the source is connected to a current-sense resistor. the voltage across the resistor is proportional to current in the power switch and is tied to the overcurrent comparator and the current-sense amplifier. in normal operation, the power switch is turned on at the start of each clock cycle and turned off when the pwm comparator resets the drive latch. pwm comparator the comparator resets the drive latch and turns off the power switch whenever the slope-compensated current-sense signal from the current-sense amplifier exceeds the error signal. reference the 1.22-v reference is brought out on ref and can source 125- m a maximum to external loads. a 10- m f capacitor connected between ref and gnd is recommended to minimize noise pickup.
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 5 post office box 655303 ? dallas, texas 75265 ss clamp the ss clamp circuit limits the signal level on error-amplifier output during start-up. the voltage on ss is amplified and used to override the error-amplifier output until the error-amplifier voltage rises above that output, at which point the error amplifier takes over. this prevents the input to the pwm comparator from exceeding its common-mode range (i.e., error amplifier output too high to be reached by the current ramp) by limiting the maximum voltage on the error-amplifier output during start-up. soft start causes the output voltage to increase to the regulation point at the controlled rate. the voltage on the charging soft-start capacitor gradually raises the clamp on the error amplifier output voltage, limiting surge currents at power up by increasing the current limit threshold on a cycle-by-cycle basis. a soft-start cycle is initiated when either the enable (en) signal is switched high or an overcurrent fault condition triggers the discharge of the soft-start capacitor. dissipation rating table package t a 25 c power rating derating factor above t a = 25 c t a = 70 c power rating t a = 85 c power rating d 725 mw 5.8 mw/ c 464 mw 377 mw p 1175 mw 9.4 mw/ c 752 mw 611 mw absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 pin voltages: v cc (see note 1) 0.3 v to 9 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . out to v cc 12.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . fb (see note 1) 25 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ss, comp, en voltage range (see note 1) 0.3 v to v cc +0.3 v . . . . . . . . . . . . . . . . . . . . . . . . peak switch current 2 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . reference current 2.5 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous total power dissipation see dissipation rating table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperture range, t a 40 c to 85 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature 1,6mm (1/16 inch) from case for 10 s 260 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: all voltage values are with respect to network terminal ground. recommended operating conditions min nom max unit supply voltage 2.7 9 v decoupling capacitor 1 m f input capacitor 47 m f reference capacitor 10 m f output capacitor 100 m f compensation capacitor 82 pf inductor 10 m h
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 6 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range, v cc = 5 v, i o = 0, en = 5 v, typical values are at t a = 25 c (unless otherwise noted) (refer to figure 15) parameter test condition min typ max unit supply current 1.9 ma standby current en = 0.4 v 1 10 m a high-level input threshold voltage, en 2 v low-level input threshold voltage, en 0.4 v input current, en 1 1 m a impedance, comp 7.5 k w oscillator frequency 160 khz reference voltage i o(ref) 125 m a 1.22 v reference drift 50 ppm/ c on resistance, out 0.4 w leakage current, out 20 na startup voltage 2.7 v performance characteristics over recommended operating free-air temperature range, typical values at t a = 25 c (unless otherwise noted) (refer to figure 15) parameter test condition min typ max unit output voltage v cc = 4 v to 7 v i o = 0 ma to 200 ma 4.75 5 5.25 v v cc = 2.7 v 125 load current v cc = 4 v 175 ma v cc = 4.5 v 200 270 line regulation v cc = 4 v 0.4% load regulation i o = 25 ma to 200 ma 0.4% efficiency i o =100 ma 78%
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 7 post office box 655303 ? dallas, texas 75265 application information typical system waveforms v i = 5 v v o = 5 v i o = 100 ma 0 0.5 1 5 0 5 voltage at out v i inductor current a t time s 2.5 m s/div figure 2. switching waveforms 2.5 m s/div i inductor current a 50 0 output voltage mv 0 0.5 t time s v i = 5 v v o = 5 v i o = 100 ma 1 v o figure 3. output voltage ripple
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 8 post office box 655303 ? dallas, texas 75265 application information load current a i l 0.2 0.1 output voltage ripple mv 50 0 50 5 ms/div t time s 0 v i = 5 v v o = 5 v i o = 0 ma to 200 ma figure 4. load transient response 20 6 4 2 0 20 input voltage v v i output voltage ripple mv t time s 500 m s/div v i = 4 v to 7 v v o = 5 v i o = 100 ma 8 0 figure 5. line transient response
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 9 post office box 655303 ? dallas, texas 75265 application information 6 4 2 0 2 4 6 voltage at en v output voltage v v o 2.5 ms/div t time s v i = 5 v v o = 5 v i o = 100 ma 0 figure 6. enable response time system typical characteristics figure 7 efficiency vs load current i l load current ma efficiency % 75 73 71 70 25 50 75 100 125 150 175 76 79 80 200 225 250 300 78 77 74 72 275 t a = 25 c (see figure 15) v i = 5 v v i =7 v v i =2.7 v figure 8 i l load current ma peak inductor current a peak inductor current vs load current 0.8 0.6 0.2 0 0 50 100 150 1 1.4 1.6 200 250 300 1.2 0.4
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 10 post office box 655303 ? dallas, texas 75265 application information figure 9 no-load supply current ma supply voltage v no-load supply current vs supply voltage 1 0.6 0.2 0 012 3 4 1.2 1.8 2 567 1.6 1.4 0.8 0.4 i o = 0 a (see figure 15) figure 10 maximum load current ma supply voltage v maximum load current vs supply voltage 250 200 150 2 2.5 3 3.5 4 4.5 5 300 350 400 5.5 6 6.5 7 (see figure 15) figure 11 oscillator frequency khz oscillator frequency vs temperature t temperature c f osc 155 150 145 140 40 20 0 20 40 60 165 170 175 80 100 120 140 v i = 2.7 v v i = 5 v v cc = 7 v 160 figure 12 switch current limit a soft-start voltage mv switch current limit vs soft-start voltage 0.8 0.6 0.2 0 0 200 400 600 1.2 1.6 1.8 800 1000 1200 1.4 1 0.4 v i = 2.7 v v i = 5 v v i =7 v r1 and r2 varied (see figure 15)
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 11 post office box 655303 ? dallas, texas 75265 application information figure 13 soft-start delay ms soft-start delay vs capacitance c capacitance m f 50 40 20 0 0 0.2 0.4 0.6 0.8 1 60 80 90 1.2 1.4 1.6 c6 varied (see figure 7) v i = 2.7 v v i = 5 v v i = 7 v 70 30 10 figure 14 drain-source on-state resistance drain-source on-state resistance vs temperature r ds(on) w t temperature c 0.3 0.2 0.1 0 40 20 0 20 40 60 0.5 0.6 0.7 80 100 120 140 0.4 v i = 7 v v i = 2.7 v v i = 5 v the tps6755 operates in the voltage-inverting circuit, shown in figure 15, which can generate an output. the circuit is ideal for applications that require a negative polarity voltage on the output with respect to the input ground, and for energy management systems. the tps6755 can be placed in a shutdown mode (1- m a quiescent current) by forcing en low. soft start the soft-start capacitor provides an orderly start-up of the converter by slowly increasing the switch current limit during power-up. the soft-start timing is controlled by the ss capacitance (see figure 13 for the capacitance value corresponding to the desired delay time). the switch current limit is proportional to the voltage applied to ss, which is internally pulled to ref by a 1.2-m w resistor. ss can be externally pulled lower than ref to limit the switch current. a uvlo condition or an overcurrent condition initiates an ss cycle by discharging the ss capacitor to ground through an internal transistor. a minimum of a 10-nf capacitor must be connected to ss to current limit correctly. inductor selection the standard 10- m h inductor required by the tps6755 must have a saturation current greater than the peak switch current at the desired maximum load. operation over the full voltage range and current range is assured by the 10- m h inductor. to determine the required inductor staturation level, refer to the typical operating characteristics graph for peak inductor current versus load current (see figure 8).
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 12 post office box 655303 ? dallas, texas 75265 application information output filter capacitor a low equivalent series resistance (esr) output filter capacitor is necessary to minimize the output-ripple voltage. an esr of 100 m w limits the output ripple to 90 mv or less for output loads up to 200 ma. rectifier a schottky diode or high-speed silicon rectifier should be used with a maximum continuous current rating of 1 a for operation up to full load. output ripple filtering a low-pass filter may be added to the converter output to reduce the output voltage ripple (see figure 15). the lc filter has a cutoff frequency of 7.2 khz. the inductor filter must have a low resistance to avoid large output voltage drops. the output voltage ripple is reduced to 5 mv when the lc output filter is used. fb must be connected to the output node before the connection for the low-pass filter. adjustable output voltage the output voltage of the tps6755 is limited to ? v o ? 12 v v cc and is set by two external resistors, r4 and r5 (see figure 15). r5 can be set to any value between 10 k w to 20 k w , and r4 is calculated using the following formula: r4 = ? v o ? r5/1.22 v. these resistors form a voltage divider between fb, comp, and ref. the converter adjusts the output such that comp level is at gnd. printed circuit board layout a ground plane is recommended in a printed circuit board (pcb) layout to ensure quiet operation. attention should be given to minimizing the lengths of the switching loops. bypass capacitors should be placed as close to the tps6755 as possible to prevent instability and noise pickup. v cc and gnd should be bypassed directly with a 1- m f ceramic capacitor and a large bypass capacitor (e.g. 47 m f) to maximize noise immunity. the tps6755 should not be used with ic sockets, wire-wrap prototype boards, or other constructions that are susceptible to noise pick-up.
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 13 post office box 655303 ? dallas, texas 75265 application information optional low-pass output filter 22 m h 22 m f + en ref ss comp v cc out gnd fb tps6755id 1 2 3 4 8 7 6 5 c4 82 pf c3 10 m f + r1 130 k w r2 300 k w c1 47 m f r3 10 k w c5 1 m f l1 10 m h d1 1n5817 1 a, 20 v + c2 100 m f/10 v v o v i enable + c6 0.1 m f r5 r4 r4 (k w ) 42.2 16.7 75.2 r5 (k w ) 10.2 10.2 10.2 v o (v) 5 2 9 figure 15. application circuit table 1. bill of materials qty description ref des manufacturer part no. manufacturer 1 ic power supply u1 tps6755id texas instruments 1 diode schottky d1 1n5817gi general instrument 1 inductor 10 m h l1 do1608c-103 cd54-100 coilcraft, sumida 1 capacitor 47 m f tantalum 16 v 7343 c1 593d476x9016d2w tpsd476k016r0100 sprague, avx 1 capacitor 100 m f tantalum 10 v 7343 c2 593d107x9010d2w tpsd107d016r0100 sprague, avx 1 capacitor 10 m f tantalum 10 v 3528 c3 293d106x0010b2w 267e 1002 106 sprague, matsuo 1 capacitor 82 pf ceramic 50 v 0805 c4 1 capacitor 1 m f ceramic 16 v 1206 c5 1 capacitor 0.1 m f ceramic 50 v 0805 c6 1 resistor 130 k w 0805 r1 1 resistor 300 k w 0805 r2 1 resistor 10 k w 0805 r3 1 resistor 42.2 k w 1% 0805 r4 1 resistor 10.2 k w 1% 0805 r5
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 14 post office box 655303 ? dallas, texas 75265 mechanical data d (r-pdso-g**) plastic small-outline package 14 pin shown 4040047 / b 03/95 0.228 (5,80) 0.244 (6,20) 0.069 (1,75) max 0.010 (0,25) 0.004 (0,10) 1 14 0.014 (0,35) 0.020 (0,51) a 0.157 (4,00) 0.150 (3,81) 7 8 0.044 (1,12) 0.016 (0,40) seating plane 0.010 (0,25) pins ** 0.008 (0,20) nom a min a max dim gage plane 0.189 (4,80) (5,00) 0.197 8 (8,55) (8,75) 0.337 14 0.344 (9,80) 16 0.394 (10,00) 0.386 0.004 (0,10) m 0.010 (0,25) 0.050 (1,27) 0 8 notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). d. four center pins are connected to die mount pad. e. falls within jedec ms-012
tps6755 adjustable inverting dc/dc converter slvs155a november 1996 revised december 1996 15 post office box 655303 ? dallas, texas 75265 mechanical data p (r-pdip-t8) plastic dual-in-line package 4040082 / b 03/95 0.310 (7,87) 0.290 (7,37) 0.010 (0,25) nom 0.400 (10,60) 0.355 (9,02) 5 8 4 1 0.020 (0,51) min 0.070 (1,78) max 0.240 (6,10) 0.260 (6,60) 0.200 (5,08) max 0.125 (3,18) min 0.015 (0,38) 0.021 (0,53) seating plane m 0.010 (0,25) 0.100 (2,54) 0 15 notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. falls within jedec ms-001
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. customers are responsible for their applications using ti components. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 2000, texas instruments incorporated

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