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| regarding the change of names mentioned in the document, such as mitsubishi electric and mitsubishi xx, to renesas technology corp. the semiconductor operations of hitachi and mitsubishi electric were transferred to renesas technology corporation on april 1st 2003. these operations include microcomputer, logic, analog and discrete devices, and memory chips other than drams (flash memory, srams etc.) accordingly, although mitsubishi electric, mitsubishi electric corporation, mitsubishi semiconductors, and other mitsubishi brand names are mentioned in the document, these names have in fact all been changed to renesas technology corp. thank you for your understanding. except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. note : mitsubishi electric will continue the business operations of high frequency & optical devices and power devices. renesas technology corp. customer support dept. april 1, 2003 to all our customers
1 mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer description description the M30221 group of single-chip microcomputers are built using the high-performance silicon gate cmos process using a m16c/60 series cpu core. the M30221 group has lcd controller/driver. M30221 group is packaged in a 120-pin plastic molded qfp. these single-chip microcomputers operate using sophisticated instructions featuring a high level of instruction efficiency. with 1m bytes of address space, they are ca- pable of executing instructions at high speed. features ?basic machine instructions .................. compatible with the m16c/60 series ?memory capacity .................................. see figure 1.1.3 memory expansion ?shortest instruction execution time ...... 100ns (f(x in )=10mhz) ?supply voltage ..................................... 4.0 to 5.5v (f(x in )=10mhz) 2.7 to 5.5v (f(x in )=7mhz with software one-wait) ?interrupts .............................................. 24 internal and 8 external interrupt sources, 4 software interrupt sources; 7 levels(including key input interrupt) ?multifunction 16-bit timer ...................... timer a (output) x 8, timer b (input) x 6 ?real time port outputs .......................... 8 bits x 3 lines,6 bits x 1 lines ?serial i/o .............................................. 2 channels for uart or clock synchronous ?dmac .................................................. 2 channels (trigger: 24 souces) ?a-d converter ....................................... 10 bits x 7 channels ?d-a converter ....................................... 8 bits x 2 channels ?watchdog timer .................................... 1 line ?programmable i/o ............................... 83 lines (26 lines are shared with lcd outputs) ?output port ........................................... 14 lines (14 lines are shared with lcd outpus) ?input port .............................................. 1 line (p7 7 , shared with nmi pin) ?lcd drive control circuit ....................... 1/2, 1/3 bias 2, 3 and 4 duty 4 common outputs 40 segment outputs built-in charge pump ?key input interrupt ................................ 20 lines ?clock generating circuit ....................... 2 built-in clock generation circuits (built-in feedback resistor, and external ceramic or quartz oscillator) applications camera, home appliances, portable equipment, audio, office equipment, etc. ------table of contents------ central processing unit (cpu) ................................ 9 reset ...................................................................... 12 programmable i/o port .......................................... 18 electric characteristics .......................................... 28 usage precaution peculiar to M30221 group ........ 41 specifications written in this manual are believed to be accurate, but are not guaranteed to be entirely free of error. specifications in this manual may be changed for functional or performance improvements. please make sure your manual is the latest edition. 2 mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer description pin configuration figures 1.1.1 show the pin configurations (top view). pin configuration (top view) package: 120p6r-a figure 1.1.1. pin configuration for the M30221 group (top view) " 7 $ $ 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( 4 & ( $ 7 - 7 - 7 - $ $ 0 . $ 0 . $ 0 . $ 0 . " 7 4 4 7 3 & ' 1 % " 1 " % 5 3 ( % " 1 " / 1 " / 1 " / 1 " / 1 " / 1 " / 1 " / 1 5 " 0 6 5 1 5 " 0 6 5 1 3 9 % 4 $ - / p u f 9 0 6 5 7 4 4 9 * / 7 $ $ 9 $ 0 6 5 9 $ * / $ / 7 4 4 1 5 " 0 6 5 1 5 9 % 4 % " / p u f 1 $ - , 1 5 y % 1 3 y % 1 5 " * / * / 5 1 5 " 0 6 5 * / 5 3 & 4 & 5 1 / . * 1 * / 5 1 * / 5 1 * / 5 1 $ 5 4 3 5 4 1 $ , 0 6 5 1 5 # * / 1 5 " 0 6 5 1 5 " * / 1 $ - , 1 5 # * / 1 5 # * / 1 5 # * / 1 1 1 $ 5 4 3 5 4 1 * / 5 1 5 " * / * / 5 1 5 " 0 6 5 * / 5 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 , * 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 7 $ $ 7 4 4 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 4 & ( 1 , * 1 , * 1 , * 1 , * 1 4 & ( 1 4 & ( M30221mx-xxxfp note. n channel open-drain output. 3 mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer description block diagram figure 1.1.2 is a block diagram of the M30221 group. figure 1.1.2. block diagram of M30221 group aaaa aaaa timer internal peripheral functions watchdog timer (15 bits) memory rom (note 1) ram (note 2) a-d converter (10 bits x 7 channels uart/clock synchronous si/o (8 bits x 2 channels) system clock generator x in -x out x cin -x cout m16c/60 series 16-bit cpu core i/o ports port p4 4 port p5 6 port p6 4 port p7 7 port p7 7 1 port p8 5 r0lr0h r1h r1 l r 2 r 3 a 0 a 1 fb r0lr0h r1h r1l r2 r3 a0 a1 fb registers sb isp usp stack pointer multiplier vector table intb port p9 7 flag register flg program counter pc note 1: rom size depends on mcu type. note 2: ram size depends on mcu type. dmac (2 channels) d-a converter (8 bits x 2 channels) lcd drive control circuit (4com x 40seg) port p10 4 port p12 6 port p13 2 port p3 6 port p2 8 port p1 8 port p0 8 port p11 8 timer ta0 (16 bits) timer ta1 (16 bits) timer ta2 (16 bits) timer ta3 (16 bits) timer ta4 (16 bits) timer ta5 (16 bits) timer ta6 (16 bits) timer ta7 (16 bits) timer tb0 (16 bits) timer tb1 (16 bits) timer tb2 (16 bits) timer tb3 (16 bits) timer tb4 (16 bits) timer tb5 (16 bits) 4 mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer description item performance number of basic instructions 91 instructions shortest instruction execution time 100ns (f(x in )=10mhz memory rom 24 kbytes capacity ram 1.5 kbytes i/o port p0 to p13 (except p7 7 ) 8 bits x 4, 2 bits x 1, 6 bits x 3, 7 bits x 2 5 bits x 1, 4 bits x 3 input port p7 7 1 bit x 1 output port seg2 to seg15 2 bits x 7 multifunction ta0 to ta7 16 bits x 8 timer tb0 to tb5 16 bits x 6 real time port outputs 8 bits x 3 lines,6 bits x 1 lines serial i/o uart0 , uart2 (uart or clock synchronous) x 2 a-d converter 10 bits x 7 channels d-a converter 8 bits x 2 channels dmac 2 channel(trigger:24 sources) lcd com0 to com3 4 lines seg2 to seg47 40 lines (26 lines are shared with i/o ports) watchdog timer 15 bits x 1 (with prescaler) interrupt 24 internal and 8 external sources, 4 software sources clock generating circuit 2 built-in clock generation circuits (built-in feedbackresistor, and external ceramic or quartz oscillator) supply voltage 4.0 to 5.5v (f(x in )=10mhz) 2.7 to 5.5v (f(x in )=7mhz with software one-wait) power consumption 18 mw (vcc=3.3v, f(x in )=7mhz with software one-wait) i/o withstand voltage (p0 to p13) 5 v output current p1 to p9,p13 5 ma p0, p10 to p12 0.1ma("h" output), 2.5ma("l" output) device configuration cmos silicon gate package 120-pin plastic mold qfp table 1.1.1. performance outline of M30221 group performance outline table 1.1.1 is performance outline of M30221 group. i/o char- acteristics 5 mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer description mitsubishi plans to release the following products in the M30221 group: (1) support for mask rom version, flash memory version (2) memory capacity (3) package 120p6r-a : plastic molded qfp (mask rom and flash memory versions) figure 1.1.3 shows the memory expansion and figure 1.1.4 shows the type no., memory size, and pack- age. figure 1.1.3. memory expansion figure 1.1.4. type no., memory size, and package april. 2001 type no. m30 22 1 m 3 - xxx fp package type: fp: p ackage120p6r-a rom capacity: 3 : 24k bytes 8 : 64k bytes 4 : 32k bytes c : 128k bytes rom no. omitted for flash memory version memory type: m : mask rom version f : flash memory version shows pin count, etc. (the value itself has no specific meaning) m16c/22 group(built-in lcdc) m16c family shows characteristic, use none: general , 3 " . # z u f , 3 0 . # z u f , , . ' $ ' 1 6 o e f s e f w f m p q n f o u , , . . 9 9 9 ' 1 . . $ 9 9 9 ' 1 6 o e f s q m b o o j o hy 6 o e f s q m b o o j o hy . . 9 9 9 ' 1 . . 9 9 9 ' 1 6 o e f s q m b o o j o h , , 6 pin description mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer pin description v cc , v ss cnv ss x in x out av cc av ss v ref p0 0 to p0 7 p1 0 to p1 7 p3 0 to p3 5 p4 1, p4 2, p4 6, p4 7 signal name power supply input cnv ss reset input clock input clock output analog power supply input reference voltage input i/o port p0 i/o port p1 i/o port p3 i/o port p4 supply 2.7 to 5.5 v to the v cc pin. supply 0 v to the v ss pin. function connect it to the v ss pin. a l on this input resets the microcomputer. this pin is a reference voltage input for the a-d converter. pin name i/o analog power supply input reset i/o port p5 i/o port p6 p5 0 to p5 3, p5 6, p5 7 p6 0 to p6 3 p2 0 to p2 7 i/o port p2 i i i o i i/o i/o i/o i/o i/o i/o i/o x cin x cout clock input clock output i o these pins are provided for the sub clock generating circuit.connect a ceramic resonator or crystal between the x cin and the x cout pins. to use an externally derived clock, input it to the x cin pin and leave the x cout open. these pins are provided for the main clock generating. circuit.connect a ceramic resonator or crystal between the x in and the x out pins. to use an externally derived clock, input it to the x in pin and leave the x out open. this pin is a power supply input for the a-d converter. connect it to vcc. this pin is a power supply input for the a-d converter. connect it to vss. this is an 8-bit cmos i/o port. it has an input/output port direction register that allows the user to set each pin for input or output individually. when set for input, the user can specify in units of four bits via software whether or not they are tied to a pull-up resistor. pins in this port also use as lcd segment output and real time port output. this is an 8-bit i/o port equivalent to p0. pins in this port also function as input pins for the key input interrupt function and real time port output. this is an 8-bit i/o port equivalent to p0. pins in this port also function as input pins for the key input interrupt function and real time port output. this is a 6-bit i/o port equivalent to p0. p3 0 to p3 3 also function as input pins for the key input interrupt function. this is a 4-bit i/o port equivalent to p0. the p4 1 pin is shared with timer a0 input. the p4 2 pin is shared with timer a1 output. the p4 6 pin is shared with timer a3 output and int4. the p4 7 pin is shared with timer a3 input and int4. this is a 6-bit i/o port equivalent to p0. the p5 0 , p5 1 , p5 2 , and p5 3 pins are shared with timerb0, b1, b2, and b3 input, respectively. the p5 6 pin is shared with int3. the p5 7 pin is shared with ckout output. this is an 4-bit i/o port equivalent to p0. the p60 pin is shared with cts 0 and rts 0 . the p6 1 , p6 2 , and p6 3 pins are shared with clk 0 , rxd 0 , and txd 0 , respectively. 7 pin description mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer pin description signal name function pin name i/o i/o i/o i/o i/o port p7 i/o port p8 i/o port p9 i/o port p10 p7 0 to p7 6 p8 0 to p8 2 , p8 4 , p8 6 p9 0 to p9 6 p10 0 to p10 3 this is an 7-bit i/o port equivalent to p0. pins in this port also function as a-d converter input pins. this is an 4-bit i/o port equivalent to p0. pins in this port also function as seg output for lcd. p7 7 i this is an 2-bit i/o port equivalent to p0. p13 0 pins in this port also function as d-a converter output pins or start trigger for a-d input pins. p13 1 pins in this port also function as d-a converter output pins. i/o i/o port p11 p11 0 to p11 7 this is an 8-bit i/o port equivalent to p0. pins in this port also function as seg output for lcd. i/o i/o port p13 p13 0 , p13 1 o segment output seg 2 to seg 15 pins in this port function as seg output for lcd drive circuit. o common output com 0 to com 3 power supply input for lcd drive circuit. power supply input for lcd v l1 to v l3 pins in this port function as common output for lcd drive circuit. step-up condenser connect port c 1 , c 2 pins in this port function as external pin for lcd step-up condenser. connect a condenser between c 1 and c 2 . i/o i/o port p12 p12 0 to p12 5 this is an 6-bit i/o port equivalent to p0. pins in this port also function as seg output for lcd and real time port output. p7 0 to p7 6 are i/o ports equivalent to p0 (p7 0 and p7 1 are n channel open-drain output). the p7 0 , p7 1 , and p7 2 pins are shared with txd 2 , rxd 2 , and clk 2 , respectively. the p7 3 is shared with cts 2 and rts 2 . the p7 4 , p7 5 and p7 6 pins are shared with int 0 , int 1 and int 2 , respectively. p7 7 is an input-only port that also functions for nmi. this is a 5-bit i/o port equivalent to p0. the p8 0 pin is shared with timer a4 output and int5 input . the p8 1 pin is shared with timer a4 input and int5 input. the p8 2 pin is shared with timer a5 output. the p8 4 pin is shared with timer a6 output. the p8 6 pin is shared with timer a7 output. i/o 8 memory mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer operation of functional blocks the M30221 group accommodates certain units in a single chip. these units include rom and ram to store instructions and data and the central processing unit (cpu) to execute arithmetic/logic operations. also included are peripheral units such as timers, real time port, serial i/o, lcd drive control circuit, d-a converter, a-d converter, dmac and i/o ports. memory figure 1.4.1 is a memory map of the M30221 group. the address space extends the 1m bytes from ad- dress 00000 16 to fffff 16 . from fffff 16 down is rom. for example, in the M30221m3-xxxfp, there is 24k bytes of internal rom from fa000 16 to fffff 16 . the vector table for fixed interrupts such as the reset _______ and nmi are mapped to fffdc 16 to fffff 16 . the starting address of the interrupt routine is stored here. the address of the vector table for timer interrupts, etc., can be set as desired using the internal register (intb). see the section on interrupts for details. from 00400 16 up is ram. for example, in the M30221m3-xxxfp, 1.5k bytes of internal ram is mapped to the space from 00400 16 to 009ff 6 . in addition to storing data, the ram also stores the stack used when calling subroutines and when interrupts are generated. the sfr area is mapped to 00000 16 to 003ff 16 . this area accommodates the control registers for periph- eral devices such as i/o ports, a-d converter, serial i/o, timers, and lcd, etc. figures 1.7.1 to 1.7.3 are location of peripheral unit control registers. any part of the sfr area that is not occupied is reserved and cannot be used for other purposes. the special page vector table is mapped to ffe00 16 to fffdb 16 . if the starting addresses of subroutines or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions can be used as 2-byte instructions, reducing the number of program steps. figure 1.4.1. memory map sfr area for details, see figures 1.7.1 to 1.7.3 internal ram area internal ram area internal rom area reset watchdog timer single step address match brk instruction overflow undefined instruction special page vector table 00000 16 00400 16 xxxxx 16 yyyyy 16 fffff 16 fffff 16 fffdc 16 ffe00 16 dbc nmi rom size fa000 16 24k bytes address yyyyy 16 32k bytes 64k bytes 128k bytes f8000 16 f0000 16 e0000 16 ram size 009ff 16 1.5k bytes address xxxxx 16 2k bytes 4k bytes 10k bytes 00bff 16 013ff 16 02bff 16 9 cpu mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer central processing unit (cpu) the cpu has a total of 13 registers shown in figure 1.5.1. seven of these registers (r0, r1, r2, r3, a0, a1, and fb) come in two sets; therefore, these have two register banks. (1) data registers (r0, r0h, r0l, r1, r1h, r1l, r2, and r3) data registers (r0, r1, r2, and r3) are configured with 16 bits, and are used primarily for transfer and arithmetic/logic operations. registers r0 and r1 each can be used as separate 8-bit data registers, high-order bits as (r0h/r1h), and low-order bits as (r0l/r1l). in some instructions, registers r2 and r0, as well as r3 and r1 can use as 32-bit data registers (r2r0/r3r1). (2) address registers (a0 and a1) address registers (a0 and a1) are configured with 16 bits, and have functions equivalent to those of data registers. these registers can also be used for address register indirect addressing and address register relative addressing. in some instructions, registers a1 and a0 can be combined for use as a 32-bit address register (a1a0). aaaaaaa aaaaaaa h l b15 b8 b7 b0 r0 (note) aaaaaaa h l b15 b8 b7 b0 r1 (note) r2 (note) aaaaaaa aaaaaaa b15 b0 r3 (note) aaaaaaa aaaaaaa b15 b0 a0 (note) aaaaaaa aaaaaaa b15 b0 a1 (note) aaaaaaa aaaaaaa b15 b0 fb (note) aaaaaaa b15 b0 data registers address registers frame base registers b15 b0 b15 b0 b15 b0 b15 b0 b0 b19 b0 b19 h l program counter interrupt table register user stack pointer interrupt stack pointer static base register flag register pc intb usp isp sb flg note: these registers consist of two register banks. a a aa aa aa aa a a aaaaaaa aaaaaaa a a aa aa aa aa aa aa a a cdzsboiu ipl figure 1.5.1. central processing unit register 10 cpu mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer (3) frame base register (fb) frame base register (fb) is configured with 16 bits, and is used for fb relative addressing. (4) program counter (pc) program counter (pc) is configured with 20 bits, indicating the address of an instruction to be executed. (5) interrupt table register (intb) interrupt table register (intb) is configured with 20 bits, indicating the start address of an interrupt vector table. (6) stack pointer (usp/isp) stack pointer comes in two types: user stack pointer (usp) and interrupt stack pointer (isp), each config- ured with 16 bits. your desired type of stack pointer (usp or isp) can be selected by a stack pointer select flag (u flag). this flag is located at the position of bit 7 in the flag register (flg). (7) static base register (sb) static base register (sb) is configured with 16 bits, and is used for sb relative addressing. (8) flag register (flg) flag register (flg) is configured with 11 bits, each bit is used as a flag. figure 1.5.2 shows the flag register (flg). the following explains the function of each flag: ?bit 0: carry flag (c flag) this flag retains a carry, borrow, or shift-out bit that has occurred in the arithmetic/logic unit. ?bit 1: debug flag (d flag) this flag enables a single-step interrupt. when this flag is 1 , a single-step interrupt is generated after instruction execution. this flag is cleared to 0 when the interrupt is acknowledged. ?bit 2: zero flag (z flag) this flag is set to 1 when an arithmetic operation resulted in 0; otherwise, cleared to 0 . ?bit 3: sign flag (s flag) this flag is set to 1 when an arithmetic operation resulted in a negative value; otherwise, cleared to 0 . ?bit 4: register bank select flag (b flag) this flag chooses a register bank. register bank 0 is selected when this flag is 0 ; register bank 1 is selected when this flag is 1 . ?bit 5: overflow flag (o flag) this flag is set to 1 when an arithmetic operation resulted in overflow; otherwise, cleared to 0 . ?bit 6: interrupt enable flag (i flag) this flag enables a maskable interrupt. an interrupt is disabled when this flag is 0 , and is enabled when this flag is 1 . this flag is cleared to 0 when the interrupt is acknowledged. 11 cpu mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer ?bit 7: stack pointer select flag (u flag) interrupt stack pointer (isp) is selected when this flag is 0 ; user stack pointer (usp) is selected when this flag is 1 . this flag is cleared to 0 when a hardware interrupt is acknowledged or an int instruction of software interrupt nos. 0 to 31 is executed. ?bits 8 to 11: reserved area ?bits 12 to 14: processor interrupt priority level (ipl) processor interrupt priority level (ipl) is configured with three bits, for specification of up to eight processor interrupt priority levels from level 0 to level 7. if a requested interrupt has priority greater than the processor interrupt priority level (ipl), the interrupt is enabled. ?bit 15: reserved area the c, z, s, and o flags are changed when instructions are executed. see the software manual for details. figure 1.5.2. flag register (flg) carry flag debug flag zero flag sign flag register bank select flag overflow flag interrupt enable flag stack pointer select flag reserved area processor interrupt priority level reserved area flag register (flg) aa aa aa aa a a aa aa aaaaaaa aaaaaaa aa aa aa aa aa aa a a aa aa cdzsboiu ipl b0b15 12 reset mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer ____________ table 1.6.1 shows the statuses of the other pins while the reset pin level is l . figures 1.6.3 and 1.6.4 show the internal status of the microcomputer immediately after the reset is cancelled. ____________ table 1.6.1. pin status when reset pin level is l status pin name seg 2 to seg 15 p0, p10 to p12 input port(with a pull up resistor) input port (floating) h level is output h level is output com 0 to com 3 p1 to p9, p13 figure 1.6.2. reset sequence reset there are two kinds of resets; hardware and software. in both cases, operation is the same after the reset. (see software reset for details of software resets.) this section explains on hardware resets. when the supply voltage is in the range where operation is guaranteed, a reset is effected by holding the reset pin level l (0.2v cc max.) for at least 20 cycles. when the reset pin level is then returned to the h level while main clock is stable, the reset status is cancelled and program execution resumes from the address in the reset vector table. figure 1.6.1 shows the example reset circuit. figure 1.6.2 shows the reset sequence. figure 1.6.1. example reset circuit x in address (internal address signal) ffffe 16 ffffc 16 more than 20 cycles are needed bclk bclk 24 cycles reset content of reset vector reset v cc 0.8v reset v cc 0v 0v 5v 5v 4.0v 13 reset mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.6.3. device's internal status after a reset is cleared(1) the content of other registers and ram is undefined when the microcomputer is reset. the initial values must therefore be set. 0100 1 000 00 0 00 0 0001 000????? 00 16 00 16 00 00 00 16 00 16 00 00 000 ? 000 ? 000 ? 000 ? 000 ? 000 ? 000 ? 000 ? 000 ? 000 ? 0 0? 00 0 000 ? 000 ? 0 0 ? 00 0 00 0 0 ? 00 0 00 0 0 00 0 0 0 00 000 ? 000 ? 000 ? 000 ? 000 ? 00 000 ? 00 000 ? 00 000 ? ?000 ?000 ?000 0000 0 000 00 16 00 16 00 16 ?000 00 ?000 00 0 0 0000 0 0 0 0000 0 0 00 000 0 0000 ?000 00 0 ?000 00 0 ?000 00 0 0 000 0 00 16 00 16 (26)uart0 receive interrupt control register (0052 16 ) (1)processor mode register 0 (0004 16 ) (2)processor mode register 1 (0005 16 ) (3)system clock control register 0 (0006 16 ) (4)system clock control register 1 (0007 16 ) (5)address match interrupt enable register (0009 16 ) (6)protect register (000a 16 ) (7)watchdog timer control register (000f 16 ) (8)address match interrupt register 0 (0010 16 ) (0011 16 ) (0012 16 ) (9)address match interrupt register 1 (0014 16 ) (0015 16 ) (0016 16 ) (10)dma0 control register (002c 16 ) (11)dma1 control register (003c 16 ) (12)int3 interrupt control register (0044 16 ) (13)timer b5 interrupt control register (0045 16 ) (14)timer b4 interrupt control register (0046 16 ) (15)timer b3 interrupt control register (0047 16 ) (16)timer a7 interrupt control register (0048 16 ) (17)timer a6 interrupt control register (0049 16 ) (18)timer a5 interrupt control register (004a 16 ) (19)dma0 interrupt control register (004b 16 ) (20)dma1 interrupt control register (004c 16 ) (21)key input interrupt control register (004d 16 ) (22)a-d conversion interrupt control register (004e 16 ) (23)uart2 transmit interrupt control register (004f 16 ) (24)uart2 receive interrupt control register (0050 16 ) (25)uart0 transmit interrupt control register (0051 16 ) (56)uart2 transmit/receive mode register (0378 16 ) (27)timer a0 interrupt control register (0055 16 ) (28)timer a1 interrupt control register (0056 16 ) (29)timer a2 interrupt control register (0057 16 ) (30)timer a3 interrupt control register (0058 16 ) (31)timer a4 interrupt control register (0059 16 ) (32)timer b0 interrupt control register (005a 16 ) (33)timer b1 interrupt control register (005b 16 ) (34)timer b2 interrupt control register (005c 16 ) (35)int0 interrupt control register (005d 16 ) (36)int1 interrupt control register (005e 16 ) (37)int2 interrupt control register (005f 16 ) (38)lcd mode register (0120 16 ) (39)segment output enable register (0122 16 ) (40)key input mode register (0126 16 ) (41)count start flag 1 (0340 16 ) (42)one-shot start flag 1 (0342 16 ) (43)trigger select flag 1 (0343 16 ) (44)up-down flag 1 (0344 16 ) (45)timer a5 mode register (0356 16 ) (46)timer a6 mode register (0357 16 ) (47)timer a7 mode register (0358 16 ) (48)timer b3 mode register (035b 16 ) (49)timer b4 mode register (035c 16 ) (50)timer b5 mode register (035d 16 ) (51)interrupt cause select register 0 (035e 16 ) (52)interrupt cause select register 1 (035f 16 ) (55)uart2 special mode register (0377 16 ) 0 11 000 0 0 (53)clock division counter control register (0360 16 ) 0 00 16 (54)uart2 special mode register 2 (0376 16 ) x : nothing is mapped to this bit ? : undefined 00 16 00 0 14 reset mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.6.4. device's internal status after a reset is cleared(2) 000 ? ?? 00 16 00 16 00 16 00 16 00 16 00 16 00 16 00 16 00 16 00 16 00 16 0 0 0 0 0 0 0 0 0 0 0 0 0 00 16 (83)port p0 direction register (84)port p1 direction register (85)port p2 direction register (86)port p3 direction register (87)port p4 direction register (88)port p5 direction register (89)port p6 direction register (90)port p7 direction register (91)port p8 direction register (92)port p9 direction register (93)port p10 direction register (94)port p11 direction register 0000 16 0000 16 0000 16 00000 16 0000 16 0000 16 0000 16 0000 16 00 16 0 0 0 00 16 (108)flag register (flg) (95)port p12 direction register (96)port p13 direction register (97)pull-up control register 0 (98)pull-up control register 1 (99)pull-up control register 2 (100)real time port control register (101)data registers (r0/r1/r2/r3) (102)address registers (a0/a1) (103)frame base register (fb) (104)interrupt table register (intb) (105)user stack pointer (usp) (106)interrupt stack pointer (isp) (107)static base register (sb) 00 16 1 1 0 00 0 00 0 0 0 11 1 10 (03e2 16 ) (03e3 16 ) (03e6 16 ) (03e7 16 ) (03ea 16 ) (03eb 16 ) (03ee 16 ) (03ef 16 ) (03f2 16 ) (03f3 16 ) (03f6 16 ) (03f7 16 ) (03fa 16 ) (03fb 16 ) (03fc 16 ) (03fd 16 ) (03fe 16 ) (03ff 16 ) (57) uart2 transmit/receive control register 0 (58) uart2 transmit/receive control register 1 (59)count start flag 0 (60) clock prescaler reset flag (61)one-shot start flag 0 (62)trigger select flag 0 (63)up-down flag 0 (64)timer a0 mode register (65)timer a1 mode register (66)timer a2 mode register (82) d-a control register (67)timer a3 mode register (68)timer a4 mode register (69)timer b0 mode register (70)timer b1 mode register (71)timer b2 mode register (72) uart0 transmit/receive mode register (73) uart0 transmit/receive control register 0 (74) uart0 transmit/receive control register 1 (75) uart transmit/receive control register 2 (76)flash memory control register (note) (77)dma0 cause select register (78)dma1 cause select register (80)a-d control register 0 (81)a-d control register 1 (79)a-d control register 2 (037c 16 ) (037d 16 ) (0380 16 ) (0381 16 ) (0382 16 ) (0383 16 ) (0384 16 ) (0396 16 ) (0397 16 ) (0398 16 ) (0399 16 ) (039a 16 ) (039b 16 ) (039c 16 ) (039d 16 ) (03a0 16 ) (03a4 16 ) (03a5 16 ) (03b0 16 ) (03b4 16 ) (03b8 16 ) (03ba 16 ) (03d4 16 ) (03d6 16 ) (03d7 16 ) (03dc 16 ) 00 16 0 0 0 00 0 01 0 1 0 00 0 00 00 16 00 16 00 16 00 16 00 16 00 16 00 16 00 16 00 16 x : nothing is mapped to this bit ? : undefined 0 0 000000 0 ? 00000 0 ? 00000 0 ? 00000 00 01000 0 00 00010 0 00 000 0 the content of other registers and ram is undefined when the microcomputer is reset. the initial values must therefore be set. note : this register is only exist in flash memory version. 000000 0 01 0 0 15 sfr mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.7.1. location of peripheral unit control registers (1) 0000 16 0001 16 0002 16 0003 16 0004 16 0005 16 0006 16 0007 16 0008 16 0009 16 000a 16 000b 16 000c 16 000d 16 000e 16 000f 16 0010 16 0011 16 0012 16 0013 16 0014 16 0015 16 0016 16 0017 16 0018 16 0019 16 001a 16 001b 16 001c 16 001d 16 001e 16 001f 16 0020 16 0021 16 0022 16 0023 16 0024 16 0025 16 0026 16 0027 16 0028 16 0029 16 002a 16 002b 16 002c 16 002d 16 002e 16 002f 16 0030 16 0031 16 0032 16 0033 16 0034 16 0035 16 0036 16 0037 16 0038 16 0039 16 003a 16 003b 16 003c 16 003d 16 003e 16 003f 16 0040 16 0041 16 0042 16 0043 16 0044 16 0045 16 0046 16 0047 16 0048 16 0049 16 004a 16 004b 16 004c 16 004d 16 004e 16 004f 16 0050 16 0051 16 0052 16 0053 16 0054 16 0055 16 0056 16 0057 16 0058 16 0059 16 005a 16 005b 16 005c 16 005d 16 005e 16 005f 16 0100 16 0101 16 0102 16 0103 16 0104 16 0105 16 0106 16 0107 16 0108 16 0109 16 010a 16 010b 16 010c 16 010d 16 010e 16 010f 16 0110 16 0111 16 0112 16 0113 16 0114 16 0115 16 0116 16 0117 16 0120 16 0121 16 0122 16 0123 16 0124 16 0125 16 0126 16 int1 interrupt control register (int1ic) timer b0 interrupt control register (tb0ic) timer b2 interrupt control register (tb2ic) timer a1 interrupt control register (ta1ic) timer a3 interrupt control register (ta3ic) uart0 transmit interrupt control register (s0tic) int2 interrupt control register (int2ic) int0 interrupt control register (int0ic) timer b1 interrupt control register (tb1ic) timer a0 interrupt control register (ta0ic) timer a2 interrupt control register (ta2ic) timer a4 interrupt control register (ta4ic) uart0 receive interrupt control register (s0ric) uart1 transmit interrupt control register (s1tic) uart1 receive interrupt control register (s1ric) key input interrupt control register (kupic) a-d conversion interrupt control register (adic) watchdog timer start register (wdts) watchdog timer control register (wdc) processor mode register 0 (pm0) address match interrupt register 0 (rmad0) address match interrupt register 1 (rmad1) system clock control register 0 (cm0) system clock control register 1 (cm1) address match interrupt enable register (aier) protect register (prcr) processor mode register 1(pm1) int3 interrupt control register (int3ic) int4 interrupt control register (int4ic) int5 interrupt control register (int5ic) timer b5 interrupt control register (tb5ic) timer b4 interrupt control register (tb4ic) timer b3 interrupt control register (tb3ic) uart2 transmit interrupt control register (s2tic) uart2 receive interrupt control register (s2ric) timer a7 interrupt control register (ta7ic) timer a6 interrupt control register (ta6ic) timer a5 interrupt control register (ta5ic) dma0 source pointer (sar0) dma0 destination pointer (dar0) dma0 transfer counter (tcr0) dma0 control register (dm0con) dma1 source pointer (sar1) dma1 destination pointer (dar1) dma1 transfer counter (tcr1) dma1 control register (dm1con) lcd ram0(lram0) lcd ram1(lram1) lcd ram2(lram2) lcd ram3(lram3) lcd ram4(lram4) lcd ram5(lram5) lcd ram6(lram6) lcd ram7(lram7) lcd ram8(lram8) lcd ram9(lram9) lcd ram12(lram12) lcd ram13(lram13) lcd ram14(lram14) lcd ram15(lram15) lcd ram16(lram16) lcd ram17(lram17) lcd ram18(lram18) lcd ram20(lram20) lcd ram21(lram21) lcd ram22(lram22) lcd ram23(lram23) dma0 interrupt control register (dm0ic) dma1 interrupt control register (dm1ic) lcd mode register (lcdm) segment output enable register (seg) key input mode register (kupm) lcd frame frequency counter (lcdtim) bus collision detection interrupt control register (bcnic) note : locations in the sfr area where nothing is allocated are reserved areas. do not access these areas for read or write. 16 sfr mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.7.2. location of peripheral unit control registers (2) 0340 16 0341 16 0342 16 0343 16 0344 16 0345 16 0346 16 0347 16 0348 16 0349 16 034a 16 034b 16 034c 16 034d 16 034e 16 034f 16 0350 16 0351 16 0352 16 0353 16 0354 16 0355 16 0356 16 0357 16 0358 16 0359 16 035a 16 035b 16 035c 16 035d 16 035e 16 035f 16 0360 16 0361 16 0362 16 0363 16 0364 16 0365 16 0366 16 0367 16 0368 16 0369 16 036a 16 036b 16 036c 16 036d 16 036e 16 036f 16 0370 16 0371 16 0372 16 0373 16 0374 16 0375 16 0376 16 0377 16 0378 16 0379 16 037a 16 037b 16 037c 16 037d 16 037e 16 037f 16 0380 16 0381 16 0382 16 0383 16 0384 16 0385 16 0386 16 0387 16 0388 16 0389 16 038a 16 038b 16 038c 16 038d 16 038e 16 038f 16 0390 16 0391 16 0392 16 0393 16 0394 16 0395 16 0396 16 0397 16 0398 16 0399 16 039a 16 039b 16 039c 16 039d 16 039e 16 039f 16 03a0 16 03a1 16 03a2 16 03a3 16 03a4 16 03a5 16 03a6 16 03a7 16 03a8 16 03a9 16 03aa 16 03ab 16 03ac 16 03ad 16 03ae 16 03af 16 03b0 16 03b1 16 03b2 16 03b3 16 03b4 16 03b5 16 03b6 16 03b7 16 03b8 16 03b9 16 03ba 16 03bb 16 03bc 16 03bd 16 03be 16 03bf 16 uart0 transmit/receive mode register (u0mr) uart0 transmit buffer register (u0tb) uart0 receive buffer register (u0rb) timer a0 register (ta0) timer a1 register (ta1) timer a2 register (ta2) timer b0 register (tb0) timer b1 register (tb1) timer b2 register (tb2) count start flag 0 (tabsr0) one-shot start flag 0 (onsf0) timer a0 mode register (ta0mr) timer a1 mode register (ta1mr) timer a2 mode register (ta2mr) timer b0 mode register (tb0mr) timer b1 mode register (tb1mr) timer b2 mode register (tb2mr) up-down flag 0 (udf0) timer a3 register (ta3) timer a4 register (ta4) timer a3 mode register (ta3mr) timer a4 mode register (ta4mr) trigger select register 0 (trgsr0) uart0 bit rate generator (u0brg) uart0 transmit/receive control register 0 (u0c0) uart0 transmit/receive control register 1 (u0c1) uart transmit/receive control register 2 (ucon) clock prescaler reset flag (cpsrf) count start flag 1 (tabsr1) timer b3 register (tb3) timer b4 register (tb4) timer b5 register (tb5) timer b3 mode register (tb3mr) timer b4 mode register (tb4mr) timer b5 mode register(tb5mr) timer a5 register (ta5) timer a6 register (ta6) timer a7 register (ta7) one-shot start flag 1 (onsf1) trigger select register 1 (trgsr1) up-down flag 1(udf1) timer a5 mode register (ta5mr) timer a6 mode register (ta6mr) timer a7 mode register (ta7mr) uart2 special mode register (u2smr) uart2 transmit/receive mode register (u2mr) uart2 bit rate generator (u2brg) uart2 transmit buffer register (u2tb) uart2 transmit/receive control register 0 (u2c0) uart2 transmit/receive control register 1 (u2c1) uart2 receive buffer register (u2rb) interrupt cause select register 1 (ifsr1) dma0 request cause select register (dm0sl) dma1 request cause select register (dm1sl) clock division counter (cdc) interrupt cause select register 0 (ifsr0) clock division counter control register (cdcc) uart2 special mode register 2(u2smr2) flash memory control register (fmcr)(note) note1 : this register is only exist in flash memory version. note2 : locations in the sfr area where nothing is allocated are reserved areas. do not access these areas for read or write. 17 sfr mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.7.3. location of peripheral unit control registers (3) 03c0 16 03c1 16 03c2 16 03c3 16 03c4 16 03c5 16 03c6 16 03c7 16 03c8 16 03c9 16 03ca 16 03cb 16 03cc 16 03cd 16 03ce 16 03cf 16 03d0 16 03d1 16 03d2 16 03d3 16 03d4 16 03d5 16 03d6 16 03d7 16 03d8 16 03d9 16 03da 16 03db 16 03dc 16 03dd 16 03de 16 03df 16 03e0 16 03e1 16 03e2 16 03e3 16 03e4 16 03e5 16 03e6 16 03e7 16 03e8 16 03e9 16 03ea 16 03eb 16 03ec 16 03ed 16 03ee 16 03ef 16 03f0 16 03f1 16 03f2 16 03f3 16 03f4 16 03f5 16 03f6 16 03f7 16 03f8 16 03f9 16 03fa 16 03fb 16 03fc 16 03fd 16 03fe 16 03ff 16 port p0 register (p0) port p0 direction register (pd0) port p1 register (p1) port p1 direction register (pd1) port p2 register (p2) port p2 direction register (pd2) port p3 register (p3) port p3 direction register (pd3) port p4 register (p4) port p4 direction register (pd4) port p5 register (p5) port p5 direction register (pd5) port p6 register (p6) port p6 direction register (pd6) port p7 register (p7) port p7 direction register (pd7) port p8 register (p8) port p8 direction register (pd8) port p9 register (p9) port p9 direction register (pd9) port p10 register (p10) port p10 direction register (pd10) pull-up control register 0 (pur0) pull-up control register 1 (pur1) pull-up control register 2 (pur2) a-d register 0 (ad0) a-d register 1 (ad1) a-d register 2 (ad2) a-d register 3 (ad3) a-d register 4 (ad4) a-d register 5 (ad5) a-d register 6 (ad6) a-d control register 0 (adcon0) a-d control register 1 (adcon1) d-a register 0 (da0) d-a register 1 (da1) d-a control register (dacon) a-d control register 2 (adcon2) port p11 register (p11) port p11 direction register (pd11) port p12 register (p12) port p12 direction register (pd12) real time port control register (rtp) port p13 register (p13) port p13 direction register (pd13) note : locations in the sfr area where nothing is allocated are reserved areas. do not access these areas for read or write. 18 programmable i/o port mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer programmable i/o ports there are 83 programmable i/o ports: p0 to p13 (excluding p7 7 ). each port can be set independently for input or output using the direction register. a pull-up resistance for each block of 4 ports can be set. p7 7 is an input-only port and has no built-in pull-up resistance. figures 1.19.1 to 1.19.4 show the programmable i/o ports. figure 1.19.5 shows the i/o pins. each pin functions as a programmable i/o port and as the i/o for the built-in peripheral devices. to use the pins as the inputs for the built-in peripheral devices, set the direction register of each pin to input mode. when the pins are used as the outputs for the built-in peripheral devices (other than the d-a con- verter), they function as outputs regardless of the contents of the direction registers. when pins are to be used as the outputs for the d-a converter, do not set the direction registers to output mode. (1) direction registers these registers are used to choose the direction of the programmable i/o ports. each bit in these regis- ters corresponds one for one to each i/o pin. note: there is no direction register bit for p7 7 . (2) port registers these registers are used to write and read data for input and output to and from an external device. a port register consists of a port latch to hold output data and a circuit to read the status of a pin. each bit in port registers corresponds one for one to each i/o pin. (3) pull-up control registers the pull-up control register can be set to apply a pull-up resistance to each block of 4 ports. when ports are set to have a pull-up resistance, the pull-up resistance is connected only when the direction register is set for input. the pull-up resistance is not connected for pins that are set for output from peripheral functions, regardless of the setting in the pull-up control register. when pull-up is on for ports p1 and p2, an intermittent pull-up that pulls up the port for only a set period of time, can be performed from the key input mode register. (4) key input mode register with bits 0 and 1 of this register, it is possible to select both edges or the fall edge of the key input for p1 and p2. also, with bit 2, it is possible to make the pull-up for a port (p1 or p2), which is set for pull-up using the pull-up control register, automatically connect as an intermittent pull-up. and, using the significant 3 bits, the pull-up resistance can be connected to and disconnected from ports p12 and p13. (5) real-time port control register the real-time port control register can be used to set the registers of ports p0, p1, p2 and p12 for real- time port output, whereby output is synchronized with timer overflow of timers a0, a1, a5 and a6 in the timer mode. 19 programmable i/o port mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.19.1. programmable i/o ports (1) p1 0 to p1 7 , p2 0 to p2 7 p0 0 to p0 7, p12 0 to p12 5 data bus direction register port latch pull-up selected p3 0 to p3 3, p4 1, p4 7, p5 0 to p5 3, p5 6, p6 2, p7 4 to p7 6, p8 1 data bus direction register port latch pull-up selection p3 4 , p3 5 port on/off lcd drive timing port/segment v l1 /v ss v l3 /v cc data bus direction register port latch timer a overflow 1 1 segment output d ck q v l3 /v cc v l2 /v cc data bus direction register port latch pull-up selection timer a overflow intermittent pull-up control 1 d ck q d ck q interface logic level shift circuit intermittent pull-up control 20 programmable i/o port mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.19.2. programmable i/o ports (2) p4 2 , p4 6 , p6 0 , p6 1 , p7 2, p7 3 , p8 0 , p8 2 , p8 4 , p8 6 p5 7, p6 3 data bus direction register port latch pull-up selection output data bus direction register port latch pull-up selection output p7 0, p7 1 data bus direction register port latch output input respective peripheral functions p7 7 data bus nmi interrupt input 1 1 input respective peripheral functions 1 21 programmable i/o port mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.19.3. programmable i/o ports (3) p9 0 to p9 6 data bus direction register port latch pull-up selection analog input p10 0 to p10 3, p11 0 to p11 7 port on/off lcd drive timing port/segment interface logic level shift circuit data bus direction register port latch 1 segment output v l1 /v ss v l3 /v cc v l3 /v cc v l2 /v cc p13 0 data bus direction register analog output pull-up selection input respective peripheral functions port latch 22 programmable i/o port mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.19.5. i/o pins figure 1.19.4. programmable i/o ports (4) p13 1 data bus direction register port latch analog output pull-up selection com 0 to com 3 , seg to seg 15 v l3 v l2 v l1 v ss the gate input signal of each transistor is controlled by the lcd duty ratio and the bias value. note : symbolizes a parasitic diode. do not apply a voltage higher than v cc to each pin. (note) reset reset signal input 23 programmable i/o port mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer table 1.19.1. example connection of unused pins in single-chip mode figure 1.19.13. example connection of unused pins port p0 to p13 (except for p7 7 ) (input mode) (input mode) (output mode) nmi av cc av ss v ref microcomputer v cc v ss open v l3 v l2 v l1 cnv ss open open open x cout com 0 ? com 3 seg 2 ? seg 15 x cin / p u f * g t f u u j o h u i f t f q j o t j o p v u q v u n p e f b o e p q f o j o h u i f n q p s u t b s f j o j o q v u n p e f v o u j m m t x j u d i f e j o u p p v u q v u n p e f c z v t f p g t p g u x b s f b g u f s s f t f u 5 i v t u i f w p m u b h f m f w f m t p g u i f q j o t c f d p n f v o t u b c m f b o e u i f s f d b o c f j o t u b o d f t j o x i j d i u i f q p x f s t p v s d f d v s s f o u j o d s f b t f t x i j m f u i f q p s u t b s f j o j o q v u n p e f * o w j f x p g b o j o t u b o d f j o x i j d i u i f d p o u f o u t p g u i f e j s f d u j p o s f h j t u f s t d i b o h f e v f u p b s v o b x b z h f o f s b u f e c z o p j t f p s p u i f s d b v t f t t f u u j o h u i f d p o u f o u t p g u i f e j s f d u j p o s f h j t u f s t q f s j p e j d b m m z c z v t f p g t p g u x b s f j o d s f b t f t q s p h s b n s f m j b c j m j u z / p u f 8 j u i f y u f s o b m d m p d l j o q v u u p 9 * / q j o / p u f 0 v u q v u - j g q p s u 1 b o e 1 b s f t f u u p p v u q v u n p e f 1 p s u 1 b o e 1 b s f / d i b o o f m p q f o e s b j o pin name connection ports p0 to p13 (excluding p7 7 ) x out (note 2),x cout av ss , v ref av cc after setting for output mode, leave these pins open; or after setting for input mode, connect every pin to v ss via a resistor.(note1,note3) open connect to v cc connect to v ss nmi connect via resistor to v cc (pull-up) c1, c2 v l1 v l2 , v l3 open connect to v cc connect to v ss cnv ss x cin connect via resistor to v ss (pull-down) com 0 ? com 3 seg 2 ? seg 15 open open connect via resistor to v ss 24 usage precaution mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer timer a (timer mode) usage precaution timer a (event counter mode) (1) reading the timer ai register while a count is in progress allows reading, with arbitrary timing, the value of the counter. reading the timer ai register with the reload timing gets ffff 16 by underflow or 0000 16 by overflow. reading the timer ai register after setting a value in the timer ai register with a count halted but before the counter starts counting gets a proper value. (2) when stop counting in free run type, set timer again. (1) reading the timer ai register while a count is in progress allows reading, with arbitrary timing, the value of the counter. reading the timer ai register with the reload timing gets ffff 16 . reading the timer ai register after setting a value in the timer ai register with a count halted but before the counter starts counting gets a proper value. (1) setting the count start flag to 0 while a count is in progress causes as follows: the counter stops counting and a content of reload register is reloaded. the tai out pin outputs l level. the interrupt request generated and the timer ai interrupt request bit goes to 1 . (2) the timer ai interrupt request bit goes to 1 if the timer's operation mode is set using any of the following procedures: selecting one-shot timer mode after reset. changing operation mode from timer mode to one-shot timer mode. changing operation mode from event counter mode to one-shot timer mode. therefore, to use timer ai interrupt (interrupt request bit), set timer ai interrupt request bit to 0 after the above listed changes have been made. timer a (one-shot timer mode) (1) the timer ai interrupt request bit becomes 1 if setting operation mode of the timer in compliance with any of the following procedures: selecting pwm mode after reset. changing operation mode from timer mode to pwm mode. changing operation mode from event counter mode to pwm mode. therefore, to use timer ai interrupt (interrupt request bit), set timer ai interrupt request bit to 0 after the above listed changes have been made. (2) setting the count start flag to 0 while pwm pulses are being output causes the counter to stop counting. if the tai out pin is outputting an h level in this instance, the output level goes to l , and the timer ai interrupt request bit goes to 1 . if the tai out pin is outputting an l level in this instance, the level does not change, and the timer ai interrupt request bit does not becomes 1 . timer a (pulse width modulation mode) timer b (timer mode, event counter mode) (1) reading the timer bi register while a count is in progress allows reading , with arbitrary timing, the value of the counter. reading the timer bi register with the reload timing gets ffff 16 . reading the timer bi register after setting a value in the timer bi register with a count halted but before the counter starts counting gets a proper value. 25 usage precaution mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer stop mode and wait mode a-d converter (1) if changing the measurement mode select bit is set after a count is started, the timer bi interrupt request bit goes to 1 . (2) when the first effective edge is input after a count is started, an indeterminate value is transferred to the reload register. at this time, timer bi interrupt request is not generated. timer b (pulse period/pulse width measurement mode) (1) write to each bit (except bit 6) of a-d control register 0, to each bit of a-d control register 1, and to bit 0 of a-d control register 2 when a-d conversion is stopped (before a trigger occurs). in particular, when the vref connection bit is changed from 0 to 1 , start a-d conversion after an elapse of 1 s or longer. (2) when changing a-d operation mode, select analog input pin again. (3) using one-shot mode or single sweep mode read the correspondence a-d register after confirming a-d conversion is finished. (it is known by a- d conversion interrupt request bit.) (4) using repeat mode, repeat sweep mode 0 or repeat sweep mode 1 use the undivided main clock as the internal cpu clock. ____________ (1) when returning from stop mode by hardware reset, reset pin must be set to l level until main clock oscillation is stabilized. (2) when switching to either wait mode or stop mode, instructions occupying four bytes either from the wait instruction or from the instruction that sets the every-clock stop bit to 1 within the instruction queue are prefetched and then the program stops. so put at least four nops in succession either to the wait instruction or to the instruction that sets the every-clock stop bit to 1 . (3) when the mcu running in low-speed or low power dissipation mode, do not enter wait mode with peripheral function clock stop bit (cm02) set to "1". (1) make sure timer ai for real time port output is set for timer mode, and is set to have no gate function using the gate function select bit. (2) before setting the real time port mode select bit to 1 , temporarily turn off the timer ai used and write its set value to the timer ai register. real time port (1) in case iic mode select bit (bit 0 of address 0377 16 ) is set to "1" with uart2.when setting up port direction p7 (address 03ef 16 ), write immediate values. if you use read/modify/write instructions (bset,bclr,and,or,etc..) on the p7 direction register, the value of p7 1 direction register may change to unknown data. (2) mask rom version onry when iic mode select bit (bit 0 of address 0377 16 ) and the internal/ external select bit (bit 3 of address 0378 16 ) are both set to "1". the function of "scl wait output bit 2 (bit 5 of address 0376 16 )" dose not work. (3) mask rom version onry when iic mode select bit (bit 0 of address 0377 16 ) and the internal/ external select bit (bit 3 of address 0378 16 ) are both set to "1". according to the datasheet, when iicm is set to "1", the port terminal is readable by the cpu even though "1" is assigned to p7 1 of the direction register. however, the cpu cannot read port p7 1 data if the p7 1 direction register is set to "1". sirial i/o 26 usage precaution mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer interrupts (1) reading address 00000 16 when maskable interrupt is occurred, cpu read the interrupt information (the interrupt number and interrupt request level) in the interrupt sequence. the interrupt request bit of the certain interrupt written in address 00000 16 will then be set to 0 . reading address 00000 16 by software sets enabled highest priority interrupt source request bit to 0 . though the interrupt is generated, the interrupt routine may not be executed. do not read address 00000 16 by software. (2) setting the stack pointer the value of the stack pointer immediately after reset is initialized to 0000 16 . accepting an interrupt before setting a value in the stack pointer may become a factor of runaway. be sure to set a value in the stack pointer before accepting an interrupt. _______ when using the nmi interrupt, initialize the stack point at the beginning of a program. concerning _______ the first instruction immediately after reset, generating any interrupts including the nmi interrupt is prohibited. _______ (3) the nmi interrupt _______ _______ the nmi interrupt can not be disabled. be sure to connect nmi pin to vcc via a pull-up resistor if unused. _______ do not get either into stop mode with the nmi pin set to l . (4) external interrupt when the polarity of the int0 to int5 pins is changed, the interrupt request bit is sometimes set to "1". after changing the polarity, set the interrupt request bit to "0". 27 usage precaution mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer example 1: int_switch1: fclr i ; disable interrupts. and.b #00h, 0055h ; clear ta0ic int. priority level and int. request bit. nop ; four nop instructions are required when using hold function. nop fset i ; enable interrupts. example 2: int_switch2: fclr i ; disable interrupts. and.b #00h, 0055h ; clear ta0ic int. priority level and int. request bit. mov.w mem, r0 ; dummy read. fset i ; enable interrupts. example 3: int_switch3: pushc flg ; push flag register onto stack fclr i ; disable interrupts. and.b #00h, 0055h ; clear ta0ic int. priority level and int. request bit. popc flg ; enable interrupts. when a instruction to rewrite the interrupt control register is executed but the interrupt is disabled, the interrupt request bit is not set sometimes even if the interrupt request for that register has been generated. this will depend on the instruction. if this creates problems, use the below in- structions to change the register. instructions : and, or, bclr, bset (5) rewrite the interrupt control register to rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that register. if there is possibility of the interrupt request occur, rewrite the interrupt control register after the interrupt is disabled. the program examples are described as follow: 28 electric characteristics (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer table 1.21.1. absolute maximum ratings operating ambient temperature parameter unit input voltage reset, v ref , x in analog supply voltage supply voltage output voltage v o 0.3 to vcc+0.3 0.3 to vcc+0.3 p d power dissipation storage temperature 0.3 to 6.5 rated value 0.3 to 6.5 v v v condition v i avcc vcc t stg t opr symbol mw v 40 to 150 300 20 to 85 p3 0 to p3 5 , p4 1 ,p4 2 , p4 6 , p4 7 , p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p4 1 , p4 2 , p4 6 , p4 7 , p5 0 to p5 3 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , vcc=avcc vcc=avcc p7 2 to p7 7 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , vl1 p13 0 , p13 1 0.3 to vl2 vl2 vl1 to vl3 vl3 vl2 to 6.5 p7 0 , p7 1 , c1, c2 0.3 to 6.5 p5 6 , p5 7 , p6 0 to p6 3 , p7 2 to p7 6 , p13 0 , p13 1 , x out p0 0 to p0 7 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 0.3 to vcc when output port when segment output 0.3 to vl3 p7 0 , p7 1 0.3 to 6.5 (mask rom version cnvss) (flash memory version cnvss) p11 0 to p11 7 , p12 0 to p12 5 , ta = 25 c c c p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , 29 electric characteristics (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer note 1: the mean output current is the mean value within 100ms. note 2: the total i ol (peak) for ports p0, p1, p2, p3 0 to p3 5 , p4, p5, p6, p7 0 to p7 6 and p12 2 to p12 7 must be 80ma max. the total i oh (peak) for ports p0, p1, p2, p3 0 to p3 5 , p4, p5, p6, p7 2 to p7 6 and p12 2 to p12 7 must be 80ma max. the total i ol (peak) for ports p8, p9, p10, p11, p12 0 , p12 1 and p13 0 to p13 2 must be 80ma max. the total i oh (peak) for ports p8, p9, p10, p11, p12 0 ,p12 1 and p13 0 to p13 2 must be 80ma max. note 3: relationship between main clock oscillation frequency and supply voltage. table 1.21.2. recommended operating conditions (referenced to v cc = 2.7v to 5.5v at ta = 20 to 85 o c unless otherwise specified) typ. max. unit parameter vcc supply voltage symbol min. standard f (xc in ) subclock oscillation frequency khz 50 32.768 v analog supply voltage vcc avcc v v 0 0 analog supply voltage analog supply voltage vss avss 0.8vcc v v v vcc 0.2vcc 0 low input voltage high input voltage 0.5 low peak output current 10.0 f (x in ) main clock input oscillation frequency mhz i ol (peak) 10 v cc =4.0v to 5.5v with wait 5 x v cc mhz v ih v il i oh (avg) high average output current i oh (peak) high peak output current i ol (avg) low average output current ma ma ma 2.5 p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p0 0 to p0 7 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 5.0 0 0 v cc =2.7v to 4.0v 10.000 mhz 10 v cc =4.0v to 5.5v 2.31 x v cc mhz 0 0 v cc =2.7v to 4.0v +0.760 no wait 2.7 5.5 5.0 p7 0 , p7 1 0.8vcc 6.5 p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , 10.0 0.1 ma 5.0 5.0 (note 1) (note 1) (note 3) p4 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 2 to p7 7 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 2 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p13 0 , p13 1 , p13 0 , p13 1 , x in , reset, cnv ss p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 0 to p7 7 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 , x in , reset, cnv ss p0 0 to p0 7 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 2 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p13 0 , p13 1 , p0 0 to p0 7 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 0 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p13 0 , p13 1 , p0 0 to p0 7 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 0 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p13 0 , p13 1 , (note 2) (note 2) aaaa aaaa aaaa aaaa 5.54.0 2.7 0.0 3.5 10.0 main clock input oscillation frequency (no wait) supply voltage [v] (bclk: no division) operating maximum frequency [mh z ] 5 x vcc 10.000mhz aaaa aaaa aaaa aaaa 5.5 4.0 2.7 0.0 10.0 main clock input oscillation frequency (with wait) supply voltage [v] (bclk: no division) 7.0 2.31 x v cc +0.760mhz operating maximum frequency [mh z ] 30 electric characteristics (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer table 1.21.3. electrical characteristics (referenced to v cc = 5v, v ss = 0v at ta = 25 o c, f(x in )=10mh z unless otherwise specified) v cc = 5v symbol v oh v oh feedback resistance x cin high output voltage high output voltage feedback resistance x in p6 0 to p6 3 , p7 2 to p7 6 , p8 0 to p8 2 , p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p8 4 , p8 6 , p90 to p9 6 , p130 , p13 1 p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 0 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 standard typ. unit measuring condition v 4.7 int 0 to int 5 , ad trg , cts 0 , clk 0 , nmi, ki 0 to ki 15 (note), ki 16 to ki 19 min. ta3 out , ta4 out , ta7 out , p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , max. 3.0 parameter i oh = 0.1ma i oh = 5ma p0 0 to p0 7 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p5 0 to p5 3 , p5 6 , p5 7 , v v oh x out high output voltage highpower lowpower v 3.0 3.0 i oh = 1ma i oh = 0.5ma v ol low output voltage v 2.0 i ol =5ma v ol x out low output voltage highpower lowpower v 2.0 2.0 i oh =1ma i oh =0.5ma hysteresis hysteresis high input current i ih v t+- v t- v t+- v t- 0.2 0.8 v 0.2 1.8 v 5.0 a a reset ta0 in , ta3 in , ta4 in , tb0 in to tb3 in , v i =5v 5.0 low input current i il v ram ram retention voltage when clock is stopped 2.0 v v i =0v v ol x cout low output voltage highpower lowpower v with no load applied with no load applied 0 0 v oh x cout high output voltage highpower lowpower v 1.6 with no load applied with no load applied 3.0 k 167.0 pull-up resistance r pullup v i =0v 30.0 50.0 r fxcin 6.0 m r fxin 1.0 m i oh = 200a i ol =200a 0.45 3.0 note : has no effect during intermittent pullup operation. p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p7 0 to p7 7 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 , x in , reset, cnv ss p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p7 0 to p7 7 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 , x in , reset, cnv ss p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p7 2 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 , 31 electric characteristics (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer table 1.21.5. a-d conversion characteristics (referenced to v cc = av cc = v ref = 5v, vss = av ss = 0v at ta = 25 o c, f(x in ) = 10mh z unless otherwise specified) v cc = 5v symbol standard typ. unit measuring condition min. max. parameter icc power supply current square wave, no division when clock is stopped ta=25 c 1.0 a ma ta=85 c 20.0 when clock is stopped 19.0 38.0 f(x in )=10mhz f(x cin )=32khz when a wait instruction is executed 4.0 a i/o pin is no load applied f(x cin )=32khz square wave 90.0 a v l1 supply voltage (vl1) when voltage multiplier used v 1.3 2.1 1.7 i l1 power supply current (vl1) vl1=1.7v,f( lcdck )=200hz 6.0 a 3.0 f(x cin )=32khz square wave mask rom version flash memory version 200.0 a standard min. typ. max. resolution absolute accuracy bits lsb v ref =v cc 3 10 symbol parameter measuring condition unit v ref =v cc = 5v r ladder t conv ladder resistance conversion time (10bit) reference voltage analog input voltage k s v v ia v ref v0 2 10 v cc v ref 40 3.3 conversion time (8bit) s 2.8 t conv t samp sampling time 0.3 s v ref =v cc sample & hold function not available sample & hold function available(10bit) v ref =v cc = 5v lsb 3 sample & hold function available(8bit) v ref = v cc = 5v 2 lsb min. typ. max. t su r o resolution absolute accuracy setup time output resistance reference power supply input current bits % k ma i vref 1.0 1.5 8 3 symbol parameter measuring condition unit 20104 s ( note ) standard table 1.21.4. electrical characteristics (referenced to v cc = 5v, v ss = 0v at ta = 25 o c, f(x in )=10mh z unless otherwise specified) table 1.21.6. d-a conversion characteristics (referenced to v cc = av cc =v ref =5v, v ss = av ss = 0v at ta = 25 o c, f(x in ) = 10mh z unless otherwise specified) note: this applies when using one d-a converter, with the d-a register for the unused d-a converter set to 00 16 . the a-d converter's ladder resistance is not included. also, when the vref is unconnected at the a-d control register, i vref is sent. 32 timing (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer timing requirements (referenced to v cc = 5v, v ss = 0v at ta = 25 o c unless otherwise specified) table 1.21.7. external clock input table 1.21.9. timer a input (gating input in timer mode) table 1.21.10. timer a input (external trigger input in one-shot timer mode) table 1.21.11. timer a input (external trigger input in pulse width modulation mode) table 1.21.12. timer a input (up/down input in event counter mode) v cc = 5v max. external clock rise time ns t r min. external clock input cycle time external clock input high pulse width external clock input low pulse width external clock fall time ns ns ns ns t c t w(h ) t w(l) t f parameter symbol unit standard 15 100 40 40 15 standard max. ns tai in input low pulse width t w(tal) min. ns ns unit tai in input high pulse width t w(tah) parameter symbol t c(ta) tai in input cycle time 40 100 40 standard max. min. ns ns ns unit tai in input cycle time tai in input high pulse width tai in input low pulse width t c(ta) t w(tah) t w(tal) symbol parameter 400 200 200 standard max. min. ns ns ns unit tai in input cycle time tai in input high pulse width tai in input low pulse width t c(ta) t w(tah) t w(tal) symbol parameter 200 100 100 standard max. min. ns ns unit t w(tah) t w(tal) symbol parameter tai in input high pulse width tai in input low pulse width 100 100 standard max. min. ns ns ns unit ns ns symbol parameter tai out input cycle time tai out input high pulse width tai out input low pulse width tai out input setup time tai out input hold time t c(up) t w(uph) t w(upl) t su(up-t in ) t h(t in- up) 2000 1000 1000 400 400 table 1.21.8. timer a input (counter input in event counter mode) 33 timing (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer timing requirements (referenced to v cc = 5v, v ss = 0v at ta = 25 o c unless otherwise specified) table 1.21.13. timer b input (counter input in event counter mode) table 1.21.14. timer b input (pulse period measurement mode) table 1.21.15. timer b input (pulse width measurement mode) table 1.21.16. a-d trigger input table 1.21.17. serial i/o _______ table 1.21.18. external interrupt inti inputs v cc = 5v standard max. min. tbi in input cycle time (counted on one edge) tbi in input high pulse width (counted on one edge) tbi in input low pulse width (counted on one edge) ns ns ns t c(tb) t w(tbh) t w(tbl) parameter symbol unit t c(tb) t w(tbl) t w(tbh) ns ns ns tbi in input high pulse width (counted on both edges) tbi in input low pulse width (counted on both edges) tbi in input cycle time (counted on both edges) standard max. min. ns ns t c(tb) t w(tbh) symbol parameter unit t w(tbl) ns tbi in input high pulse width tbi in input cycle time tbi in input low pulse width standard max. min. ns ns t c(tb) symbol parameter unit t w(tbl) ns t w(tbh) tbi in input cycle time tbi in input high pulse width tbi in input low pulse width standard max. min. ns ns t c(ad) t w(adl) symbol parameter unit ad trg input cycle time (trigger able minimum) ad trg input low pulse width 100 40 40 80 80 200 400 200 200 400 200 200 1000 125 ns ns ns ns ns ns ns standard max. min. ns ns t w(inh) t w(inl) symbol parameter unit inti input low pulse width inti input high pulse width standard max.min. clki input cycle time clki input high pulse width clki input low pulse width t c(ck) t w(ckh) t w(ckl) parametersymbol unit t d(c-q) t su(d-c) t h(c-q) txdi hold time rxdi input setup time txdi output delay time t h(c-d) rxdi input hold time 250 250 200 100 100 0 30 90 80 34 timing (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer figure 1.21.1. port p0 to p13 measurement circuit p6 p7 p8 p10 p9 p0 p1 p2 p3 p4 p5 30pf p11 p12 p13 35 timing (v cc = 5v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer t su(d c) tai in input tai out input during event counter mode tbi in input clki txdi rxdi t c(ta) t w(tah) t w(tal) t c(up) t w(uph) t w(upl) t c(tb) t w(tbh) t w(tbl) t c(ad) t w(adl) t c(ck) t w(ckh) t w(ckl) t w(inl) t w(inh) t d(c q) t h(c d) t h(c q) t h(t in up) t su(up t in ) tai in input (when count on falling edge is selected) tai in input (when count on rising edge is selected) tai out input (up/down input) inti input ad trg input v cc = 5v 36 electric characteristics (v cc = 3v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer v cc = 3v table 1.21.19. electrical characteristics (referenced to v cc = 3v, v ss = 0v at ta = 25 o c, f(x in ) = 7mh z , with wait) symbol v oh v oh feedback resistance x cin high output voltage high output voltage feedback resistance x in p6 0 to p6 3 , p7 2 to p7 6 , p8 0 to p8 2 , p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p8 4 , p8 6 , p90 to p9 6 , p130 , p13 1 p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p7 0 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 standard typ. unit measuring condition int 0 to int 5 , ad trg , cts 0 , clk 0 , nmi, ki 0 to ki 15 (note), ki 16 to ki 19 min. ta3 out , ta4 out , ta7 out , p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , max. parameter p0 0 to p0 7 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p5 0 to p5 3 , p5 6 , p5 7 , v oh x out high output voltage highpower lowpower v ol low output voltage v ol x out low output voltage highpower lowpower hysteresis hysteresis high input current i ih v t+- v t- v t+- v t- reset ta0 in , ta3 in , ta4 in , tb0 in to tb3 in , low input current i il v ram ram retention voltage v ol x cout low output voltage highpower lowpower v oh x cout high output voltage highpower lowpower pull-up resistance r pullup r fxcin r fxin note : has no effect during intermittent pullup operation. p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p7 0 to p7 7 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 , x in , reset, cnv ss p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p7 0 to p7 7 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 , x in , reset, cnv ss p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p5 0 to p5 3 , p5 6 , p5 7 , p6 0 to p6 3 , p3 0 to p3 5 , p4 1 , p4 2 , p4 6 , p4 7 , p7 2 to p7 6 , p8 0 to p8 2 , p8 4 , p8 6 , p9 0 to p9 6 , p10 0 to p10 3 , p11 0 to p11 7 , p12 0 to p12 5 , p13 0 , p13 1 , v 2.0 i oh = 20a i oh = 1ma v v 2.5 2.5 i oh = 0.1ma i oh = 50a v 0.5 i ol =1ma v 0.5 0.5 i oh =0.1ma i oh =50a 0.2 0.8 v 0.2 1.8 v 4.0 a a v i =3v 4.0 when clock is stopped 2.0 v v i =0v v with no load applied with no load applied 0 0 v 1.6 with no load applied with no load applied 3.0 k 500.0 v i =0v 66.0 120.0 10.0 m 3.0 m 2.5 37 electric characteristics (v cc = 3v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer v cc = 3v table 1.21.22. d-a conversion characteristics (referenced to v cc = av cc = v ref = 3v, v ss = av ss = 0v, at ta = 25 o c, f(x in ) = 7mh z unless otherwise specified) note : this applies when using one d-a converter, with the d-a register for the unused d-a converter set to 00 16 . the a-d converter's ladder resistance is not included. also, when the vref is unconnected at the a-d control register, iv ref is sent. table 1.21.21. a-d conversion characteristics (referenced to v cc = av cc = v ref = 3v, v ss = av ss = 0v at ta = 25 o c, f(x in ) = 7mh z , with wait unless otherwise specified) symbol standard typ. unit measuring condition min. max. parameter icc power supply current square wave, no division when clock is stopped ta=25 c 1.0 a ma ta=85 c 20.0 when clock is stopped 6.0 15.0 f(x in )=7mhz f(x cin )=32khz when a wait instruction is executed oscillation capacity high (note) 2.8 a i/o pin is no load applied f(x cin )=32khz square wave 40.0 a v l1 supply voltage (vl1) when voltage multiplier used v 1.3 2.11.7 i l1 power supply current (vl1) vl1=1.7v,f( lcdck )=200hz 6.0 a 3.0 f(x cin )=32khz square wave mask rom version flash memory version 150.0 a f(x cin )=32khz when a wait instruction is executed oscillation capacity low (note) 0.9 a note: with one timer operated using f c32 . standard resolution absolute accuracy bits lsb v ref =v cc 2 10 symbol parameter measuring condition v ref =v cc = 3v, ad =f ad /2 r ladder ladder resistance reference voltage analog input voltage k v v ia v ref v0 2.7 10 v cc v ref 40 conversion time (8bit) s 14.0 t conv v ref =v cc sample & hold function not available (8bit) min. typ. max. unit min. typ. max. t su r o resolution absolute accuracy setup time output resistance reference power supply input current bits % k ma i vref 1.0 1.0 8 3 symbol parameter measuring condition unit 20 10 4 s ( note ) standard table 1.21.20. electrical characteristics (referenced to v cc = 3v, v ss = 0v at ta = 25 o c, f(x in ) = 7mh z , with wait) 38 timing (v cc = 3v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer table 1.21.25. timer a input (gating input in timer mode) table 1.21.26. timer a input (external trigger input in one-shot timer mode) table 1.21.27. timer a input (external trigger input in pulse width modulation mode) table 1.21.28. timer a input (up/down input in event counter mode) table 1.21.24. timer a input (counter input in event counter mode) timing requirements (referenced to v cc = 3v, v ss = 0v at ta = 25 o c unless otherwise specified) v cc = 3v table 1.21.23. external clock input max. external clock rise time ns t r min. external clock input cycle time external clock input high pulse width external clock input low pulse width external clock fall time ns ns ns ns t c t w(h ) t w(l) t f parameter symbol unit standard 18 143 60 60 18 standard max. ns tai in input low pulse width t w(tal) min. ns ns unit tai in input high pulse width t w(tah) parameter symbol t c(ta) tai in input cycle time 60 150 60 standard max. min. ns ns ns unit tai in input cycle time tai in input high pulse width tai in input low pulse width t c(ta) t w(tah) t w(tal) symbol parameter 600 300 300 standard max. min. ns ns ns unit tai in input cycle time tai in input high pulse width tai in input low pulse width t c(ta) t w(tah) t w(tal) symbol parameter 300 150 150 standard max. min. ns ns unit t w(tah) t w(tal) symbol parameter tai in input high pulse width tai in input low pulse width 150 150 standard max. min. ns ns ns unit ns ns symbol parameter tai out input cycle time tai out input high pulse width tai out input low pulse width tai out input setup time tai out input hold time t c(up) t w(uph) t w(upl) t su(up-t in ) t h(t in- up) 3000 1500 1500 600 600 39 timing (v cc = 3v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer timing requirements (referenced to v cc = 3v, v ss = 0v at ta = 25 o c unless otherwise specified) v cc = 3v table 1.21.29. timer b input (counter input in event counter mode) table 1.21.30. timer b input (pulse period measurement mode) table 1.21.31. timer b input (pulse width measurement mode) table 1.21.32. a-d trigger input table 1.21.33. serial i/o _______ table 1.21.34. external interrupt inti inputs standard max.min. tbi in input cycle time (counted on one edge) tbi in input high pulse width (counted on one edge) tbi in input low pulse width (counted on one edge) ns ns ns t c(tb) t w(tbh) t w(tbl) parametersymbol unit t c(tb) t w(tbl) t w(tbh) ns ns ns tbi in input high pulse width (counted on both edges) tbi in input low pulse width (counted on both edges) tbi in input cycle time (counted on both edges) standard max. min. ns ns t c(tb) t w(tbh) symbol parameter unit t w(tbl) ns tbi in input high pulse width tbi in input cycle time tbi in input low pulse width standard max. min. ns ns t c(tb) symbol parameter unit t w(tbl) ns t w(tbh) tbi in input cycle time tbi in input high pulse width tbi in input low pulse width standard max. min. ns ns t c(ad) t w(adl) symbol parameter unit ad trg input cycle time (trigger able minimum) ad trg input low pulse width 150 60 60 160 160 300 600 300 300 600 300 300 1500 200 ns ns ns ns ns ns ns standard max. min. ns ns t w(inh) t w(inl) symbol parameter unit inti input low pulse width inti input high pulse width standard max.min. clki input cycle time clki input high pulse width clki input low pulse width t c(ck) t w(ckh) t w(ckl) parametersymbol unit t d(c-q) t su(d-c) t h(c-q) txdi hold time rxdi input setup time txdi output delay time t h(c-d) rxdi input hold time 380 380 300 150 150 0 50 90 160 40 timing (v cc = 3v) mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer v cc = 3v t su(d c) tai in input tai out input during event counter mode tbi in input clki txdi rxdi t c(ta) t w(tah) t w(tal) t c(up) t w(uph) t w(upl) t c(tb) t w(tbh) t w(tbl) t c(ad) t w(adl) t c(ck) t w(ckh) t w(ckl) t w(inl) t w(inh) t d(c q) t h(c d) t h(c q) t h(t in up) t su(up t in ) tai in input (when count on falling edge is selected) tai in input (when count on rising edge is selected) tai out input (up/down input) inti input ad trg input 6 t b h f q s f d b v u j p o q f d v m j b s u p . ( s p v q mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer 6 t b h f q s f d b v u j p o b h b j o t u u i f e j g g f s f o d f t c f u x f f o . ( s p v q b o e . ( s p v q % f m f u f e q j o t g s p n . ( s p v q 1 p s u % f m f u f e q j o o b n f 1 1 1 1 1 1 1 1 1 1 1 1 1 1 p u i f s t 1 5 " 0 6 5 z 1 5 " * / z 1 5 " 0 6 5 z 1 5 " * / 1 5 # * / z 1 5 # * / 1 $ 5 4 3 5 4 $ - , 4 z 1 $ - , z 1 3 9 % z 1 5 9 % 1 5 " * / z 1 5 " * / z 1 5 " * / 1 " / 1 4 & ( z 1 4 & ( z 1 4 & ( z 1 4 & ( 1 4 & ( z 1 4 & ( 1 % " 4 & ( z 4 & ( z 7 4 4 q j o % j g g f s f o d f t c f u x f f o . ( s p v q b o e . ( s p v q * u f n t 3 0 . # z u f 3 " . # z u f * o q v u p o m z 0 v u q v u p o m z $ . 0 4 * 0 / d i b o o f m p q f o e s b j o * o u f s o b m . f n p s z * 0 1 p s u t % . " $ d i b o o f m t c j u u j n f s t $ 3 $ 0 q f s b u j p o $ j s d v j u $ m p d l 4 z o d 6 " 3 5 $ m p d l 4 z o d i s p o p v t 6 " 3 5 p o m z 4 f s j b m * 0 " % $ p o w f s u f s s f t p m v u j p o d i b o o f m t % " $ p o w f s u f s s f t p m v u j p o d i b o o f m t & y u f s o b m * o u f s s v q u t t p v s d f 8 b u d i e p h 5 j n f s 4 f h n f o u m j o f t $ p n n p o m j o f t $ i b s h f q v n q - $ % $ p o u s p m m f s % s j w f s 3 f b m 5 j n f 0 v u q v u 1 p s u t c j u t q p s u t , f z p o 8 b l f v q m j o f t / v n c f s p g # b t j d * o t u s v d u j p o t . j o j n v n * o t u s v d u j p o & y d v u j p o 5 j n f o t 0 q f s b u j o h 5 f n q f s b u v s f 3 b o h f ? 4 v c $ m p d l ( f o f s b u j o h $ j s d v j u 1 b d l b h f t 1 p x f s 4 p v s d f 7 p m u b h f 7 . ( s p v q . ( s p v q , , , , , , , , , , , , * o q v u p o m z 0 v u q v u p o m z t i b s f e x j u i - $ % p v u q v u t * o q v u p o m z 0 v u q v u p o m z t i b s f e x j u i - $ % p v u q v u t m j o f t b s f t i b s f e x j u i - $ % p v u q v u t c j u t " w b j m b c m f . b y m j o f t i b w f * o u f s n j u u f o u q v m m v q p q f s b u j p o q j o 5 2 ' 1 1 ' # " q j o - 2 ' 1 1 2 " u p . ) [ x j u i x b j u z u p . ) [ u p z u p . ) [ c j u t c j u t c j u t " w b j m b c m f " w b j m b c m f q j o - 2 ' 1 1 3 " m j o f t b s f t i b s f e x j u i - $ % p v u q v u t 6 o e f s e f w f m p q n f o uy 6 o e f s q m b o o j o h " q s j m , , 6 t b h f q s f d b v u j p o q f d v m j b s u p . ( s p v q mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer y 6 " 3 5 j t o p u b w b j m b c m f 6 t b h f q s f d b v u j p o b h b j o t u t f s j b m * 0 6 t b h f q s f d b v u j p o b h b j o t u u j n f s # . p e f ' v o d u j p o 5 j n f s # b o e # b s f o p u b w b j m b c m f / p u b w b j m b c m f u j n f s # j & w f o u d p v o u f s n p e f $ p v o u t p v s d f j o q v u 1 v m t f q f s j p e q v m t f x j e u i n f b t v s f n f o u n p e f 5 j n f s # b o e # b s f o p u b w b j m b c m f y 1 j o t 1 b o e 1 b s f e f m f u f e 6 t b h f q s f d b v u j p o b h b j o t u s f b m u j n f q p s u p v u q v u t y 1 j o t 4 & ( 4 & ( 4 & ( u p 4 & ( 4 & ( b o e 4 & ( b s f e f m f u f e y " e e s f t t f t p g u i f e f t j h o b u f e 3 " . g p s u i f - $ % e j t q m b z " # b o e b s f s f t f s w f e b s f b y # j u p g u i f t f h n f o u p v u q v u f o b c m f s f h j t u f s b e e s f t t j t s f t f s w f e c j u . v t u b m x b z t c f d m f b s u p 6 t b h f q s f d b v u j p o b h b j o t u - $ % d p o u s p m m f s e s j w f s 6 t b h f q s f d b v u j p o b h b j o t u u j n f s " . p e f ' v o d u j p o 5 j n f s n p e f 1 v m t f p v u q v u 5 j n f s " b o e " b s f o p u b w b j m b c m f / p u b w b j m b c m f u j n f s " j 0 o f t i p u u j n f s n p e f 5 j n f s " " b o e " u p " b s f o p u b w b j m b c m f ( b u f j o q v u & w f o u d p v o u f s n p e f 1 v m t f p v u q v u 5 j n f s " b o e " b s f o p u b w b j m b c m f $ p v o u t p v s d f j o q v u 5 j n f s " " b o e " u p " b s f o p u b w b j m b c m f 6 q e p x o d p v o u t f m f d u j o q v u 5 j n f s " b o e " b s f o p u b w b j m b c m f 5 x p q i b t f q v m t f j o q v u 1 v m t f p v u q v u 5 s j h h f s j o q v u 5 j n f s " b o e " b s f o p u b w b j m b c m f 5 j n f s " " b o e " u p " b s f o p u b w b j m b c m f 1 v m t f x j e u i n p e v m b u j p o n p e f 5 s j h h f s j o q v u 5 j n f s " b o e " b s f o p u b w b j m b c m f 5 j n f s " b o e " u p " b s f o p u b w b j m b c m f / p u f } 5 j n f s " b o e " b s f b w b j m b c m f 5 j n f s " b o e " b s f o p u b w b j m b c m f / p u f 6 t b h f q s f d b v u j p o q f d v m j b s u p . ( s p v q mitsubishi microcomputers M30221 group single-chip 16-bit cmos microcomputer 6 t b h f q s f d b v u j p o b h b j o t u " % d p o w f s u f s y " / q j o j t e f m f u f e y % p o p u t f u u i f b o b m p h j o q v u q j o t f m f d u c j u c j u u p b u b e e s f t t % u p j o p o f t i p u n p e f b o e j o s f q f b u n p e f y 8 i f o u i f " % t x f f q q j o t f m f d u c j u c j u b u b e e s f t t % j t t f u u p j o t j o h m f t x f f q n p e f u i f j o u f s s v q u s f r v f t u h f o f s b u j p o u j n j o h p g u i f " % d p o w f s t j p o j t u i f " % d p o w f s t j p o u j n f p g b m m q j o t y 5 i f t x f f q u j n f j t u i f " % d p o w f s t j p o u j n f p g b m m q j o t j o s f q f b u t x f f q n p e f b o e x i f o u i f " % t x f f q q j o t f m f d u c j u c j u b u b e e s f t t % j t t f u u p j o s f q f b u t x f f q n p e f 6 t b h f q s f d b v u j p o b h b j o t u % " d p o w f s u f s y % " q j o j t e f m f u f e y # j u p g u i f % " d p o u s p m s f h j t u f s b e e s f t t % $ j t s f t f s w f e c j u . v t u b m x b z t c f d m f b s u p y " e e s f t t % & n v t u b m x b z t c f d m f b s u p 6 t b h f q s f d b v u j p o b h b j o t u q s p h s b n n b c m f * 0 y 3 f t f s w f e c j u t p g u i f q p s u 1 j e j s f d u j p o s f h j t u f s b o e u i f q p s u 1 j s f h j t u f s 3 f h j t u f s # j u 1 % z 1 1 % z 1 1 % z 1 1 % z 1 1 % z 1 1 % z 1 1 % z 1 3 f h j t u f s # j u 1 % z 1 1 % z 1 1 % z 1 1 % z 1 1 % z 1 1 % z 1 1 % z 1 c z c ? c / p u f c z c / p u f c ? c / p u f c z c z c / p u f c / p u f c ? c / p u f c z c / p u f c / p u f / p u f } 5 i f t f b s f s f t f s w f e c j u t . v t u b m x b z t c f d m f b s u p y 3 f t f s w f e c j u t p g u i f q v m m v q d p o u s p m s f h j t u f s y # j u p g u i f q v m m v q d p o u s p m s f h j t u f s b e e s f t t ' % b o e c j u p g u i f q v m m v q d p o u s p m s f h j t u f s b e e s f t t ' & b s f s f t f s w f e c j u t . v t u b m x b z t c f d m f b s u p keep safety first in your circuit designs! notes regarding these materials mitsubishi electric corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. these materials are intended as a reference to assist our customers in the selection of the mitsubishi semiconductor product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to mitsubishi electric corporation or a third party. mitsubishi electric corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by mitsubishi electric corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. mitsubishi electric corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by mitsubishi electric corporation by various means, including the mitsubishi semiconductor home page (http:// www.mitsubishichips.com). when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. mitsubishi electric corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. mitsubishi electric corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. the prior written approval of mitsubishi electric corporation is necessary to reprint or reproduce in whole or in part these materials. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. please contact mitsubishi electric corporation or an authorized mitsubishi semicon ductor product distributor for further details on these materials or the products con tained therein. mitsubishi semiconductors M30221 group specification rev.d may. first edition 2001 editioned by committee of editing of mitsubishi semiconductor published by mitsubishi electric corp., kitaitami works this book, or parts thereof, may not be reproduced in any form without permission of mitsubishi electric corporation. ?2001 mitsubishi electric corporation |
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