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white electronic designs corporation ? (508) 366-5151 www.whiteedc.com
a ? -a 20 address inputs e 1 -e 4 chip enables w write enable g output enable dq ? -dq 31 common data input/output v cc power (+3.3v10%) v ss ground nc no connection 2048k x 32 bit cmos static random access memory access times: 20, 25, and 35ns individual byte selects fully static, no clocks ttl compatible i/o high density package 72 lead simm common data inputs and outputs single +3.3v (10%) supply operation the edi8g322048v is a high speed 64 megabit static ram module organized as 2048k words by 32 bits. this module is constructed from sixteen 1024k x 4 static rams in soj packages on an epoxy laminate (fr4) board. four chip enables (e ? -e 3 ) and the highest order address line are used to independently enable the four bytes as well as the low or high block of addressable memory space. read- ing or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. the edi8g322048v is offered in a 72 lead simm package, which enables 64 megabits of memory to be placed in less than 1.3 square inches of board space. all inputs and outputs are ttl compatible and operate from a single 3.3v supply. fully asynchronous circuitry requires no clocks or refreshing for operation and provides equal access and cycle times for ease of use. *pins pd1- pd4, are used to identify module memory den- sity in applications where alternate modules can be inter- changed.

february 2002 rev 0 eco # 14885 pd 1 pd 2 pd 3 pd 4 open v ss v ss open *
white electronic designs corporation westborough, ma (508) 366-5151
dq0-dq3 dq4-dq7 dq12-dq15 dq24-dq27 dq28-dq31 dq0-dq3 dq4-dq7 dq8-dq11 dq8-dq11 dq16-dq19 dq20-dq23 dq12-dq15 dq16-dq19 dq20-dq23 dq24-dq27 dq28-dq31 g\ a0-a19 w\ a20 e1\ e2\ a20 e3\ e4\ decoder decoder u1 1mx4 u3 1mx4 1mx4 u9 1mx4 u2 1mx4 u4 1mx4 1mx4 1mx4 u5 1mx4 1mx4 u7 1mx4 1mx4 u8 1mx4 1mx4 u6 1mx4 1mx4 u14 u16 u13 u15 u10 u12 u11 8g322048c

white electronic designs corporation (508) 366-5151 www.whiteedc.com

operating power supply current i cc 1 w, e = v il , i i / o = 0ma, min cycle 1750 ma standby (ttl) power supply current i cc 2 e v ih , v in v il or v in v ih 800 ma full standby power supply current i cc 3 e v cc -0.2v 160 ma cmos v in v cc -0.2v or v in 0.2v input leakage current i li v in = 0v to v cc ? ? 80 a output leakage current i lo v i / c = 0v to v cc ? ? 20 a output high voltage v oh i oh = -4.0ma 2.4 ? ? v output low voltage v ol i ol = 8.0ma ? ? 0.4 v

*stress greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. (note: for t ehqz , t ghqz and t wlqz , cl = 5pf) *typical: t a = 25c, v cc = 3.3v these parameters are sampled, not 100% tested. *each enable controls one byte (x8) within the x32 (doubleword) and one or more byte enables may be driven valid during this op eration.

supply voltage v cc 3.0 3.3 3.6 v supply voltage v ss 000v input high voltage v ih 2.2 ? v cc +0.3 v input low voltage v il -0.3 ? 0.8 v input pulse levels v ss to 3.0v input rise and fall times 3ns input and output timing levels 1.5v output load 1ttl, cl = 30pf address lines c i 120 pf data lines c d / q 20 pf chip enable line c c 120 pf write line c n 120 pf ! " # $%&$ h h h h h h disabled l l l l h l read double word l l l l l h write double word * * * * l h write one or more bytes in double word * * * * h l read one or more bytes in double word voltage on any pin relative to v ss -0.5v to 4.6v operating temperature t a (ambient) commercial 0c to +70c storage temperature, plastic -55c to +125c power dissipation 7.0 watts output current 20 ma
white electronic designs corporation westborough, ma (508) 366-5151

' note 1: parameter guaranteed, but not tested. !"# ($% ) * !* + %,
read cycle time t ava t rc 20 25 35 ns address access time t avqv t aa 20 25 35 ns chip enable access t elqv t acs 20 25 35 ns chip enable to output in low z 1 t elqx t clz 333 ns chip disable to output in high z 1 t ehqz t chz 15 17 20 ns output hold from address change t avqx t oh 333 ns output enable to output valid t glqv t oe 15 17 20 ns output enable to output in low z 1 t glqx t olz 000 ns output disable to output in high z 1 t ghqz t ohz 15 17 20 ns address 1 address 2 tavav data 1 data 2 tavqv tavqx a q tghqz telqv telqx e g q tehqz a tavav tglqv tglqx tavqv
white electronic designs corporation (508) 366-5151 www.whiteedc.com

write cycle time t avav t wc 20 25 35 ns chip enable to end of write t elwh t cw 15 20 25 ns t wleh t cw 15 20 25 ns address setup time t avwl t as 000ns t avel t as 000ns address valid to end of write t avwh t aw 15 20 25 ns t aveh t aw 15 20 25 ns write pulse width t wlwh t wp 15 20 25 ns t eleh t wp 15 20 25 ns write recovery time t whax t wr 000ns t ehax t wr 000ns data hold time t whdx t dh 300ns t ehdx t dh 300ns write to output in high z 1 t wlqz t whz 08012015ns data to write time t dvwh t dw 12 15 20 ns t dveh t dw 12 15 20 ns output active from end of write 1 t whqx t wlz 333ns note 1: parameter guaranteed, but not tested. "$" ' e a tavav telwh tavwh twlwh tavwl twhax w high z data valid twlqz twhqx tdvwh twhdx q d
white electronic designs corporation westborough, ma (508) 366-5151
$ $%"&"$ ! '("$ "$" &-( . /0 edi8g322048v20mmc 20 edi8g322048v25mmc 25 edi8g322048v35mmc 35 a tavel high z tavav teleh e taveh tehax w twleh tehdx tdveh q data valid d all dimensions are in inches

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