1 standard products ut28f256lvql radiation-hardened 32k x 8 prom data sheet june 2005 www.aeroflex.com/radhard features ? programmable, read-only, asynchronous, radiation- hardened, 32k x 8 memory - supported by industry standard programmer ? 65ns maximum address access time (-55 o c to +125 o c) ? three-state data bus ? low operating and standby current - operating: 50.0ma maximum @15.4mhz ? derating: 1.7ma/mhz - standby: 1.0ma maximum (post-rad) ? radiation-hardened process and design; total dose irradiation testing to mil-std-883, method 1019 - total dose: 100krad to 1megarad(si) - let th (0.25) ~ 40 mev-cm 2 /mg - sel immune > 110 mev-cm 2 /mg - saturated cross section cm 2 per bit, 2e-6 - 4e-4 errors/device-day, adams 90% geosynchronous heavy ion ? qml q & v compliant part - ac and dc testing at factory ? no post-program conditioning required ? packaging options: - 28-lead 50-mil center fl atpack (0.490 x 0.74) ? v dd : 3.0vto 3.6v ? standard microcircuit drawing 5962-01517 product description the ut28f256lvql amorphous silicon vialink tm prom is a high performance, asynchronous, radiation-hardened, 32k x 8 programmable memory device. the ut28f256lvql prom features fully asychronous operatio n requiring no external clocks or timing strobes. an advanced radiation-hardened twin-well cmos process technology is used to implement the ut28f256lvql. the combination of radiation-hardness, fast access time, and low power consumption make the ut28f256lql ideal for high speed systems designed for operation in radiation environments. decoder memory array sense amplifier programming control logic dq(7:0) a(14:0) ce pe oe figure 1. prom block diagram
2 device operation the ut28f256lvql has three control inputs: chip enable (ce ), program enable (pe ), and output enable (oe ); fifteen address inputs, a(14:0); and eight bidirectional data lines, dq(7:0). ce is the device enable input that controls chip selection, active, and st andby modes. asserting ce causes i dd to rise to its active value and decodes the fifteen address inputs to select one of 32,768 words in the memory. pe controls program and read op erations. during a read cycle, oe must be asserted to enable the outputs. pin names table 1. device operation truth table 1 notes: 1. ?x? is defined as a ?don?t care? condition. 2. device active; outputs disabled. absolute maximum ratings 1 (referenced to v ss ) notes: 1. stresses outside the listed absolute maxi mum ratings may cause permanent damage to the device. this is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indi cated in the operational sections of this specification is not r ecommended. exposure to absolute maximum rating conditions for ex tended periods may affect device reliability. 2. test per mil-std-883, method 1012, infinite heat sink. a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 dq0 dq1 dq2 v ss v dd pe a13 a8 a9 a11 oe a10 ce dq7 dq6 dq5 dq4 dq3 pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 a(14:0) address ce chip enable oe output enable pe program enable dq(7:0) data input/data output oe pe ce i/o mode mode x 1 1 three-state standby 0 1 0 data out read 1 0 0 data in program 1 1 0 three-state read 2 symbol parameter limits units v dd dc supply voltage -0.3 to 6.0 v v i/o voltage on any pin -0.5 to (v dd + 0.5) v t stg storage temperature -65 to +150 c p d maximum power dissipation 1.5 w t j maximum junction temperature +175 c jc thermal resistance, junction-to-case 2 3.3 c/w i i dc input current 10 ma
3 recommended operating conditions dc electrical characteristics (pre/post-radiation)* (v dd = 3.0v to 3.6v; -55 c < t c < +125 c) notes: * post-radiation perform ance guaranteed at 25 c per mil-std-883 method 1019 at 1e6 rad(si). 1. measured only for in itial qualification, and after process or design changes that could affect input/output capacitance. 2. supplied as a design limit bu t not guaranteed or tested. 3. not more than one output may be shorted at a time for maximum duration of one second. 4. 1.7ma/mhz. symbol parameter limits units v dd positive supply voltage 3.0 to 3.6 v t c case temperature range -55 to +125 c v in dc input voltage 0 to v dd v symbol parameter condition minimum maximum unit v ih high-level input voltage 0.7v dd v v il low-level input voltage 0.25v dd v v ol1 low-level output voltage i ol = 100 a, v dd = 3.0v v ss + 0.05 v v ol2 low-level output voltage i ol = 1.0ma, v dd = 3.0v v ss + 0.10 v v oh1 high-level output voltage i oh = -100 a, v dd = 3.0v v dd -0.15 v v oh2 high-level output voltage i oh = -1.0ma, v dd = 3.0v v dd -0.3 v c in 1 input capacitance, all inputs except pe input capacitance pe ? = 1mhz, v dd = 3.3v v in = 0v 15 20 pf c io 1 bidirectional i/o capacitance ? = 1mhz, v dd = 3.3v v out = 0v 15 pf i in input leakage current v in = 0v to v dd , all pins except pe v in = v dd , pe only -3 3 35 a a i oz three-state output leakage current v o = 0v to v dd v dd = 3.6v oe = 3.6v -20 20 a i os 2,3 short-circuit output current v dd = 3.6v, v o = v dd v dd = 3.6v, v o = 0v -100 100 ma ma i dd1 (op) 4 supply current operating @15.4mhz (65ns product) cmos input levels (i out = 0), v il = 0.2v v dd , pe = 3.6v, v ih = 3.0v 50.0 ma i dd2 (sb) post-rad supply current standby cmos input levels v il = v ss +0.25v ce = v dd - 0.25 v ih = v dd - 0.25v 1.0 ma
4 read cycle a combination of pe greater than v ih (min), and ce less than v il (max) defines a read cycle. read access time is measured from the latter of device enable, output enable, or valid address to valid data output. an address access read is initiate d by a change in address inputs while the chip is enabled with oe asserted and pe deasserted. valid data appears on data outp ut, dq(7:0), after the specified t avqv is satisfied. outputs remain active throughout the entire cycle. as long as device enable and output enable are active, the address inputs may change at a rate equal to the minimum read cycle time. the chip enable-controlled access is initiated by ce going active while oe remains asserted, pe remains deasserted, and the addresses remain stable for the entire cycle. after the specified t elqv is satisfied, the eight-bit word addressed by a(14:0) appears at the data outputs dq(7:0). output enable-controlled access is initiated by oe going active while ce is asserted, pe is deasserted, and the addresses are stable. read access time is t glqv unless t avqv or t elqv have not been satisfied. ac characteristics read cyc le (post-radiation)* (v dd = 3.0v to 3.6v; -55 c < t c < +125 c) notes: * post-radiation performance guaranteed at 25 c per mil-std-883 method 1019 at 1e6 rads(si). 1. functional test. 2. three-state is defined as a 200mv change from steady-state output voltage. symbol parameter 28f256lv-65 min max unit t avav 1 read cycle time 65 ns t avqv read access time 65 ns t axqx 2 output hold time 0 ns t glqx 2 oe -controlled output enable time 0 ns t glqv oe -controlled access time 35 ns t ghqz oe -controlled output three-state time 35 ns t elqx 2 ce -controlled output enable time 0 ns t elqv ce -controlled access time 65 ns t ehqz ce -controlled output three-state time 35 ns
5 radiation hardness the ut28f256lvql prom incorp orates special design and layout features which allow oper ation in high-level radiation environments. aeroflex colorado springs has developed special low-temperature processing tech niques designed to enhance the total-dose radiation hardness of bo th the gate oxide and the field oxide while maintaining the circuit density and reliability. for transient radiation hardness and latchup immunity, aeroflex colorado springs builds all radiation-hardened products on epitaxial wafers using an advan ced twin-tub cmos process. in addition, aeroflex colorado spri ngs pays special attention to power and ground distribution during the design phase, minimizing dose-rate upset caused by rail collapse. radiation hardness design specifications 1 note: 1. the prom will not latchup during radiation ex posure under recommended operating conditions. figure 2. prom read cycle t avav t avqv t elqv t glqv t avqv t axqx t ehqz t ghqz a(14:0) ce oe dq(7:0) t glqx t elqx total dose 1e6 rad(si) latchup let threshold >110 mev-cm 2 /mg memory cell let threshold >100 mev-cm 2 /mg logic seu onset let >40 mev-cm 2 /mg seu cross section 7.6e-12 cm 2 /bit error rate - geosynchronous orbit, adams 90% worst case environment 2.5e-17 errors/bit day
6 notes: 1. 50pf including scope probe and test socket. 2. measurement of data output o ccurs at the low to high or high to low transition mid-point . 90% figure 3. ac test loads and input waveforms input pulses 10% < 5ns < 5ns 0v vdd 200 ohms v ref =1.40v 50pf 90% 10%
7 0.015 0.008 0.015 0.008 pin no. 1 id. 6 26 places 0.050 bsc e e1 0.550 max -b- 7 s1 (4) places 0.000 min. 7 -d- -c- a 0.115 0.045 0.045 0.026 l 0.370 0.250 e2 0.180 min e3 0.030 min e 0.520 0.460 -h- c 0.009 0.004 0.040 0.022 0.015 28 places -a- h a-b d 5 s s 0.010 m h a-b d 5 s s m 0.036 top view end view b k k q figure 5. 28-lead 50-mil center flatpack (0.490 x 0.74) notes: 1. all exposed metalized areas to be plated per mil-prf-38535. 2. the lid is connected to v ss . 3. lead finishes are in accordance with mil-prf-38535. 4. dimension letters refer to mil-std-1835. 5. lead position and copl anarity are not measured. 6. id mark symbol is vendor option. 7. with solder, incr ease maximum by 0.003. 8. total weight is approximately 2.4 grams. d 0.740 max
8 ordering information ut28f256lvql prom: smd lead finish: (a) = solder (c) = gold (x) = optional case outline: (x) = 28-lead flatpack class designator: (q) = class q (v) = class v device type (02) = 65ns access time, cmos compatible inputs and cmos compatible outputs (03) = 65ns access time, cmos compatible inputs and cmos compatible outputs extended industrial temp (-40 c c to +125 o c) drawing number: 01517 total dose: (f) = 3e5 rads(si) (g) = 5e5 rads(si) (h) = 1e6 rads(si) (r) = 1e5 rads(si) federal stock class designator: no options 5962 * 01517 * * * * notes: 1. lead finish (a, c, or x) must be specified. 2. if an ?x? is specified when ordering, part marking will match the lead finish and will be either ?a? (solder) or ?c? (gold). 3. total dose radiation must be specified when ordering. qml q and qml v not available without radiation hardening. 4. device type 03 available with total dose of 1e5 rads(si) or 3e5 rads(si).
9 ut28f256lv prom ut **** * ** - * * * * * * total dose: ( ) = none lead finish: (a) = solder (c) = gold (x) = optional screening: (c) = mil temp (p) = prototype (w) = extended industrial temp (-40 c c to +125 o c) package type: (u) = 28-lead flatpack access time: (65) = 65ns access time device type modifier: (c) = cmos compatible inpu ts and cmos compatible outputs device type: (28f256lvql) = 3.3v, 32kx8 one time programmable prom notes: 1. lead finish (a,c, or x) must be specified. 2. if an ?x? is specified when ordering, th en the part marking will match the lead fini sh and will be either ?a? (solder) or ?c? (gold). 3. military temperature range flow per ae roflex colorado springs manufacturing flows document. radiation characteristics are nei ther tested nor guaranteed and may not be specified. 4. prototype flow per aeroflex colorado springs manufacturing flow s document. devices have prototype assembly and are tested at 25 c only. radiation characteristics are neither tested nor guaranteed and may not be specified. 5. lead finish is gold only.
10 colorado toll free: 800-645-8862 fax: 719-594-8468 se and mid-atlantic tel: 321-951-4164 fax: 321-951-4254 international tel: 805-778-9229 fax: 805-778-1980 west coast tel: 949-362-2260 fax: 949-362-2266 northeast tel: 603-888-3975 fax: 603-888-4585 central tel: 719-594-8017 fax: 719-594-8468 www.aeroflex.com info-ams@aeroflex.com our passion for performance is defined by three attributes represented by these three icons: solution-minded, performance-driven and customer-focused aeroflex colorado springs, inc. reserves the right to make changes to any products and services herein at any time without notice. consult aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. aeroflex does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by aeroflex; nor does the purchase, lease, or use of a pr oduct or service from aeroflex convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of aeroflex or of third parties.
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