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1 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com product description key features measured performance 19 to 38 ghz doubler ? rf output frequency range: 38 ? 38.5 ghz ? input frequency range: 19 ? 19.25 ghz ? 14 dbm saturated output power ? 8 db nominal conversion gain ? 30 db input frequency isolation at output ? input return loss > 15 db ? output return loss > 8 db ? bias: vd = 3.5 v, idq = 65ma, vg1 = -0.4 v, vg2 = +0.2 v typical ? technology: 0.13 um phemt with front-side cu/sn pillars ? chip dimensions: 1.16 x 2.85 x 0.38 mm the triquint TGC4703-FC is a flip-chip frequency doubler. it combines an input and output buffer amplifier and a frequency doubler for use in automotive radar. the TGC4703-FC is designed using triquint?s proven 0.13 m phemt process and front-side cu / sn pillar technology for simplified assembly and low interconnect inductance. die reliability is enhanced by using triquint?s bcb polymeric passivation process. the TGC4703-FC typically provides 14 dbm saturated output power with 8 db conversion gain. lead-free and rohs compliant. bias conditions: vd = 3.5 v, vg1 = -0.4 v, vg2 = +0 .2 v, idq = 65 ma typical primary applications ? automotive radar ? e-band communication 6 7 8 9 10 11 12 13 14 15 16 -6 -4 -2 0 2 4 6 8 10 12 input power (dbm) output power at 2 x input freq (dbm) input freq: 19.25 ghz 0 10 20 30 40 50 14 19 24 29 34 39 44 49 frequency (ghz) isolation (db) 0 5 10 15 20 25 output power (dbm) fundamental 2x fundamental output @ fund freq - +10 dbm input @ fund freq output @ 2x fund freq ( fund freq:+10 dbm at input)
2 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com table ii recommended operating conditions table i absolute maximum ratings 1 / symbol parameter value notes vd-vg drain to gate voltage 5.5 v vd drain voltage 4.0 v vg gate voltage range -1 to +0.45 v id drain current 170 ma ig gate current range -0.5 to +3.0 ma pin input continuous wave power 13 dbm 1 / these ratings represent the maximum operable val ues for this device. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device and / or affect device lifetime. these are stress ratings only, an d functional operation of the device at these conditions is not implied. symbol parameter 1 / value vd drain voltage 3.5 v idq drain current, no rf signal at input 65 ma id drain current, rf signal at input 135 ma vg1 multiplier stage gate voltage -0.4 v vg2a, vg2b amplifier stages gate voltage +0.2 v 1 / see electrical schematic diagram for bias instru ctions.
3 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com table iii rf characterization table bias: vd = 3.5 v, idq = 65 ma, vg1 = -0.4 v, vg2 = +0.2 v typical symbol parameter test conditions minimum nominal units irl input return loss fin = 19.00 ?19.25 ghz 15 db orl output return loss fin = 38.00 ? 38.50 ghz 8 db pout output power (rfin = 0 dbm) fin = 19.25 ghz fout = 38.5 ghz 8 10.5 dbm pout output power (rfin = 6 dbm) fin = 19.25 ghz fout = 38.5 ghz 12.5 13.5 dbm isol isolation fin = 19.00 ?19.25 ghz fout = 19.00 ?19.25 ghz 30 db
4 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com table iv power dissipation and thermal properties median lifetime (tm) vs channel temperature 1 / for a median life of 2.4e+7 hours, power dissipati on is limited to pd(max) = (150 c ? tbase c)/ jc. 2 / channel operating temperature will directly affect the device median time to failure (mttf). for maximum life, it is recommended that channel temper atures be maintained at the lowest possible levels. 3 / for this flip-chip die, the baseplate is a plane between the cu/sn pillars and the test board . for the TGC4703-FC, the critical pillars for thermal power dissipation are 24 thru 28 and 30. (see mechanical drawing.) parameter test conditions value notes maximum power dissipation tbaseplate = 126.5 c pd = 0.560 w tchannel = 150 c tm = 2.4e+7 hrs 1 / 2 / 3 / thermal resistance, jc vd = 3.5 v vg1 = -0.4 v vg2 = +0.2 v id = 0.135 a pd = 0.473 w tbaseplate = 85 c jc = 42 (c/w) tchannel = 104 c tm = 6.6e+9 hrs 3 / mounting temperature refer to solder reflow profiles (pp 11) storage temperature -65 to 150 c 1.e+04 1.e+05 1.e+06 1.e+07 1.e+08 1.e+09 1.e+10 1.e+11 1.e+12 1.e+13 25 50 75 100 125 150 175 200 channel temperature (c) median lifetime (hours) fet11
5 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com measured data on flipped die on carrier board 6 7 8 9 10 11 12 13 14 15 16 -6 -4 -2 0 2 4 6 8 10 12 input power (dbm) output power at 2 x input freq (dbm) input freq: 19.25 ghz 0 10 20 30 40 50 14 16 18 20 22 24 frequency (ghz) isolation (db) output @ fund freq - +10 dbm input @ fund freq bias conditions: vd = 3.5 v, idq = 65 ma, vg1 = -0. 4 v vg2 = +0.2 v typical
6 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com 0 5 10 15 20 25 29 34 39 44 49 frequency (ghz) output power (dbm) output @ 2x fund freq ( fund freq:+10 dbm at input) 0 1 2 3 4 5 6 7 8 9 10 -15 -10 -5 0 5 10 15 input power (dbm) conversion gain (db) input freq: 19.25 ghz measured data on flipped die on carrier board bias conditions: vd = 3.5 v, idq = 65 ma, vg1 = -0. 4 v vg2 = +0.2 v typical
7 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com -25 -20 -15 -10 -5 0 0 5 10 15 20 25 30 35 40 45 50 frequency (ghz) irl, orl (db) irl orl measured data on flipped die on carrier board bias conditions: vd = 3.5 v, idq = 65 ma, vg1 = -0. 4 v vg2 = +0.2 v typical
8 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com electrical schematic bias procedures bias-up procedure bias-down procedure vg1, vg2 set to -0.4 v turn off rf signal to input vd set to +3.5 v reduce vg1, vg2 to -0.4 v. ensure id ~ 0 ma adjust vg2 only more positive until id is 65 ma (vg ~ +0.2 v) turn vd to 0 v apply rf signal to input id will be ~135 ma rf in (22) rf out (11) TGC4703-FC cpw gnd (23) gnd (6,8,15, 16,20,30) (26 & 30) (24 & 27) (25 & 28) vd1 100 pf 100 pf vg2 vg1 100 pf (3) (7) (9) (19) (17) (13) cpw gnd (21) cpw gnd (12) cpw gnd (10)
9 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com gaas mmic devices are susceptible to damage from el ectrostatic discharge. proper precautions should be observed during handling, assembly and test. mechanical drawing drawing is for chip face-up units: millimeters thickness: 0.380 die x,y size tolerance: +/- 0.050 chip edge to pillar dimensions are shown to center of pillar pillar #22 rf in 0.075 ? pillar #11 rf out 0.075 ? pillar #10, 12, 21, 23 rf cpw ground 0.075 ? pillar #17 vg1 0.075 ? pillar #19 vg2a 0.075 ? pillar #13 vg2b 0.075 ? pillar #7 vd1 0.075 ? pillar #3 vd2a 0.075 ? pillar #9 vd2b 0.075 ? pillar #6, 8, 15, 16, 20, 24- 28, 30 dc ground 0.075 ? pillar #1, 2, 4, 5, 14, 18, 29 mech. support only 0.075 ? 1.160 0.533 21 20 19 18 17 16 15 14 13 4 27 24 22 23 2 1 3 30 26 25 28 29 6 5 7 10 12 11 8 9 1.834 0.582 0.378 0.392 0.834 0.609 0.723 0.384 0.314 0.524 0.818 1.043 1.293 1.543 1.854 2.148 2.595 2.731 0.119 2.850 0.000 0.196 0.422 0.647 1.032 0.128 0.326 0.531 0.000 0.314 0.119 0.657 0.818 1.043 1.293 1.454 1.543 1.854 2.140 2.248 2.595 2.731
10 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com TGC4703-FC die (flip-chip bonded) vd vg2 vg1 100 pf 100 pf 100 pf gnd gnd gnd gnd rf in rf out gaas mmic devices are susceptible to damage from el ectrostatic discharge. proper precautions should be observed during handling, assembly and test. recommended assembly diagram die is flip-chip soldered to a 15 mil thick alumina test substrate TGC4703-FC data represented in this datasheet was taken using co- planar waveguide (cpw) transition on the substrate and ground-signal- ground probes TGC4703-FC die
11 TGC4703-FC november 2009 ? rev a triquint semiconductor: www. triquint.com (972)994 -8465 fax (972)994-8504 info-mmw@tqs.com gaas mmic devices are susceptible to damage from el ectrostatic discharge. proper precautions should be observed during handling, assembly and test. assembly notes ordering information part package style TGC4703-FC gaas mmic die process sn reflow ramp-up rate 3 0 c/sec flux activation time and temperature 60 ? 120 sec @ 1 40 ? 160 0 c time above melting point (245 0 c) 60 ? 150 sec max peak temperature 300 0 c time within 5 0 c of peak temperature 10 ? 20 sec ramp-down rate 4 ? 6 0 c/sec typical reflow profiles for triquint cu / sn pillars component placement and die attach assembly notes: ? vacuum pencils and/or vacuum collets are the prefe rred method of pick up. ? air bridges must be avoided during placement. ? cu pillars on die are 65 um tall with a 22 um tall sn solder cap. ? recommended board metallization is evaporated tiw f ollowed by nickel/gold at pillar attach interface. ni is the adhesion layer for the solder and the gold keeps the ni from oxidizing . the au should be kept to a minimum to avoid embri ttlement; suggested au / sn mass ratio must not exceed 8%. ? au metallization is not recommended on traces due to solder wicking and consumption concerns. if au traces are used, a physical solder barrier must be applied or designed into the pad area of the board. the barrier must be suffici ent to keep the solder from undercutting the barrier. reflow process assembly notes: ? minimum alloying temperatures 245 0 c. ? repeating reflow cycles is not recommended due to sn consumption on the first reflow cycle. ? an alloy station or conveyor furnace with an inert atmosphere such as n2 should be used. ? dip copper pillars in ?no-clean flip chip? flux pri or to solder attach. suggest using a high temperatu re flux. avoid exposing entire die to flux. ? if screen printing flux, use small apertures and m inimize volume of flux applied. ? coefficient of thermal expansion matching between the mmic and the substrate/board is critical for lo ng-term reliability. ? devices must be stored in a dry nitrogen atmospher e. ? suggested reflow will depend on board material and density.

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