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mic5163 dual regulator controller for ddr3 gddr3/4/5 memory termination micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? te l +1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micre l.com april 2009 m9999-042209-a general description the mic5163 is a dual regulator controller designed specifically for low voltage memory termination applications such as ddr3 and gddr3/4/5. the mic5163 offers a simple, low cost jedec compliant solution for terminating high-speed, low-voltage digital buses. the mic5163 controls two external n-channel mosfets to form two separate regulators. it operates by switching between either the high-side mosfet or the low-side mosfet, depending on whether the current is being sourced to the load or being sinked by the regulator. designed to provide a universal solution for memory termination regardless of input voltage, output voltage, or load current; the desired mic5163 output voltage can be externally programmed by forcing the reference voltage. the mic5163 operates from an input voltage as low as 0.75v up to 6v, with a second bias supply input required for operation. the mic5163 is available in a tiny msop-10 package with an operating junction temperature range of ?40c to +125c. data sheets and support documentation can be found on micrel?s web site at: www.micrel.com. features ? 0.75v to 6v input supply voltage ? memory termination for: ddr3, gddr3/4/5 ? tracking programmable output ? logic controlled enable input ? wide bandwidth ? minimal external components required ? tiny msop-10 package ? ?40c < t j < +125c applications ? desktop computers ? servers ? notebook computers ? workstations ____________________________________________________________________________________________________________ typical application 100f 6.3v en 120pf v cc = 5v v ddq = 1.2v u1 mic5163 vddq vcc hsd vref en lsd fb comp 100f 6.3v v tt = 0.6v gnd gnd 1f 10v sud50n02-06p 220pf gnd sud50n02-06p 100f 6.3v 100f 6.3v mic5163 as a ddr3 memory terminati on device for 3.5a application
micrel, inc. mic5163 april 2009 2 m9999-042209-a ordering information part number temperature range package lead finish MIC5163YMM ?40 to +125c 10-pin msop pb-free note: msop is a green rohs compliant package. lead fi nish is nipdau. mold compound is halogen free. pin configuration gnd fb 6 5 1 vcc en vdd q vref 10 nc hd ld comp 9 8 7 2 3 4 10-pin msop (mm) pin description pin number pin name pin function 1 vcc bias supply (input): apply a voltage between +3v and +6v to this input for internal bias to the controller 2 en enable (input): cmos compatible input. logic high = enable, logic low = shutdown 3 vddq input supply voltage 4 vref reference output equal to half of vddq 5 gnd ground 6 fb feedback input to the internal error amplifier 7 comp compensation (output): connect a capacitor to feedback pin for compensation of the internal control loop 8 ld low-side drive: connects to the gate of the external low-side mosfet 9 hd high-side drive: connects to the gate of the external high-side mosfet 10 nc not internally connected
micrel, inc. mic5163 april 2009 3 m9999-042209-a absolute maximum ratings (1) supply voltage (v cc )....................................... ?0.3v to +7v supply voltage (v ddq ) ..................................... ?0.3v to +7v enable input voltage (v en ).............................. ?0.3v to +7v lead temperature (solde ring, 10 se c.)...................... 265c storage temperature (t s ).........................?65c to +150c eds rating (3) ................................................................ +2kv operating ratings (2) supply voltage (v cc ).......................................... +3v to +6v supply voltage (v ddq ) ................................... +0.75v to +6v enable input voltage (v en )..................................... 0v to v in junction temperature (t j ) ........................ ?40c to +125c junction thermal resistance msop ( ja ) ...................................................130. 5c/w msop ( jc ) .....................................................42.6c/w electrical characteristics (4) v ddq = 1.35v; t a = 25c, bold values indicate ?40c t j +125c, unless noted. parameter condition min typ max units v ref voltage accuracy -1% 0.5v ddq +1% v v tt voltage accuracy ( note 5 ) sourcing; 100ma to 3a -5 -10 0.4 +5 +10 mv mv sinking; -100ma to -3a -5 -10 0.4 +5 +10 mv mv supply current (i ddq ) v en = 1.2v (controller on) no load 35 70 100 a a supply current (i cc ) no load 10.5 20 25 ma ma i cc shutdown current ( note 6 ) v en = 0.2v (controller off) 45 90 na start-up time ( note 7 ) v cc = 5v external bias; v en = v cc 8 15 30 s s enable input regulator enable 1.2 v enable input threshold regulator shutdown 0.3 v enable hysteresis 35 mv v il < 0.2v (controller shutdown) 0.011 a enable pin input current v ih > 1.2v (controller enable) 5.75 a driver high side mosfet fully on 4.8 4.97 v high side gate drive voltage high side mosfet fully off 0.03 0.2 v low side mosfet fully on 4.8 4.97 v low side gate drive voltage low side mosfet fully off 0.03 0.2 notes: 1. exceeding the absolute maxi mum rating may damage the device. 2. the device is not guaranteed to function outside its operating rating. 3. devices are esd sensitive. handling precautions recommended. human body model, 1.5k ? in series with 100pf. 4. specification for packaged product only. 5. the v tt voltage accuracy is measured as a delta voltage from the reference output (v tt - v ref ). 6. shutdown current is measured only on the v cc pin. the v ddq pin will always draw a minimum amount of current when voltage is applied.
micrel, inc. mic5163 april 2009 4 m9999-042209-a 7. start-up time is defined as the amount of time from en = v cc to hsd = 90% of v cc test circuit c out = 3*560f en 470pf 10k v ddq = 0.75-2.5v mic5163 vddq hd comp en vref gnd sud50n02-06p v tt = 0.5*v ddq 10f 120pf vcc ld fb 220f v cc = 5v figure 1. test circuit
micrel, inc. mic5163 april 2009 5 m9999-042209-a typical characteristics 0 20 40 60 80 100 120 140 160 180 200 -40 -20 0 20 40 60 80 100 120 iddq current (a) temperature (c) iddq current vs. temperature v in =0.75v v in =1.35v v in =2.5v v in =6v 0 20 40 60 80 100 120 140 160 180 200 0123456 iddq current (a) input voltage (v) iddq current vs. input voltage room temp 125c -40c 9.5 10 10.5 11 -40 -20 0 20 40 60 80 100 120 icc current (a) temperature (c) icc current vs. temperature v in =0.75v v in =1.35v v in =2.5v v in =6v 9.5 10 10.5 11 0123456 icc current (a) input voltage (v) icc current vs. input voltage room temp 125c -40c 0 0.05 0.1 0.15 0.2 0.25 0.3 -40 -20 0 20 40 60 80 100 120 icc shutdown current (a) temperature (c) icc shutdown current vs. temperature v in =0.75v v in =1.35v v in =2.5v v in =6v 0 0.05 0.1 0.15 0.2 0.25 0.3 0123456 icc shutdown current (a) input voltage (v) icc shutdown current vs. input voltage room temp 125c -40c 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 -40 -20 0 20 40 60 80 100 120 hd prop delay (s) temperature (c) hd prop delay vs. temperature v in =0.75v v in =1.35v v in =2.5v v in =6v 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 0123456 hd prop delay (s) input voltage (v) hd prop delay vs. input voltage room temp 125c -40c 0.5 -40 -20 0 20 40 60 80 100 120 en th on (v) temperature (c) en th on vs. temperature v in =0.75v v in =1.35v v in =2.5v v in =6v 0.6 0.7 0.8 0.9 0.4 0.5 0.6 0.7 0.8 0.9 0123456 en th on (v) input voltage (v) en th on vs. input voltage room temp 125c -40c 0 0.0005 0.001 0.0015 0.002 0.0025 -40 -20 0 20 40 60 80 100 120 vtt-vref (v) temperature (c) vtt-vref vs. temperature 0.1a 3a -0.1a -3a -0.005 -0.004 -0.003 -0.002 -0.001 0 0.001 0.002 0.003 0.004 0.005 -3-2-10123 vtt-vref (v) load (a) vtt-vref vs. load @25deg v in =0.75v v in =1.35v v in =2.5v v in =6v
micrel, inc. mic5163 april 2009 6 m9999-042209-a functional characteristics
micrel, inc. mic5163 april 2009 7 m9999-042209-a functional characteristics (continued)
micrel, inc. mic5163 april 2009 8 m9999-042209-a functional diagram vc c vdd q v ref en gnd fb comp ld hd -a a shutdown r1 r2 figure 2. mic5163 block diagram
micrel, inc. mic5163 april 2009 9 m9999-042209-a functional description the mic5163 is a high performance linear controller, utilizing scalable n-channel mosfets to provide jedec compliant bus termination. termination is achieved by dividing down the v ddq voltage by a half, providing the reference (v ref ) voltage. the mic5163 controls two external n-channel mosfets to form two separate regulators. it operates by switching between either the high-side mosfet or the low-side mosfet, depending on whether the current is being sourced to the load or being sinked by the regulator. v ddq the v ddq pin on the mic5163 provides the source current through the high side n-channel and the reference voltage to the device. the mic5163 can operate at v ddq input voltages as low as 0.75v. a bypass capacitance will increase performance by improving the source impedance at higher frequencies. v tt v tt is the actual termination point. v tt is regulated to v ref . due to high speed signaling, the load current seen by v tt is constantly changing. to maintain adequate large signal transient resp onse, oscons and ceramics are recommended on v tt . the oscon capacitors provide bulk charge storage while the smaller ceramic capacitors provide current during t he fast edges of the bus transition. v ref two resistors dividing down the v ddq voltage provide v ref . the resistors are valued at around 17k ? . a minimum capacitor value of 120pf from v ref to ground is mandatory. v cc v cc supplies the internal circuitry of the mic5163 and provides the drive voltage to enhance the external n- channel mosfets. a small 1 f capacitor is recommended for bypassing the v cc pin. feedback and compensation the feedback provides the path for the error amplifier to regulate the v tt . an external resistor must be placed between the feedback and v tt . feedback resistor values should not exceed 10k ? and compensation capacitors should not be less than 40pf. enable the mic5163 features an active high enable input. in the off mode state, leakage currents are reduced to microamperes. the enable input has thresholds compatible with ttl/cmos for simple logic interfacing. the enable pin can be tied directly to v ddq or v cc for functionality.
micrel, inc. mic5163 april 2009 10 m9999-042209-a application information synchronous dynamic random access memory (sdram) has continually evolv ed over the years to keep up with ever-increasing computing needs. the latest addition to sdram technology is ddr3 sdram. ddr3 sdram is the third gener ation of the ddr sdram family and offers improved power savings, higher data bandwidth and enhanced signal quality with multiple on- die termination (odt) selection. in ddr3 sdram the values of the odt are based on the value of an external resistor. in addition to using this external resistor for setting the odt value, it is also used for calibrating the odt value so that it maintains its resistance value to within a 10% tolerance. to improve signal integrity and support higher frequency operations, the jedec committee defined a fly-by termination scheme used with the clocks, the command bus and address bus signals. the fly-by topology reduces simultaneous switching noise (ssn) by deliberately causing flight-time skew between the data and strobes at every dram as the clock, address and command signals traverse the dimm. the ddr3 sdram uses a programmable impedance output buffer. currently, there are two drive strength settings, 34 ? and 40 ? . the 40 ? drive strength setting is currently a reserved specification defined by jedec, but available on the ddr3 sdram. fpga ddr3 dimm ddr3 component ddr3 dimm ddr3 component fpga 3? trace length 3? trace length driver driver driver driver receiver receiver receiver receiver r s r s v ref = 0.75v v ref = 0.75v v ref = 0.75v v ref = 0.75v figure 3. dynamic oct between stratix iii/iv fpga devices the mic5163 is a high performance linear controller that utilizes scalable n-channel mosfets to provide jedec compliant bus termination. termination is achieved by dividing down the v ddq voltage by half to provide the reference (v ref ) voltage. an internal error amplifier compares the termination voltage (v tt ) and v ref , controlling two external n-channel mosfets to sink and/or source current to maintain a termination voltage (v tt ) equal to v ref . the n-channels receive their enhancement voltage from a separate v cc pin on the device. although the general discussion is focused on ddr3, the mic5163 is also capable of providing bus terminations for ddr, ddr2 and gddr3/4/5. v ddq the v ddq pin on the mic5163 provides the source current through the high side n-channel and the reference voltage to the device. the mic5163 can operate at v ddq voltages as low as 0.75v. due to the possibility of large transien t currents being sourced from this line, significant bypa ss capacitance will increase performance by improving the source impedance at higher frequencies. since the reference is simply v ddq /2, perturbations on the v ddq will also appear at half the amplitude on the reference. for this reason, low esr capacitors such as ceramics or oscons are recommended on v ddq . v tt v tt is the actual termination point. v tt is regulated to v ref . due to high speed signaling, the load current seen by v tt is constantly changing. to maintain adequate large signal transient resp onse, oscons and ceramics are recommended on v tt . the proper combination and placement of the oscon and ceramic capacitors is important to reduce both esr and esl such that high- current high-speed transients do not exceed the dynamic voltage tolerance requirement of v tt . the oscon capacitors provide bulk charge storage while the smaller ceramic capacitors provide cu rrent during the fast edges of the bus transition. using several smaller ceramic capacitors distributed near the termination resistors is typically important to reduce the effects of pcb trace inductance. v ref two resistors dividing down the v ddq voltage provide v ref (figure 5). the resistors are valued at around 17k ? . a minimum capacitor value of 120pf from v ref to ground is required to remove high frequency signals reflected from the source. large capacitance values (>1500pf) should be avoided. values greater than 1500pf slow down v ref and detract from the reference voltage?s ability to track v ddq during high speed load transients. 100f 6.3v en 120pf v cc = 5v v ddq = 1.2v u1 mic5163 vddq vcc hsd vref en lsd fb comp 100f 6.3v v tt = 0.6v gnd gnd 1f 10v 220pf gnd sud50n02-06p 100f 6.3v 100f 6.3v figure 4. mic5163 as a ddr3 memory termination device for 7a application
micrel, inc. mic5163 april 2009 11 m9999-042209-a vddq gnd vref 120pf figure 5. v ddq divided down to provide v ref v ref can also be manipulated for different applications. a separate voltage source can be used to externally set the reference point, bypassing the divider network. also, external resistors can be added from v ref -to-ground or v ref -to-v ddq to shift the reference point up or down. v cc v cc supplies the internal circuitry of the mic5163 and provides the drive voltage to enhance the external n- channel mosfets. a small 1 f capacitor is recommended for bypassing the v cc pin. the minimum v cc voltage should be a gate-source voltage above v tt without exceeding 6v. for example, on an ddr3 compliant terminator, v ddq equals 1.5v and v tt equals 0.75v. if the n-channel mosfet selected requires a gate source voltage of 2.5v, v cc should be a minimum of 3.25v feedback and compensation the feedback provides the path for the error amplifier to regulate v tt . an external resistor must be placed between the feedback and v tt . this allows the error amplifier to be correctly externally compensated. for most applications, a 510 ? resistor is recommended. the comp pin on the mic5163 is the output of the internal error amplifier. by placing a capacitor and resistor between the comp pin and the feedback pin, this coupled with the feedback resistor, places an external pole and zero on the error amplifier. with a 510 ? feedback resistor, a minimum 220pf capacitor is recommended for a 3.5a peak termination circuit. an increase in the load will require additional n-channel mosfets and/or increase in output capacitance may require feedback and/or compensation capacitor values to be changed to maintain stability. feedback resistor values should not exceed 10k ? and compensation capacitors should not be less than 40pf. enable the mic5163 features an active high enable input. in the off mode state, leakage currents are reduced to microamperes. the enable input has thresholds compatible with ttl/cmos for simple logic interfacing. the enable pin can be tied directly to v ddq or v cc for functionality. do not float the enable pin. floating this pin causes the enable to be in an indeterminate state. input capacitance although the mic5163 does not require an input capacitor for stability, using one greatly improves device performance. due to the high-speed nature of the mic5163, low esr capacitors such as oscon and ceramics are recommended for bypassing the input. the recommended value of capacitance will depend greatly on the proximity to the bulk capacitance. although a 10 f ceramic capacitor will suffice for most applications, input capacitance may need to be increased in cases where the termination circuit is greater than 1-inch away from the bulk capacitance. output capacitance large, low esr capacitors are recommended for the output (v tt ) of the mic5163. although low esr capacitors are not required for stability, they are recommended to reduce the effects of high-speed current transients on v tt . the change in voltage during the transient condition will be the effect of the peak current multiplied by the output capacitor?s esr. for that reason, oscon type capacitors and ceramic are excellent choices for this application. oscon capacitors have extremely low esr and a large capacitance-to-size ratio. ceramic capacitors are also well suited to termination due to their low esr. these capacitors should have a dielectric rating of x5r or x7r. y5v and z5u type capacitors are not recommended, due to their poor performance at high frequencies and over temperature. the minimum recommended capacitance for a 3.5a peak circuit is 100 f. output capacitance can be increased to achieve greater transient performance. mosfet selection the mic5163 utilizes exter nal n-channel mosfets to sink and source current. mosf et selection will settle to two main categories: size and gate threshold (v gs ). mosfet power requirements one of the most important factors is to determine the amount of power the mosfet is going to be required to dissipate. power dissipati on in a ddr3 circuit will be identical for both the high side and low side mosfets. since the supply voltage is divided by half to supply v tt , both mosfets have the same voltage dropped across them. they are also required to be able to sink and source the same amount of current (for either all 0s or all 1s). this equates to each side being able to dissipate the same amount of power. power dissipation calculation for the high-side mosfet is as follows:
micrel, inc. mic5163 april 2009 12 m9999-042209-a p d = (v ddq ? v tt ) i_source where i_source is the average source current. power dissipation for the low-side mosfet is as follows: p d = v tt i_sink where i_sink is the average sink current. in a typical 3.5a peak ddr3 circuit, power considera- tions for mosfet selection would occur as follows. p d = (v ddq ? v tt ) i_source p d = (1.5v ? 0.75v) 1.75a p d = 1.3125 w this typical ddr3 application would require both high- side and low-side n-channel mosfets to be able to handle 1.3125 watts each. in applications where there is excessive power dissipati on, multiple n-channel mosfets may be placed in parallel. these mosfets will share current, distribu ting power dissipation across each device. the maximum mosfet die (junction) temperature limits maximum power dissipation. the ability of the device to dissipate heat away from the junction is specified by the junction-to-ambient ( ja ) thermal resistance. this is the sum of junction-to-case ( jc ) thermal resistance, case- to-sink ( cs ) thermal resistance and sink-to-ambient ( sa ) thermal resistance; ja = jc + cs + sa in our example of a 3.5a peak ddr3 termination circuit, we have selected a d-pack n-channel mosfet that has a maximum junction temperature of 150c. the device has a junction-to-case thermal resistance of 1.5c/w. our application has a maximum ambient temperature of 60c. the required junction-to-ambient thermal resistance can be calculated as follows: d a j ja p t t ? = where t j is the maximum junction temperature, t a is the maximum ambient temperature and p d is the power dissipation. in our example: d a j ja p t t ? = w c c ja 3125 . 1 60 150 ? = w c ja = 57 . 68 this shows that our total t hermal resistance must be better than 68.57c/w. since the total thermal resistance is a combination of all the individual thermal resistances, the amount of heat sink required can be calculated as follows: sa = ja ? ( jc + cs ) in our example: sa = ja ? ( jc + cs ) ? ? ? ? ? ? + ? = w c w c w c sa 5 . 0 5 . 1 57 . 68 w c sa = 57 . 66 in most cases, case-to-sink thermal resistance can be assumed to be about 0.5c/w. the ddr3 termination circuit for our example, using 2 d- pack n-channel mosfets (one high side and one on the low side) will require at least a 43c/w heat sink per mosfet. this may be accomplished with an external heat sink or even just the copper area that the mosfet is soldered to. in some cases, airflow may also be required to reduce thermal resistance. mosfet gate threshold n-channel mosfets require an enhancement voltage greater than its source voltage. typical n-channel mosfets have a gate-source threshold (v gs ) of 1.8v and higher. since the source of the high side n-channel is connected to v tt , the mic5163 v cc pin requires a voltage equal to or greater than the v gs voltage. for example, our ddr3 termination circuit has a v tt voltage of 0.75v. for an n-channel that has a v gs rating of 2.5v, the v cc voltage can be as low as 3.25v. with an n-channel that has a 4.5v v gs , the minimum v cc required is 5.25v. although these n-channels are driven below their full enhancement threshold, it is recommended that the v cc voltage has enough margin to be able to fully enhance the mosfets for large signal transient response. in addition, low gate thresholds mosfets are recommended to reduce the v cc requirements.
micrel, inc. mic5163 april 2009 13 m9999-042209-a design example pvin 1 pvin 2 en 3 dly 4 rc 5 po r 6 pvin 7 pvin 8 pgnd 9 pgnd 10 sw 11 sw 12 sw 13 sw 14 pgnd 15 pgnd 16 pvin 24 pvin 23 svin 22 comp 21 sgnd 18 pvin 17 cf 19 fb 20 pgnd 32 pgnd 31 sw 30 sw 29 sw 28 sw 27 pgnd 26 pgnd 25 u1 22950_32l_5x5yml c1 - 22f, 6.3v c2 - 22f, 6.3v c4 22f, 6.3v c3 - 22f, 6.3v l1 1h, 17ainductor c7 - 100pf, 50v r2 - 698 c6 - 39pf, 25v c8 - 390pf, 50v c5 10f, 6.3v gnd vin cin 1000uf, 6.3v c9 47f 6.3v r4 47.5k c12 - 10nf, 50v c11 1nf, 50v 1 2 3 2n2007e q1 r5 100k c13 1nf, 50v 1 2 tp1 1 2 tp1 1 2 tp4 1 2 tp3 c14 1 2 3 4 tp5 j1 en j2 shdn j3 dly j4 rc j5 por j10 sw j8 vin c24 - 220pf r21 c23 120pf 2 3 1 q22 sud50n02-06 2 3 1 q21 sud50n02-06 + c31 2700f 2.5v pgnd gnd c27 r23 r22 1k vcc 1 en 2 vddq 3 vref 4 gnd 5 fb 6 comp 7 lsd 8 hsd 9 u21 mic5163-ymm 1 2 3 4 tp21 + c26 100f 6.3v 1 2 tp22 1 2 tp23 gnd j23 vin 1 j24 en j26 gnd j22 vtt pgnd vddq 1 2 tp24 r3 - 20k c10 47f 6.3v c22 1f 10v c30 100f 6.3v c21 100f 6.3v c32 100f 6.3v r24 mic5163 as a ddr3 memory terminati on device for 3.5a application bill of materials item part number manufacturer description qty. grm21br60j226me39l murata (1) 4 c2012x5r0j226k tdk (2) or c1, c2, c3, c4 08056d226mat2a avx (3) 22f, 6.3v, x5r, 0805 or grm188r60j106me47d murata (1) 1 c1608x5r0j106k tdk (2) or c5 06036d106mat2a avx (3) 10 f, 6.3v, x5r, 0603 or vj0603y390kxxmb vishay vitramon (4) 1 c6 c1608c0g1h390j tdk (2) 39pf, 25v, x7r, 0603 or c7 vj0603y101kxaat vishay vitramon (4) 100pf, 50v, 0603 ceramic cap 1 c8 vj0603y391kxaat vishay vitramon (4) 390pf, 50v, 0603 ceramic cap 1 grm31cr60j476me19l murata (1) 2 c3216x5r0j476m tdk (2) or c9, c10 12066d476mat2a avx (3) 47 f,6.3v, 1206 or c11, c13 vj0603y102kxxmb vishay vitramon (4) 1nf, 50v, 0603 ceramic cap 2 c12 vj0603y103kxxmb vishay vitramon (4) 10nf, 50v, 0603 ceramic cap 1 0603zd105kat2a avx (3) 1 c22 grm188r61a105k murata (1) 1f, 10v 0603 ceramic cap or vj0603a121kxxat vishay (4) 1 c23 06033a121jat2a avx (3) 120pf, 25v, 0603 ceramic cap or vj0603a221kxxat vishay (4) 1 c24 06033c221jat2a avx (3) 220pf, 25v, 0603 ceramic cap or c26 nosd107m006r0080 avx (3) 100f, 6.3v, 7374 tent 1 c27 n.u. 0603 ceramic cap
micrel, inc. mic5163 april 2009 14 m9999-042209-a item part number manufacturer description qty. c30, c32, c21 18126d107mat avx (3) 100f, 6.3v, 1812 ceramic cap 3 c31 2sepc2700m sanyo (5) 2700f, 2.5v oscon cap 1 cin 597d108x06r3r2t vishay (4) 1000f, 6.3v, r-case 1 l1 cep125hnp-1r0-mc sumida (6) 1h, 17a inductor 1 q1 2n7002e(sot-23) vishay (4) signal mosfet-sot-236 1 q21, q22 sud50n02-06p vishay (4) low vgs(th) n-channel 20-v (d-s) 2 r1 crcw06031101frt1 vishay dale (4) 510 ? (0603 size), 1% 1 r2 crcw06036980frt1 vishay dale (4) 698 ? (0603 size), 1% 1 r3 crcw06032002frt1 vishay dale (4) 20k, (0603 size), 1% 1 r4 crcw06034752frt1 vishay dale (4) 47.5k, (0603 size), 1% 1 r5 crcw06031003frt1 vishay dale (4) 100k (0603 size), 1% 1 r21 crcw0805510rfkta vishay dale (4) 510 ? (0805 size), 1% 1 r22, r24 crcw06031k00fkta vishay dale (4) 1k (0603 size), 1% 1 r23 nu 0603 u1 mic22950yml micrel (7) buck regulator 1 u21 MIC5163YMM micrel (7) dual regulator controller for ddr3 1 notes: 1. murata: www.murata.com. 2. tdk: www.tdk.com. 3. avx: www.avx.com. 4. vishay: www.vishay.com. 5. sanyo: www.sanyo.com 6. sumida: www.sumida.com 7. micrel, inc .: www.micrel.com.
micrel, inc. mic5163 april 2009 15 m9999-042209-a package information 10-pin msop (mm) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is belie ved to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product can reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2009 micrel, incorporated.

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