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? freescale semiconductor, inc., 2012. all rights reserved. preliminary?subject to change without notice freescale semiconductor data sheet: product preview document number: MPC5744P rev. 0.3, 06/2012 this document contains information on a product under development. freescale reserves the right to change or di scontinue this product without notice. the MPC5744P qorivva microcontroller is based on th e power architecture? deve loped by freescale. it targets chassis and safety applicati ons and other applications requiring a high automotive safety integrity level (asil). the MPC5744P is a safeassure solution. this document provides electrical specifications, pin assignments, and package diagram information for the MPC5744P series of microcontro ller units (mcus). all informati on is preliminary and subject to change without notice. for functional charact eristics and the programming model, see the MPC5744P microcontroller reference manual . MPC5744P data sheet 32-bit qorivva mcu suitable for iso26262 asil-d chassis and safety applications
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 2 table of contents 1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.1 feature list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 2 pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 2.1 package pinouts and ballouts . . . . . . . . . . . . . . . . . . . . .7 2.2 pin/ball descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . .10 2.2.1 pin/ball startup and reset states . . . . . . . . . . . .10 2.2.2 power supply and reference voltage pins/balls . 11 2.2.3 system pins/balls. . . . . . . . . . . . . . . . . . . . . . . .14 2.2.4 lvds pins/balls . . . . . . . . . . . . . . . . . . . . . . . . .16 2.2.5 generic pins/balls . . . . . . . . . . . . . . . . . . . . . . .17 2.2.6 peripheral pin muxing . . . . . . . . . . . . . . . . . . . .48 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 3.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62 3.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .62 3.3 recommended operating conditions . . . . . . . . . . . . . .63 3.4 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . .64 3.4.1 general notes for spec ifications at maximum junction temperature . . . . . . . . . . . . . . . . . . . . .66 3.5 electromagnetic interference (emi) characteristics . . .67 3.6 electrostatic discharge (esd) characteristics . . . . . . . .68 3.7 voltage regulator electrical c haracteristics . . . . . . . . . .69 3.8 dc electrical characteristics . . . . . . . . . . . . . . . . . . . . .72 3.9 supply current characteristics . . . . . . . . . . . . . . . . . . . 74 3.10 temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . 75 3.11 main oscillator electrical char acteristics . . . . . . . . . . . 76 3.12 fmpll electrical characteristics . . . . . . . . . . . . . . . . . 78 3.13 internal 16 mhz rc oscillator electrical characteristics 79 3.14 adc electrical characteristics . . . . . . . . . . . . . . . . . . . 80 3.14.1 input impedance and adc accuracy . . . . . . . . 80 3.15 flash memory electr ical characteristics. . . . . . . . . . . . 85 3.16 swg electrical characteristics. . . . . . . . . . . . . . . . . . . 87 3.17 ac specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 3.17.1 reset pad (ext_por, reset) electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 88 3.17.2 wkup/nmi timing . . . . . . . . . . . . . . . . . . . . . . 90 3.17.3 debug/jtag/nexus/aurora timing . . . . . . . . . . 90 3.17.4 external interrupt timing (irq pin) . . . . . . . . . . 97 3.17.5 dspi timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 3.17.6 lvds fast asynchronous transmission (lfast) electrical characteri stics . . . . . . . . . . . . . . . . . 104 3.17.7 flexray . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 4 obtaining package dimensions . . . . . . . . . . . . . . . . . . . . . . .111 5 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 6 document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . 113
introduction MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 3 1 introduction 1.1 feature list table 1 summarizes major features of the mpc5744 p device. the feature column represents a combination of module names and capabilities of certain modules. table 1. MPC5744P feature summary feature details cpu power architecture 2 x e200z4 in delayed lock step architecture harvard execution speed 0 mhz to tbd (design target: 180 mhz or greater) (+2% fm) embedded fpu yes core mpu 24 regions instruction set ppc no instruction set vle yes instruction cache 8 kb, edc data cache 4 kb, edc data local memory 64 kb, ecc system mpu yes (16 regions) buses core bus ahb, 32-bit address, 64-bit data, e2e ecc internal periphery bus 32-bit address, 32-bit data crossbar master x slave ports 4 x 5 memory code/data flash memory 2.5 mb , ecc, rww data flash memory supported with rww sram 384 kb , ecc modules interrupt controller 32 interrupt priority levels, 16 software programmable interrupts pit 1 module with 4 channels system timer module (stm) 1 module with 4 channels software watchdog timer (swt) yes edma 32 channels, in delayed lock step flexray 1 module with 64 message buffer, dual channel
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice introduction freescale semiconductor 4 flexcan 3 modules with 64 message buffer linflexd (uart and lin with dma support) 2 modules clockout yes fault collection and control unit (fccu) yes cross triggering unit (ctu) 2 modules etimer 3 modules with 6 channels flexpwm 2 modules with 4 x (2+1) channels analog-to-digital converter (adc) 4 modules with 12 bit adc, (25 external channels including shared channels plus internal channels) sine-wave generator (swg) 32 point dspi 4 modules as many as 8 chip selects crc unit yes sent 2 modules with 2 channels interprocessor serial li nk interface (sipi) yes junction temperature sensor yes replicated module digital i/os >= 16 peripheral register protection yes supply device power supply 3.3 v with external ballast transistor or 3.3 v with external 1.25 v low drop-out (ldo) regulator adc analog reference voltage 3.15 v to 3.6 v and 4.5 v to 5.5 v clocking phase lock loop (pll) 1 x pll and 1 coupled fmpll internal rc oscillator 16 mhz external crystal oscillator 8 mhz to 40 mhz low power modes halt and stop yes debug nexus level 3+, mdo and aurora interface package lqfp 144 pins lqfp exposed pads (ep) 176 pins table 1. MPC5744P feature summary (continued) feature details
introduction MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 5 1.2 block diagram figure 1 shows the top-level block diagram of the MPC5744P device. mapbga 257 mapbga temperature temperature range (junction) -40c to +150c, option for 165c ambient temperature range (lqfp) -40c to +125c, tbd option (with 165c junction option) ambient temperature range (bga) -40c to +125 c, tbd option (with 165c junction option) table 1. MPC5744P feature summary (continued) feature details
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice introduction freescale semiconductor 6 figure 1. system block diagram 3hulskhudo'rpdlq0+] 1900xowl0rgxoh 6dihw\/dnh )odvk 0% &urvv%du6zlwfk$0%$y$+%0+] 6\vwhp0hpru\3urwhfwlrq8qlw6038 6 ['0$&+08; ,17& ((3520 .% )/$6+&rqwuroohu ,qfo6hw$vvrfldwlyh 3uhihwfk%xiihuv z(((ff 'hod\ 5&&8 'hod\hg/rfn vwhszlwk 5hgxqgdqf\ &khfnhuv 0 0 6 6 3hulskhudo%ulgjh (((ff 'hfrudwh6wrudjh 0+] fkh'0$ z(((ff )oh[5d\ 6:7 670 6 &rqfhqwudwru z(((ff 0+] 0 65$0&wuo z(((ff 'hfrudwhg dffhvv 65$0 .% 0 3djh/lqh 'hod\ 5&&8 6 1h[xv'dwd7udfh 3hulskhudo%ulgjh (((ff 'hfrudwh6wrudjh 0+] $'' '$7$ $'' '$7$ $'' '$7$ $'' '$7$ $'' '$7$ $'' '$7$ 3uholplqdu\0d\fkdqjhzrqrwlfh $'' '$7$ ,qvwuxfwlrq /rdg 6wruh $'' '$7$ -7$*& 13& (]0+] 0dlq&ruhb %,8zlwk(((&& 1h[xvs 8qlilhg%dfngrru,) z(((ff &ruh0hpru\3urwhfwlrq8qlw&038 6fdodu 63)38 ,0hpfwuo 9/( ,&dfkhfwuo '0hpfwuo '&dfkhfwuo (]0+] &khfnhu&ruhbv %,8zlwk(((&& 1h[xvs 8qlilhg%dfngrru,) z(((ff &ruh0hpru\3urwhfwlrq8qlw&038 6fdodu 63)38 ,0hpfwuo 9/( ,&dfkhfwuo '0hpfwuo '&dfkhfwuo 03&3 6,3,'lj5) lqwhuidfh 6dihw\/dnh fkh'0$ z(((ff 5&&8 'hod\ &rqfhqwudwru z(((ff 0+] 1h[xv'dwd 7udfh n% '0(0 n%zd\ n%zd\ &08v 0(08 &5& 0&b&*0 &orfnvrxufhv 6,8/ 66&0 0&b0( 0&b5*0 0&b3&8 %$0 67&8 3,7 6(17 [6$5$' ? 10,:.83 /9'9 +9'9 /9')/$6+ /9',2 30& [6$5$' )oh[5$< 5hj,) 6,3,glj5) 5hj,) )&&8 6(17 /,1)/(; ['63, ['63, [&$1 6:* 1$/ [(7,0(5 )/(;3:0 &78 (7,0(5 )/(;3:0 &78 3&0 2yhuod\5$0 /,1)/(; ['0$&+08; 2q3odwirup 5hj,)eorfnv 7r13&-7$* 0+]'hvljq7dujhw$fwxdoiuhtxhqf\lv7%'
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 7 2pinouts 2.1 package pinouts and ballouts the following figures show the lqfp pinouts and the bga ballmap. figure 2. 144lqfp pinout
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 8 figure 3. 176lqfp pinout
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 9 figure 4. 257mapbga ballmap
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 10 2.2 pin/ball descriptions the following sections provide signa l descriptions and related inform ation about the f unctionality and configuration of the MPC5744P devices. note that this section is under development. 2.2.1 pin/ball startup and reset states this table provides startup state and rese t state information fo r device pins/balls. table 2. pin/ball startup and reset states pin startup state 1 notes: 1 startup state is exit ed when the core and high-voltage supplies reach minimum levels as defined in the power management chapter. state during reset state afte r reset 144 lqfp 176 lqfp 257mapbga gpios hi-z hi-z hi-z 2 2 see section 2.2.5, generic pins/balls . 22 analog inputs 3 3 not all non-supply or reference pins on the devi ce that are explicitly defined in this table. hi-z hi-z hi-z 22 2 jcomp (trst) hi-z input, weak pull-down input, weak pull-down 4 4 see section 2.2.3, system pins/balls . 44 tdi hi-z input, weak pull-up input, weak pull-up 44 4 tdo hi-z weak pull-up hi-z 44 4 tms hi-z input, weak pull-down input, weak pull-down 44 4 tck hi-z input, weak pull-down input, weak pull-down 44 4 xtal/extal hi-z hi-z hi-z 44 4 fccu_f[0] hi-z input, hi-z output/input, hi-z 38 46 r2 fccu_f[1] hi-z input, hi-z output/input, hi-z 141 173 c4 ext_por hi-z input, weak pull-down input, weak pull-down 44 4 reset_b hi-z input, weak pull-down input, weak pull-down 44 4
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 11 2.2.2 power supply and r eference voltage pins/balls table 3. power supply and reference voltage pins/balls supply qfp pbga symbol type description 14 4lqfp 176lqfp 257mapbga v dd_lv power low voltage power supply 18 39 70 93 131 135 23 47 81 117 163 167 f6 f7 f8 f9 f10 f11 f12 g6 g12 h6 h12 j6 j12 k6 k12 l6 l12 m6 m7 m8 m9 m10 m11 m12
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 12 v ss_lv ground low voltage ground. pll ground is also connected to low voltage ground for core logic on 144 lqfp (pin 35).. 17 35 40 71 94 96 132 137 22 42 48 82 118 120 164 169 g7 g8 g9 g10 g11 h7 h8 h9 h10 h11 j7 j8 j9 j10 j11 k7 k8 k9 k10 k11 l7 l8 l9 l10 l11 v dd_lv_pll power pll low voltage supply 36 43 p4 v ss_lv_pll ground pll low voltage ground 35 42 n4 v dd_hv_io power high voltage power supply for i/o. 6 21 91 126 9 26 36 84 115 158 a9 b2 b16 d8 d14 g2 m2 t2 t16 table 3. power supply and reference voltage pins/balls supply qfp pbga symbol type description 14 4lqfp 176lqfp 257mapbga
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 13 v ss_hv_io ground high voltage ground supply for i/o 7 22 90 127 10 27 37 85 114 159 a1 a2 a16 a17 b1 b9 b17 c3 c15 d9 h2 n2 r3 r15 t1 t17 u1 u2 u16 u17 v dd_hv_pmu v dd_hv_pmu_aux power pmu high voltage supply 72 83 u14 v dd_hv_osc0 power power supply for the oscillator 27 32 m1 v ss_hv_osc0 ground ground supply for the oscillator 28 33 p1 v dd_hv_fla0 power decoupling supply pin for flash 97 121 h16 vdd_hv_adv0/1 power high voltage supply for adc, swg(3.3v) 58 69 t10 v ss_hv_adv0/1 ground high voltage ground for adc 59 70 u9 v dd_hv_ad0_vdde 1 v dd_hv_adre0 v dd_hv_adsw0 supply high voltage supply for digital portion of adc pads voltage reference of adc/tsens high voltage supply for adc and adc pad switches 50 58 r7 v ss_hv_ad0_vsse v ss_hv_adre0 v ss_hv_adsw0 ground high voltage ground for digital portion of adc pads voltage reference ground of adc/tsens high voltage ground for adc and adc pad switches 51 59 t7 v dd_hv_ad1_vdde 2 v dd_hv_adre1 v dd_hv_adsw1 supply high voltage supply for digital portion of adc pads voltage reference of adc/tsens high voltage supply for adc and adc pad switches 56 67 r9 table 3. power supply and reference voltage pins/balls supply qfp pbga symbol type description 14 4lqfp 176lqfp 257mapbga
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 14 2.2.3 system pins/balls the following table contains information on system pin functions for the devices. v ss_hv_ad1_vsse v ss_hv_adre1 v ss_hv_adsw1 ground high voltage ground for digital portion of adc pads voltage reference ground of adc/tsens high voltage ground for adc and adc pad switches 57 68 t9 v dd_lv_lfast supply lfast pll low voltage supply - 99 n16 v ss_lv_lfast ground lfast pll low voltage ground - 100 n17 v dd_lv_nexus supply aurora lvds supply - - j16 v ss_lv_nexus ground aurora lvds ground - - k16 notes: 1 connected to adc0/2. can be 3.3v or 5v. 2 connected to adc1/3. can be 3.3v or 5v. table 3. power supply and reference voltage pins/balls supply qfp pbga symbol type description 14 4lqfp 176lqfp 257mapbga
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 15 table 4. system pins/balls symbol type description qfp pbga 144lqfp 176lqfp 257mapbga nmi_b input non maskable interrupt 1 1 e4 xtal input crystal oscillator/external clock input 29 34 n1 extal input input of the oscillator amplifier circuit 30 35 r1 reset_b input functional reset 31 38 p2 ext_por input external power on reset 130 162 d6 vpp_test 1 notes: 1 vpp_test must be connected to ground. input soc test mode 107 131 d15 jcomp input jtagc, jtag compliance enable 123 154 a6 tck input jtagc, test clock input 88 112 h17 tms input jtagc, test mode select 87 111 h15 tdo output jtagc, test data out 89 113 g14 tdi input jtagc, test data input 86 109 j17 mdo[0] output nexus, message dat a out pins; reflects the state of the internal power on reset signal until reset is negated 913 g1 mdo[3:1] output nexus, message data out pins 4,5,8 5,8,11 e1,f1,e2 evto output nexus, event out pin 24 29 k2 evti input nexus, event in pin 25 30 l2 mcko output nexus, message clock out pin 19 24 j4 mseo output nexus, message start/end out pin 20 25 j3 rdy_b output nexus, read/write transfer completed - - j2 bctrl output base control signal of external npn ballast 69 80 r13 j[11],j[10] -- freescale factory test 2 2 do not connect on the board. - - l17,k17
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 16 2.2.4 lvds pins/balls the following table contains informati on on lvds pin functions for the devices. table 5. sipi lfast lvds pin descriptions functional block port pin signal signal description direction 176lqfp 257mapbga sipi lfast 1 notes: 1 drclk and tck/drclk usage for sipi lfast and debug lfast are described in the MPC5744P reference manual?s sipi lfast and debug lfast chapters.. i[5] sipi_txn interprocessor bus lfast, lvds transmit negative terminal o 102 n15 c[12] 2 2 g[7] and c[12] are available in the 144lqfp, but there is no sipi lfast functionality available. sipi lfast pins are muxed with gp ios. do not use gpio and sipi lfast functionality in parallel. sipi_txp interprocessor bus lfast, lvds transmit positive terminal o 101 m14 i[6] sipi_rxn interprocessor bus lfast, lvds receive negative terminal i 103 m15 g[7] 2 sipi_rxp interp rocessor bus lfast, lvds receive positive terminal i 104 m16
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 17 2.2.5 generic pins/balls the i/o signal descriptions for the device are in th e following table. it contains the port definition, multiplexing, direction, pad type, and package pin/ball numbers for each i/o pin on the device. see the device reference manual for the mscr register address map. table 6. aurora lvds pin descriptions functional block pad signal signal description direction mapbga 257 1 notes: 1 nexus aurora high speed trace is only available on the 257 pin mapbga nexus aurora high speed trace g[12] tx0p nexus aurora high speed trace lane 0, lvds positive terminal oh14 g[13] tx0n nexus aurora high speed trace lane 0, lvds negative terminal oj14 g[14] tx1p nexus aurora high speed trace lane 1, lvds positive terminal o l15 g[15] tx1n nexus aurora high speed trace lane 1, lvds negative terminal ok14 h[0] clkp nexus aurora high speed trace clock, lvds positive terminal ik15 h[1] clkn nexus aurora high speed trace clock, lvds negative terminal ij15
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 18 table 7. pin muxing port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257 a[0] mscr[0] 0000 (default) 1 gpio[0] siul2-gpio[0] general purpose io a[0] i/o 73 86 p12 0001 etc0 etimer_0 etimer_0 input/output data channel 0 i/o 0010 sck dspi2 dspi 2 serial clock (output) i/o 0011-1111 - reserved - - imcr[59] 0010 (default) etc0 etimer_0 etimer_0 input data channel 0 i/o imcr[173] 0001 req0 siul2 siul2 external interrupt 0 i a[1] mscr[1] 0000 (default) gpio[1] siul2-gpio[1] general purpose io a[1] i/o 74 91 t14 0001 etc1 etimer_0 etimer_0 input/output data channel 1 i/o 0010 sout dspi2 dspi 2 serial data out o 0011-1111 - reserved - - imcr[60] 0010 etc1 etimer_0 etimer_0 input data channel 1 i/o imcr[174] 0001 req1 siul2 siul2 external interrupt source 1 i a[2] mscr[2] 0000 (default) gpio[2] siul2-gpio[2] general purpose io a[2] i/o 84 106 l14 0001 etc2 etimer_0 etimer_0 input/output data channel 2 i/o 0010 - reserved - - 0011 a3 flexpwm_0 flexpwm_0 channel a input 3 i/o 0100-1111 - reserved - - imcr[169] 0000 (default) abs1 mc_rgm rgm external boot mode 1 i imcr[47] 0010 sin dspi2 dspi 2 serial data input i imcr[61] 0010 etc2 etimer_0 etimer_0 input data channel 2 i imcr[175] 0001 req2 siul2 siul2 external interrupt source 2 i
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 19 a[3] mscr[3] 0000 (default) gpio[3] siul2-gpio[3] general purpose io a[3] i/o 92 116 g15 0001 etc3 etimer_0 etimer_0 input/output data channel 3 i/o 0010 cs0 dspi2 dspi 2 peripheral chip select 0 i/o 0011 b3 flexpwm_0 flexpwm_0 channel b input/output 3 i/o 0100-1111 - reserved - - imcr[171] 0000 abs2 mc_rgm rgm external boot mode 2 i imcr[62] 0010 etc3 etimer_0 etimer_0 input data channel 3 i/o imcr[176] 0001 req3 siul2 siul2 external interrupt source 3 i a[4] mscr[4] 0000 (default) gpio[4] siul2-gpio[4] general pu rpose io a[4] i/o 108 132 d16 0001 etc0 etimer_1 etimer_1 input/output data channel 0 i/o 0010 cs1 dspi2 dspi 2 peripheral chip select 1 o 0011 etc4 etimer_0 etimer_0 input/output data channel 4 i/o 0100 a2 flexpwm_1 flexpwm_1 channel a input/output 2 i/o 0101-1111 - reserved - - imcr[112] 0001 a2 flexpwm_1 flexpwm_1 channel a input 2 i/o imcr[177] 0001 req4 siul2 siul2 external interrupt source 4 i imcr[172] 0000 fab mc_rgm rgm force alternate boot mode i imcr[63] 0011 etc4 etimer_0 etimer_0 input data channel 4 i/o table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 20 a[5] mscr[5] 0000 (default) gpio[5] siul2-gpio[5] general purpose io a[5] i/o 14 18 h4 0001 cs0 dspi1 dspi 1 peripheral chip select 0 i/o 0010 etc5 etimer_1 etimer_1 input/output data channel 5 i/o 0011 cs7 dspi0 dspi 0 peripheral chip select 7 o 0100-1111 - reserved - - imcr[178] 0001 req5 siul2 siul2 external interrupt source 5 i a[6] mscr[6] 0000 (default) gpio[6] siul2-gpio[6] general purpose io a[6] i/o 2 2 d1 0001 sck dspi1 dspi 1 serial clock (output) i/o 0010 etc2 etimer_2 etimer_2 input/output data channel 2 i/o 0011-1111 - reserved - - imcr[179] 0001 req6 siul2 siul2 external interrupt source 6 i a[7] mscr[7] 0000 (default) gpio[7] siul2-gpio[7] general purpose io a[7] i/o 10 14 g4 0001 sout dspi1 dspi 1 serial data out o 0010 etc3 etimer_2 etimer_2 input/output data channel 3 i/o 0011-1111 - reserved - - imcr[180] 0001 req7 siul2 siul2 external interrupt source 7 i a[8] mscr[8] 0000 (default) gpio[8] siul2-gpio[8] general purpose io a[8] i/o 12 16 h1 0001 - reserved - - 0010 etc4 etimer_2 etimer_2 input/output data channel 4 i/o 0011-1111 - reserved - - imcr[44] 0001 sin dspi1 dspi 1 serial data input i imcr[181] 0001 req8 siul2 siul2 external interrupt source 8 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 21 a[9] mscr[9] 0000 (default) gpio[9] siul2-gpio[9] general purpose io a[9] i/o 134 166 a4 0001 cs1 dspi2 dspi 2 peripheral chip select 1 o 0010 etc5 etimer_2 etimer_2 input/output data channel 5 i/o 0011 b3 flexpwm_0 flexpwm_0 channel b input/output 3 i/o 0100-1111 - reserved - - imcr[183] 0001 fault0 flexpwm_0 flexpwm_0 fault input 0 i/o a[10] mscr[10] 0000 (default) gpio[10] siul2-gpio[10] general purpose io a[10] i/o 118 145 b11 0001 cs0 dspi2 dspi 2 peripheral chip select 0 i/o 0010 b0 flexpwm_0 flexpwm_0 channel b input/output 0 i/o 0011 x2 flexpwm_0 flexpwm_0 auxiliary input/output 2 i/o 0100-1111 - reserved - - imcr[182] 0001 req9 siul2 siul2 external interrupt source 9 i a[11] mscr[11] 0000 (default) gpio[11] siul2-gpio[11] general purpose io a[11] i/o 120 149 d10 0001 sck dspi2 dspi 2 serial clock (output) i/o 0010 a0 flexpwm_0 flexpwm_0 channel a input/output 0 i/o 0011 a2 flexpwm_0 flexpwm_0 channel a input/output 2 i/o 0100-1111 - reserved - - imcr[183] 0001 req10 siul2 siul2 external interrupt source 10 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 22 a[12] mscr[12] 0000 (default) gpio[12] siul2-gpio[12] general purpose io a[12] i/o 122 152 d7 0001 sout dspi2 dspi 2 serial data out o 0010 a2 flexpwm_0 flexpwm_0 channel a input/output 2 i/o 0011 b2 flexpwm_0 flexpwm_0 channel b input/output 2 i/o 0100-1111 - reserved - - imcr[184] 0001 req11 siul2 siul2 external interrupt source 11 i a[13] mscr[13] 0000 (default) gpio[13] siul2-gpio[13] general purpose io a[13] i/o 136 168 c5 0001 - reserved - - 0010 b2 flexpwm_0 flexpwm_0 channel b input/output 2 i/o 0011-1111 - reserved - - imcr[83] 0010 fault0 flexpwm_0 flexpwm_0 fault input 0 i imcr[47] 0001 sin dspi2 dspi 2 serial data input i imcr[185] 0001 req12 siul2 siul2 external interrupt source 12 i a[14] mscr[14] 0000 (default) gpio[14] siul2-gpio[14] general purpose io a[14] i/o 143 175 a3 0001 txd can1 can 1 transmit pin o 0010 etc4 etimer_1 etimer_1 input/output data channel 4 i/o 0011-1111 - reserved - - imcr[186] 0001 req13 siul2 siul2 external interrupt source 13 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 23 a[15] mscr[15] 0000 (default) gpio[15] siul2-gpio[15] general purpose io a[15] i/o 144 176 d3 0001 - reserved - - 0010 etc5 etimer_1 etimer_1 input/output data channel 5 i/o 0011-1111 - reserved - - imcr[32] 0001 rxd can0 can 0 receive pin i imcr[33] 0001 rxd can1 can 1 receive pin i imcr[187] 0001 req14 siul2 siul2 external interrupt source 14 i b[0] mscr[16] 0000 (default) gpio[16] siul2-gpio[16] general purpose io b[0] i/o 109 134 c16 0001 txd can0 can 0 transmit pin o 0010 etc2 etimer_1 etimer_1 input/output data channel 2 i/o 0011 debug0 sscm sscm debug output 0 o 0100-1111 - reserved - - imcr[188] 0001 req15 siul2 siul2 external interrupt source 15 i b[1] mscr[17] 0000 (default) gpio[17] siul2-gpio[17] general purpose io b[1] i/o 110 135 c14 0001 - reserved - - 0010 etc3 etimer_1 etimer_1 input/output data channel 3 i/o 0011 debug1 sscm sscm debug output 1 o 0100-1111 - reserved - - imcr[32] 0010 rxd can0 can 0 receive pin i imcr[33] 0010 rxd can1 can 1 receive pin i imcr[189] 0001 req16 siul2 siul2 external interrupt source 16 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 24 b[2] mscr[18] 0000 (default) gpio[18] siul2-gpio[18] general purpose io b[2] i/o 114 141 c12 0001 txd lin0 linflexd 0 transmit pin o 0010 - reserved - - 0011 debug2 sscm sscm debug output 2 o 0100-1111 - reserved - - imcr[190] 0001 req17 siul2 siul2 external interrupt source 17 i b[3] mscr[19] 0000 (default) gpio[19] siul2-gpio[19] general purpose io b[3] i/o 116 143 b12 0001 - reserved - - 0010 - reserved - - 0011 debug3 sscm sscm debug output 3 o 0100-1111 - reserved - - imcr[165] 0001 rxd lin0 lin 0 receive pin i b[4] mscr[20] 0000 gpio[20] siul2-gpio[20] general purpose io b[4] i/o 89 113 g14 0001 (default) tdo tdo_mux jtagc test data out (tdo) o 0010-1111 - reserved - - b[5] mscr[21] 0000 (default) gpio[21] siul2-gpio[21] jtagc test data in (tdi) 2 general purpose io b[5] i/o 86 109 j17 0001 - reserved - - 0010-1111 - reserved - - b[6] mscr[22] 0000 (default) gpio[22] siul2-gpio[22] general purpose io b[6] i/o 138 170 b5 0001 clk_out mc_rgm cgm clock out for off-chip use and observation o 0010 cs2 dspi2 dspi 2 peripheral chip select 2 o 0011-1111 - reserved - - imcr[191] 0001 req18 siul2 siul2 external interrupt source 18 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 25 b[7] mscr[23] 0000 (default) gpi[23] 3 adc0_an[0] siul2-gpi[23] general purpose input b[7] i 43 51 r5 0001 - reserved - - 0010-1111 - reserved - - imcr[165] 0010 rxd lin0 lin 0 receive pin i b[8] mscr[24] 0000 gpi[24] 3 adc0_an[1] siul2-gpi[24] general purpose input b[8] i 47 55 p7 0001 - reserved - - 0010-1111 - reserved - - imcr[64] 0001 etc5 etimer_0 etimer_0 input data channel 5 i b[9] mscr[25] 0000 (default) gpi[25] 3 adc0_an[2] siul2-gpi[25] general purpose input b[9] i 52 60 u7 0001 - reserved - - 0010-1111 - reserved - - b[10] mscr[26] 0000 (default) gpi[26] 3 adc0_adc1_a n[12] siul2-gpi[26] general purpose input b[10] i 53 61 r8 0001 - reserved - - 0010-1111 - reserved - - b[11] mscr[27] 0000 (default) gpi[27] 3 adc0_adc1_a n[13] siul2-gpi[27] general purpose input b[11] i 54 62 t8 0001 - reserved - - 0010-1111 - reserved - - b[12] mscr[28] 0000 (default) gpi[28] 3 adc0_adc1_a n[14] siul2-gpi[28] general purpose input b[12] i 55 63 u8 0001 - reserved - - 0010-1111 - reserved - - b[13] mscr[29] 0000 (default) gpi[29] 3 adc1_an[0] siul2-gpi[29] general purpose input b[13] i 60 71 r10 0001 - reserved - - 0010-1111 - reserved - - imcr[166] 0001 rxd lin1 lin 1 receive pin i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 26 b[14] mscr[30] 0000 (default) gpi[30] 3 adc1_an[1] siul2-gpi[30] general purpose input b[14] i 64 75 p11 0001 - reserved - - 0010-1111 - reserved - imcr[63] 0001 etc4 etimer_0 etimer_0 input data channel 4 i imcr[192] 0001 req19 siul2 siul2 external interrupt source 19 i b[15] mscr[31] 0000 (default) gpi[31] 3 adc1_an[2] siul2-gpi[31] general purpose input b[15] i 62 73 r11 0001 - reserved - - 0010-1111 - reserved - - imcr[193] 0001 req20 siul2 siul2 external interrupt source 20 i c[0] mscr[32] 0000 (default) gpi[32] 3 adc1_an[3] siul2-gpi[32] general purpose input c[0] i 66 77 r12 0001 - reserved - - 0010-1111 - reserved - - c[1] mscr[33] 0000 (default) gpi[33] 3 adc0_an[2] siul2-gpi[33] general purpose input c[1] i 41 49 t4 0001 - reserved - - 0010-1111 - reserved - - c[2] mscr[34] 0000 (default) gpi[34] 3 adc0_an[3] siul2-gpi[34] general purpose input c[2] i 45 53 u5 0001 - reserved - - 0010-1111 - reserved - - c[4] mscr[36] 0000 (default) gpio[36] siul2-gpio[36] general purpose io c[4] i/o 11 15 h3 0001 cs0 dspi0 dspi 0 peripheral chip select 0 i/o 0010 x1 flexpwm_0 flexpwm_0 auxiliary input/output 1 i/o 0011 debug4 sscm sscm debug output 4 o 0100-1111 - reserved - - imcr[195] 0001 req22 siul2 siul2 external interrupt source 22 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 27 c[5] mscr[37] 0000 (default) gpio[37] siul2-gpio[37] general purpose io c[5] i/o 13 17 g3 0001 sck dspi0 dspi 0 serial clock (output) i/o 0010 - reserved - - 0011 debug5 sscm sscm debug output 5 o 0100-1111 - reserved - - imcr[86] 0001 fault3 flexpwm_0 flexpwm_0 fault input 3 i imcr[196] 0001 req23 siul2 siul2 external interrupt source 23 i c[6] mscr[38] 0000 (default) gpio[38] siul2-gpio[38] general purpose io c[6] i/o 142 174 d4 0001 sout dspi0 dspi 0 serial data out o 0010 b1 flexpwm_0 flexpwm_0 channel b input/output 1 i/o 0011 debug6 sscm sscm debug output 6 o 0100-1111 - reserved - - imcr[197] 0001 req24 siul2 siul2 external interrupt source 24 i c[7] mscr[39] 0000 (default) gpio[39] siul2-gpio[39] general purpose io c[7] i/o 15 19 j1 0001 - reserved - - 0010 a1 flexpwm_0 flexpwm_0 channel a input/output 1 i/o 0011 debug7 sscm sscm debug output 7 o 0100-1111 - reserved - - imcr[41] 0001 sin dspi0 dspi 0 serial data input i c[10] mscr[42] 0000 (default) gpio[42] siul2-gpio[42] general purpose io c[10] i/o 111 136 b14 0001 cs2 dspi2 dspi 2 peripheral chip select 2 o 0010 - reserved - - 0011 a3 flexpwm_0 flexpwm_0 channel a input/output 3 i/o 0100-1111 - reserved - - imcr[84] 0001 fault1 flexpwm_0 flexpwm_0 fault input 1 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 28 c[11] mscr[43] 0000 (default) gpio[43] siul2-gpio[43] general purpose io c[11] i/o 80 97 p16 0001 etc4 etimer_0 etimer_0 input/output data channel 4 i/o 0010 cs2 dspi2 dspi 2 peripheral chip select 2 o 0011-1111 - reserved - - imcr[63] 0100 etc4 etimer_0 etimer_0 input data channel 4 i c[12] mscr[44] 0000 (default) gpio[44] siul2-gpio[44] general purpose io c[12] i/o 82 101 m14 0001 etc5 etimer_0 etimer_0 input/output data channel 5 4 i/o 0010 cs3 dspi2 dspi 2 peripheral chip select 3 o 0011 - reserved - o 0100-1111 - reserved - - imcr[64] 0011 etc5 etimer_0 etimer_0 input data channel 5 i c[13] mscr[45] 0000 (default) gpio[45] siul2-gpio[45] general purpose io c[13] i/o 101 125 e15 0001 etc1 etimer_1 etimer_1 input/output data channel 1 i/o 0010-0011 - reserved - - 0100 a0 flexpwm_1 flexpwm_1 channel a input 0 i/o 0101-1111 - reserved - - imcr[38] 0001 (default) ext_in ctu_0 ctu 0 external trigger input i imcr[87] 0001 ext_sync flexpwm_0 flexpwm_0 external trigger input i imcr[105] 0001 a0 flexpwm_1 flexpwm_1 channel a input 0 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 29 c[14] mscr[46] 0000 (default) gpio[46] siul2-gpio[46] general purpose io c[14] i/o 103 127 f14 0001 etc2 etimer_1 etimer_1 input/output data channel 2 i/o 0010 ext_tgr ctu_0 ctu0 external trigger output o 0011 cs7 dspi1 dspi 1 peripheral chip select 7 o 0100 b0 flexpwm_1 flexpwm_1 channel b input/output 0 i/o 0101-1111 - reserved - - imcr[106] 0001 b0 flexpwm_1 flexpwm_1 channel b input 0 i c[15] mscr[47] 0000 (default) gpio[47] siul2-gpio[47] general purpose io c[15] i/o 124 156 a8 0001 fr_a_txen flexray flexray transmit enable channel a o 0010 etc0 etimer_1 etimer_1 input/output data channel 0 i/o 0011 a1 flexpwm_0 flexpwm_0 channel a input/output 1 i/o 0100-1111 - reserved - - imcr[38] 0010 ext_in ctu_0 ctu 0 external trigger input i imcr[87] 0010 ext_sync flexpwm_0 flexpwm_0 external sync input i d[0] mscr[48] 0000 (default) gpio[48] siul2-gpio[48] general purpose io d[0] i/o 125 157 b8 0001 fr_a_tx flexray flexray transmit data chan- nel a o 0010 etc1 etimer_1 etimer_1 input/output data channel 1 i/o 0011 b1 flexpwm_0 flexpwm_0 channel b input/output 1 i/o 0100-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 30 d[1] mscr[49] 0000 (default) gpio[49] siul2-gpio[49] gener al purpose io d[1] i/o 3 4 e3 0001 - reserved - - 0010 etc2 etimer_1 etimer_1 input/output data channel 2 i/o 0011 ext_tgr ctu_0 ctu 0 external trigger output o 0100-1111 - reserved - - imcr[136] 0001 fr_a_rx flexray flexray channel a receive pin i d[2] mscr[50] 0000 (default) gpio[50] siul2-gpio[50] general purpose io d[2] i/o 140 172 b4 0001 - reserved - - 0010 etc3 etimer_1 etimer_1 input/output data channel 3 i/o 0011 x3 flexpwm_0 flexpwm_0 auxiliary input/output 3 i/o 0100-1111 - reserved - - imcr[137] 0001 fr_b_rx flexray flexray channel b receive pin i d[3] mscr[51] 0000 (default) gpio[51] siul2-gpio[51] general purpose io d[3] i/o 128 160 a5 0001 fr_b_tx flexray flexray transmit data chan- nel b o 0010 etc4 etimer_1 etimer_1 input/output data channel 4 i/o 0011 a3 flexpwm_0 flexpwm_0 channel a input/output 3 i/o 0100-1111 - reserved - - d[4] mscr[52] 0000 (default) gpio[52] siul2-gpio[52] general purpose io d[4] i/o 129 161 b7 0001 fr_b_txen flexray flexray transmit enable channel b o 0010 etc5 etimer_1 etimer_1 input/output data channel 5 i/o 0011 b3 flexpwm_0 flexpwm_0 channel b input/output 3 i/o 0100-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 31 d[5] mscr[53] 0000 (default) gpio[53] siul2-gpio[53] general purpose io d[5] i/o 33 40 m4 0001 cs3 dspi0 dspi 0 peripheral chip select 3 o 0010-1111 - reserved - - imcr[85] 0001 fault2 flexpwm_0 flexpwm_0 fault input 2 i imcr[205] 0001 sent_rx[0] sent0 sent 0 receiver channel 0 i d[6] mscr[54] 0000 (default) gpio[54] siul2-gpio[54] general purpose io d[6] i/o 34 41 p3 0001 cs2 dspi0 dspi 0 peripheral chip select 2 o 0010 - reserved - - 0011 x3 flexpwm_0 flexpwm_0 auxiliary input/output 3 i/o 0100-1111 - reserved - - imcr[84] 0010 fault1 flexpwm_0 flexpwm_0 fault input 1 i d[7] mscr[55] 0000 (default) gpio[55] swg out 5 siul2-gpio[55] general pu rpose io d[7] i/o 37 45 r4 0001 cs3 dspi1 dspi 1 peripheral chip select 3 o 0010 - reserved - - 0011 cs4 dspi0 dspi 0 peripheral chip select 4 o 0100-1111 - reserved - - imcr[213] 0001 sent_rx[0] sent1 sent 1 receiver channel 0 i d[8] mscr[56] 0000 (default) gpio[56] siul2-gpio[56] general purpose io d[8] i/o 32 39 l4 0001 cs2 dspi1 dspi 1 peripheral chip select 2 o 0010 etc4 etimer_1 etimer_1 input/output data channel 4 i/o 0011 cs5 dspi0 dspi 0 peripheral chip select 5 o 0100-1111 - reserved - - imcr[86] 0010 fault3 flexpwm_0 flexpwm_0 fault input 3 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 32 d[9] mscr[57] 0000 (default) gpio[57] siul2-gpio[57] general purpose io d[9] i/o 26 31 n3 0001 x0 flexpwm_0 flexpwm_0 auxiliary input/output 0 i/o 0010 txd lin1 linflexd 1 transmit pin o 0011-1111 - reserved - - d[10] mscr[58] 0000 (default) gpio[58] siul2-gpio[58] general purpose io d[10] i/o 76 93 r16 0001 a0 flexpwm_0 flexpwm_0 channel a input/output 0 i/o 0010-1111 - reserved - - imcr[59] 0001 etc0 etimer_0 etimer_0 input data channel 0 i d[11] mscr[59] 0000 (default) gpio[59] siul2-gpio[59] general purpose io d[11] i/o 78 95 p17 0001 b0 flexpwm_0 flexpwm_0 channel b input/output 0 i/o 0010-1111 - reserved - - imcr[60] 0001 etc1 etimer_0 etimer_0 input data channel 1 i d[12] mscr[60] 0000 (default) gpio[60] siul2-gpio[60] general purpose io d[12] i/o 99 123 f15 0001 x1 flexpwm_0 flexpwm_0 auxiliary input/output 1 i/o 0010 cs6 dspi1 dspi 1 peripheral chip select 6 o 0011-1111 - reserved - - imcr[166] 0010 rxd lin1 lin 1 receive pin i d[14] mscr[62] 0000 (default) gpio[62] siul2-gpio[62] general purpose io d[14] i/o 105 129 e17 0001 b1 flexpwm_0 flexpwm_0 channel b input/output 1 i/o 0010-1111 - reserved - imcr[62] 0001 etc3 etimer_0 etimer_0 input data channel 3 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 33 e[0] mscr[64] 0000 (default) gpi[64] 3 adc1_adc3_a n[5] siul2-gpi[64] general purpose input e[0] i 68 79 t13 0001 - reserved - - 0010-1111 - reserved - - e[2] mscr[66] 0000 (default) gpi[66] 3 adc0_an[5] siul2-gpi[66] general purpose input e[2] i 49 57 u6 0001 - reserved - - 0010-1111 - reserved - - e[4] mscr[68] 0000 (default) gpi[68] 3 adc0_an[7] siul2-gpi[68] general purpose input e[4] i 42 50 u4 0001 - reserved - - 0010-1111 - reserved - - e[5] mscr[69] 0000 (default) gpi[69] 3 adc0_an[8] siul2-gpi[69] general purpose input e[5] i 44 52 t5 0001 - reserved - - 0010-1111 - reserved - - e[6] mscr[70] 0000 (default) gpi[70] 3 adc0_an[4] siul2-gpi[70] general purpose input e[6] i 46 54 r6 0001 - reserved - - 0010-1111 - reserved - - e[7] mscr[71] 0000 (default) gpi[71] 3 adc0_an[6] siul2-gpi[71] general purpose input e[7] i 48 56 t6 0001 - reserved - - 0010-1111 - reserved - - e[9] mscr[73] 0000 gpi[73] 3 adc1_adc3_a n[7] siul2-gpi[73] general purpose input e[9] i 61 72 u10 0001 - reserved - - 0010-1111 - reserved - - e[10] mscr[74] 0000 (default) gpi[74] 3 adc1_adc3_a n[8] siul2-gpi[74] general purpose input e[10] i 63 74 t11 0001 - reserved - - 0010-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 34 e[11] mscr[75] 0000 (default) gpi[75] 3 adc1_adc3_a n[5] siul2-gpi[75] general purpose input e[11] i 65 76 u11 0001 - reserved - - 0010-1111 - reserved - - e[12] mscr[76] 0000 (default) gpi[76] 3 adc1_adc3_a n6] siul2-gpi[76] general purpose input e[12] i 67 78 t12 0001 - reserved - - 0010-1111 - reserved - - e[13] mscr[77] 0000 (default) gpio[77] siul2-gpio[77] general purpose io e[13] i/o 117 144 a11 0001 etc5 etimer_0 etimer_0 input/output data channel 5 i/o 0010 cs3 dspi2 dspi 2 peripheral chip select 3 o 0011 cs4 dspi1 dspi 1 peripheral chip select 4 o 0100-1111 - reserved - - imcr[198] 0001 req25 siul2 siul2 external interrupt source 25 i imcr[64] 0100 etc5 etimer_0 etimer_0 input data channel i e[14] mscr[78] 0000 (default) gpio[78] siul2-gpio[78] general purpose io e[14] i/o 119 148 b10 0001 etc5 etimer_1 etimer_1 input/output data channel 5 i/o 0010 - reserved - - 0011 cs5 dspi1 dspi 1 peripheral chip select 5 o 0100 b2 flexpwm_1 flexpwm_1 channel b input/output 2 i/o 0101-1111 - reserved - - imcr[113] 0001 b2 flexpwm_1 flexpwm_1 channel b input 2 i imcr[199] 0001 req26 siul2 siul2 external interrupt source 26 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 35 e[15] mscr[79] 0000 (default) gpio[79] siul2-gpio[79] general purpose io e[15] i/o 121 151 c8 0001 cs1 dspi0 dspi 0 peripheral chip select 1 o 0010-1111 - reserved - - imcr[200] 0001 req27 siul2 siul2 external interrupt source 27 i f[0] mscr[80] 0000 (default) gpio[80] siul2-gpio[80] general purpose io f[0] i/o 133 165 b6 0001 a1 flexpwm_0 flexpwm_0 channel a input/output 1 i/o 0010-1111 - reserved - - imcr[61] 0001 etc2 etimer_0 etimer_0 input data channel 2 i imcr[201] 0001 req28 siul2 siul2 external interrupt source 28 i f[3] mscr[83] 0000 (default) gpio[83] siul2-gpio[83] general purpose io f[3] i/o 139 171 b3 0001 cs6 dspi0 dspi 0 peripheral chip select 6 o 0010-1111 - reserved - - f[4] mscr[84] 0000 (default) gpio[84] siul2-gpio[84] gener al purpose io f[4] i/o 4 5 e1 0001 - reserved - i/o 0010 mdo[3] npc_wrapper nexus - message data out pin 3 o 0011-1111 - reserved - - f[5] mscr[85] 0000 (default) gpio[85] siul2-gpio[85] gener al purpose io f[5] i/o 5 8 f1 0001 - reserved - i/o 0010 mdo[2] npc_wrapper nexus message data out pin 2 o 0011-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 36 f[6] mscr[86] 0000 (default) gpio[86] siul2-gpio[86] general purpose io f[6] i/o 8 11 e2 0001 - reserved - i/o 0010 mdo[1] npc_wrapper nexus message data out pin 1 o 0011-1111 - reserved - - f[7] mscr[87] 0000 (default) gpio[87] siul2-gpio[87] general purpose io f[7] i/o 19 24 j4 0001 - reserved - i/o 0010 mcko npc_wrapper nexus message clock out for development tools o 0011-1111 - reserved - - f[8] mscr[88] 0000 (default) gpio[88] siul2-gpio[88] general purpose io f[8] i/o 20 25 j3 0001 - reserved - i/o 0010 mseo_b[1] npc_wrapper nexus message start/end out pin 1 o 0011-1111 - reserved - - f[9] mscr[89] 0000 (default) gpio[89] siul2-gpio[89] general purpose io f[9] i/o 23 28 k3 0001 - reserved - i/o 0010 mseo_b[0] npc_wrapper nexus message start/end out pin 0 o 0011-1111 - reserved - - f[10] mscr[90] 0000 (default) gpio[90] siul2-gpio[90] general purpose io f[10] i/o 24 29 k2 0001 - reserved - - 0010 evto_b npc_wrapper nexus event out pin o 0011-1111 - reserved - - f[11] mscr[91] 0000 (default) gpio[91] siul2-gpio[91] general purpose io f[11] i/o 25 30 l2 0001 - reserved - - 0010 evti_in npc_wrapper nexus event in pin i 0011-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 37 f[12] mscr[92] 0000 (default) gpio[92] siul2-gpio[92] general purpose io f[12] i/o 106 130 d17 0001 etc3 etimer_1 etimer_1 input/output data channel 3 i/o 0010-0011 - reserved - - 0100 a1 flexpwm_1 flexpwm_1 channel a input 1 i/o 0101-1111 - reserved - - imcr[109] 0001 a1 flexpwm_1 flexpwm_1 channel a input 1 i imcr[203] 0001 req30 siul2 siul2 external interrupt source 30 i f[13] mscr[93] 0000 (default) gpio[93] siul2-gpio[93] general purpose io f[13] i/o 112 137 a15 0001 etc4 etimer_1 etimer_1 input/output data channel 4 i/o 0010-0011 - reserved - - 0100 b1 flexpwm_1 flexpwm_1 channel b input/output 1 i/o 0101-1111 - reserved - - imcr[110] 0001 b1 flexpwm_1 flexpwm_1 channel b input 1 i imcr[204] 0001 req31 siul2 siul2 external interrupt source 31 i f[14] mscr[94] 0000 (default) gpio[94] siul2-gpio[94] general purpose io f[14] i/o 115 142 d12 0001 txd lin1 linflexd 1 transmit pin o 0010 txd can2 can 2 transmit pin o 0011-1111 - reserved - - f[15] mscr[95] 0000 (default) gpio[95] siul2-gpio[95] general purpose io f[15] i/o 113 140 a13 0001 - reserved - - 0010-1111 - reserved - - imcr[166] 0011 rxd lin1 lin1 rxd i imcr[34] 0001 rxd can2 can2 rxd i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 38 g[2] mscr[98] 0000 (default) gpio[98] siul2-gpio[98] general purpose io g[2] i/o 102 126 f17 0001 x2 flexpwm_0 flexpwm_0 auxiliary input/output 1 i/o 0010 cs1 dspi1 dspi 1 peripheral chip select 1 o 0011-1111 - reserved - - g[3] mscr[99] 0000 (default) gpio[99] siul2-gpio[99] general purpose io g[3] i/o 104 128 e16 0001 a2 flexpwm_0 flexpwm_0 channel a input/output 2 i/o 0010-1111 - reserved - - imcr[63] 0010 etc4 etimer_0 etimer_0 input data channel 4 i g[4] mscr[100] 0000 (default) gpio[100] siul2-gpio[100] general purpose io g[4] i/o 100 124 f16 0001 b2 flexpwm_0 flexpwm_0 channel b input/output 2 i/o 0010-1111 - reserved - - imcr[64] 0010 etc5 etimer_0 etimer_0 input data channel 5 i g[5] mscr[101] 0000 (default) gpio[101] siul2-gpio[101] general purpose io g[5] i/o 85 107 m17 0001 x3 flexpwm_0 flexpwm_0 auxiliary input/output 3 i/o 0010 cs3 dspi2 dspi 2 peripheral chip select 3 o 0011-1111 - reserved - - g[6] mscr[102] 0000 (default) gpio[102] siul2-gpio[102] general purpose io g[6] i/o 98 122 g17 0001 a3 flexpwm_0 flexpwm_0 channel a input/output 3 i/o 0010-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 39 g[7] mscr[103] 0000 (default) gpio[103] siul2-gpio[103] general purpose io g[7] 6 i/o 83 104 m16 0001 b3 flexpwm_0 flexpwm_0 channel b input/output 3 i/o 0010 - reserved - - 0011 - reserved - - 0100-1111 - reserved - - g[8] mscr[104] 0000 (default) gpio[104] siul2-gpio[104] general purpose io g[8] i/o 81 98 n14 0001 fr_dbg[0] flexray flexray debug strobe signal 0 o 0010 cs1 dspi0 dspi 0 peripheral chip select 1 o 0011-1111 - reserved - - imcr[194] 0001 req21 siul2 siul2 external interrupt source 21 i imcr[83] 0011 fault0 flexpwm_0 flexpwm_0 fault input 0 i g[9] mscr[105] 0000 (default) gpio[105] siul2-gpio[105] general purpose io g[9] i/o 79 96 p14 0001 fr_dbg[1] flexray flexray debug strobe signal 1 o 0010 cs1 dspi1 dspi 1 peripheral chip select 1 o 0011-1111 - reserved - - imcr[202] 0001 req29 siul2 siul2 external interrupt source 29 i imcr[84] 0011 fault1 flexpwm_0 flexpwm_0 fault input 1 i g[10] mscr[106] 0000 (default) gpio[106] siul2-gpio[106] general purpose io g[10] i/o 77 94 r17 0001 fr_dbg[2] flexray flexray debug strobe signal 2 o 0010 cs3 dspi2 dspi 2 peripheral chip select 3 o 0011-1111 - reserved - - imcr[85] 0010 fault2 flexpwm_0 flexpwm_0 fault input 2 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 40 g[11] mscr[107] 0000 (default) gpio[107] siul2-gpio[107] general purpose io g[11] i/o 75 92 t15 0001 fr_dbg[3] flexray flexray debug strobe signal 3 o 0010-1111 - reserved - - imcr[86] 0011 fault3 flexpwm_0 flexpwm_0 fault input 3 i h[4] mscr[116] 0000 (default) gpio[116] siul2-gpio[116] gener al purpose io h[4] i/o 6 f4 0001 x0 flexpwm_1 flexpwm_1 auxiliary input/output 0 i/o 0010 etc0 etimer_2 etimer_2 input/output data channel 0 i/o 0011-1111 - reserved - - h[5] mscr[117] 0000 (default) gpio[117] siul2-gpio[117] gener al purpose io h[5] i/o 7 f3 0001 a0 flexpwm_1 flexpwm_1 channel a input/output 0 i/o 0010 - reserved - - 0011 cs4 dspi0 dspi 0 peripheral chip select 4 o 0100-1111 - reserved - - imcr[105] 0010 a0 flexpwm_1 flexpwm_1 channel a input 0 i h[6] mscr[118] 0000 (default) gpio[118] siul2-gpio[118] general purpose io h[6] i/o 138 c13 0001 b0 flexpwm_1 flexpwm_1 channel b input/output 0 i/o 0010 - reserved - - 0011 cs5 dspi0 dspi 0 peripheral chip select 5 o 0100-1111 - reserved - - imcr[106] 0010 b0 flexpwm_1 flexpwm_1 channel b input 0 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 41 h[7] mscr[119] 0000 (default) gpio[119] siul2-gpio[119] gener al purpose io h[7] i/o 12 f2 0001 x1 flexpwm_1 flexpwm_1 auxiliary input/output 1 i/o 0010 etc1 etimer_2 etimer_2 input/output data channel 1 i/o 0011-1111 - reserved - - h[8] mscr[120] 0000 (default) gpio[120] siul2-gpio[120] gener al purpose io h[8] i/o 21 l1 0001 a1 flexpwm_1 flexpwm_1 channel a input/output 1 i/o 0010 - reserved - - 0011 cs6 dspi0 dspi 0 peripheral chip select 6 o 0100-1111 - reserved - - imcr[109] 0010 a1 flexpwm_1 flexpwm_1 channel a input 1 i h[9] mscr[121] 0000 (default) gpio[121] siul2-gpio[121] general purpose io h[9] i/o 139 b13 0001 b1 flexpwm_1 flexpwm_1 channel b input/output 1 i/o 0010 - reserved - - 0011 cs7 dspi0 dspi 0 peripheral chip select 7 o 0100-1111 - reserved - - imcr[110] 0010 b1 flexpwm_1 flexpwm_1 channel b input 1 i h[10] mscr[122] 0000 (default) gpio[122] siul2-gpio[122] gener al purpose io h[10] i/o c7 0001 x2 flexpwm_1 flexpwm_1 auxiliary input/output 2 i/o 0010 etc2 etimer_2 etimer_2 input/output data channel 2 i/o 0011-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 42 h[11] mscr[123] 0000 (default) gpio[123] siul2-gpio[123] gener al purpose io h[11] i/o 150 c9 0001 a2 flexpwm_1 flexpwm_1 channel a input/output 2 i/o 0010-1111 - reserved - - imcr[112] 0010 a2 flexpwm_1 flexpwm_1 channel a input 2 i h[12] mscr[124] 0000 (default) gpio[124] siul2-gpio[124] gener al purpose io h[12] i/o 153 a7 0001 b2 flexpwm_1 flexpwm_1 channel b input/output 2 i/o 0010-1111 - reserved - - imcr[113] 0010 b2 flexpwm_1 flexpwm_1 channel b input 2 i h[13] mscr[125] 0000 (default) gpio[125] siul2-gpio[125] gener al purpose io h[13] i/o a14 0001 x3 flexpwm_1 flexpwm_1 auxiliary input/output 3 i/o 0010 etc3 etimer_2 etimer_2 input/output data channel 3 i/o 0011-1111 - reserved - - h[14] mscr[126] 0000 (default) gpio[126] siul2-gpio[126] general purpose io h[14] i/o 89 p13 0001 a3 flexpwm_1 flexpwm_1 channel a input/output 3 i/o 0010 etc4 etimer_2 etimer_2 input/output data channel 4 i/o 0011-1111 - reserved - - h[15] mscr[127] 0000 (default) gpio[127] siul2-gpio[127] general purpose io h[15] i/o 133 c17 0001 b3 flexpwm_1 flexpwm_1 channel b input/output 3 i/o 0010 etc5 etimer_2 etimer_2 input/output data channel 5 i/o 0011-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 43 i[0] mscr[128] 0000 (default) gpio[128] siul2-gpio[128] gener al purpose io i[0] i/o 155 c6 0001 etc0 etimer_2 etimer_2 input/output data channel 0 i/o 0010 cs4 dspi0 dspi 0 peripheral chip select 4 o 0011-1111 - reserved - - imcr[100] 0001 fault0 flexpwm_1 flexpwm_1 fault input 0 i i[1] mscr[129] 0000 (default) gpio[129] siul2-gpio[129] gener al purpose io i[1] i/o 44 t3 0001 etc1 etimer_2 etimer_2 input/output data channel 1 i/o 0010 cs5 dspi0 dspi 0 peripheral chip select 5 o 0011-1111 - reserved - - imcr[101] 0001 fault1 flexpwm_1 flexpwm_1 fault input 1 i i[2] mscr[130] 0000 (default) gpio[130] siul2-gpio[130] general purpose io i[2] i/o 146 d11 0001 etc2 etimer_2 etimer_2 input/output data channel 2 i/o 0010 cs6 dspi0 dspi 0 peripheral chip select 6 o 0011-1111 - reserved - - imcr[102] 0001 fault2 flexpwm_1 flexpwm_1 fault input 2 i i[3] mscr[131] 0000 (default) gpio[131] siul2-gpio[131] general purpose io i[3] i/o 147 a10 0001 etc3 etimer_2 etimer_2 input/output data channel 3 i/o 0010 cs7 dspi0 dspi 0 peripheral chip select 7 o 0011 ext_tgr ctu_0 ctu0 external trigger output o 0100-1111 - reserved - - imcr[103] 0001 fault3 flexpwm_1 flexpwm_1 fault input 3 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 44 rdy_b /i[4] mscr[132] 0000 (default) gpio[132] siul2-gpio[132] gener al purpose io i[4] i/o j2 0001 - reserved - - 0010 nex_rdy_b npc_wrapper nexus data ready for transfer (rdy_b) o 0011-1111 - reserved - - i[5] mscr[133] 0000 (default) gpio[133] siul2-gpio[133] general purpose io i[5] 7 i/o 102 n15 0001 txd can2 can 2 transmit pin o 0010 - reserved - - 0011 - reserved - o 0100-1111 - reserved - - i[6] mscr[134] 0000 (default) gpio[134] siul2-gpio[134] general purpose io i[6] 8 i/o 103 m15 0001 - reserved - - 0010 - reserved - - 0011 - reserved - i 0100-1111 - reserved - - imcr[34] 0010 rxd can2 can 2 receive pin i i[7] mscr[135] 0000 (default) gpio[135] siul2-gpio[135] gener al purpose io i[7] i/o 3 d2 0001 lfast_ref_c lk mc_cgm sipi lfast reference clock - 0010-1111 - reserved - - imcr[717 0010 sent_rx[0] sent0 sent 0 receiver channel 0 i i[8] mscr[136] 0000 (default) gpio[136] siul2-gpio[136] gener al purpose io i[8] i/o k4 0001 - reserved - - 0010-1111 - reserved - - imcr[213] 0010 sent_rx[0] sent1 sent 1 receiver channel 0 i i[9] mscr[137] 0000 (default) gpio[137] siul2-gpio[137] gener al purpose io i[9] i/o l3 0001 etc4 etimer_2 etimer_2 input/output data channel 4 i/o 0010-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 45 i[10] mscr[138] 0000 (default) gpio[138] siul2-gpio[138] gener al purpose io i[10] i/o m3 0001 etc5 etimer_2 etimer_2 input/output data channel 5 i/o 0010-1111 - reserved - - i[11] mscr[139] 0000 (default) gpio[139] siul2-gpio[139] gener al purpose io i[11] i/o u3 0001 - reserved - - 0010-1111 - reserved - - imcr[206] 0001 sent_rx[1] sent0 sent 0 receiver channel 1 i i[12] mscr[140] 0000 (default) gpio[140] siul2-gpio[140] gener al purpose io i[12] i/o p5 0001 - reserved - - 0010-1111 - reserved - - imcr[214] 0001 sent_rx[1] sent1 sent 1 receiver channel 1 i i[13] mscr[141] 0000 gpio[141] siul2-gpio[141] gener al purpose io i[13] i/o p6 0001 ext_tgr ctu_1 ctu1 external trigger output i/o 0010-1111 - reserved - - i[14] mscr[142] 0000 (default) gpio[142] siul2-gpio[142] gener al purpose io i[14] i/o c10 0001 cs0 dspi3 dspi 3 peripheral chip select 0 o 0010-1111 - reserved - - i[15] mscr[143] 0000 (default) gpio[143] siul2-gpio[143] gener al purpose io i[15] i/o c1 0001 sck dspi3 dspi 3 serial clock (output) i/o 0010-1111 - reserved - - j[0] mscr[144] 0000 (default) gpio[144] siul2-gpio[144] gener al purpose io j[0] i/o c2 0001 sout dspi3 dspi 3 serial data out o 0010-1111 - reserved - - table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 46 j[1] mscr[145] 0000 (default) gpio[145] siul2-gpio[145] gener al purpose io j[1] i/o a12 0001 - reserved - - 0010-1111 - reserved - - imcr[50] 0001 sin dspi3 dspi 3 serial data input i j[2] mscr[146] 0000 (default) gpio[146] siul2-gpio[146] gener al purpose io j[2] i/o c11 0001 cs1 dspi3 dspi 3 peripheral chip select 1 o 0010-1111 - reserved - - j[3] mscr[147] 0000 (default) gpio[147] siul2-gpio[147] gener al purpose io j[3] i/o b15 0001 cs2 dspi3 dspi 3 peripheral chip select 2 o 0010-1111 - reserved - - j[4] mscr[148] 0000 (default) gpio[148] siul2-gpio[148] gener al purpose io j[4] i/o d13 0001 cs3 dspi3 dspi 3 peripheral chip select 3 o 0010-1111 - reserved - - imcr[39] 0001 ext_in ctu_1 ctu 1 external trigger input i j[5] mscr[149] 0000 (default) gpi[149] 3 adc2_adc3_a n[0] siul2-gpi[149] general purpose input j[5] i 64 p8 0001 - reserved - - 0010-1111 - reserved - - imcr[206] 0010 sent_rx[1] sent0 sent 0 receiver channel 1 i j[6] mscr[150] 0000 (default) gpi[150] 3 adc2_adc3_a n[1] siul2-gpi[150] general purpose input j[6] i 65 p9 0001 - reserved - - 0010-1111 - reserved - - imcr[214] 0010 sent_rx[1] sent1 sent 1 receiver channel 1 i table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 47 j[7] mscr[151] 0000 (default) gpi[151] 3 adc2_adc3_a n[2] siul2-gpi[151] general purpose input j[7] i 66 p10 0001 - reserved - - 0010-1111 - reserved - - j[8] mscr[152] 0000 (default) gpio[152] siul2-gpio[152] general purpose io j[8] i/o 95 119 g16 0001 etc4 etimer_2 etimer_2 input/output data channel 4 i/o 0010 etc2 etimer_2 etimer_2 input/output data channel 2 - 0011-1111 - reserved - - imcr[34] 0011 rxd can2 can 2 receive pin i j[9] mscr[153] 0000 (default) gpio[153] siul2-gpio[153] general purpose io j[9] i/o 16 20 k1 0001 etc5 etimer_2 etimer_2 input/output data channel 5 i/o 0010 nex_rdy_b npc nexus data ready for transfer (rdy_b) o 0011-1111 - reserved - - imcr[39] 0010 ext_in ctu_1 ctu_1 external trigger input i notes: 1 (default) = alt mode configuration after reset. 2 changing b[5] configuration during deb ug might impact availability of tdi. 3 adc analog input. program corresponding mscr apc bit and enable adc to switch-on analog input path. see table 13 for details. 4 shared with sipi lfast transmit pad sipi_t xp. alternative modes and gpio must be dis abled (obe=0, ibe=0) if port is used for sipi lfast. 5 sine wave generator (swg) output if swg is enabled. see table 13 for details. 6 shared with sipi lfast receive pad sipi_rxp . alternative modes and gpio must be disabl ed (obe=0, ibe=0) if port is used for sipi lfast. 7 shared with sipi lfast transmit pad sipi_txn . alternative modes and gpio must be disabled (obe=0, ibe=0) if port is used for sipi lfast. 8 shared with sipi lfast receive pad sipi_rxn. alternative modes an d gpio must be disabled (obe=0, ibe=0) if port is used for sipi lfast. table 7. pin muxing (continued) port pin siul2 mscr/ imcr number mscr/ imcr sss value signal module short signal description dir lqfp144 lqfp176 bga257
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 48 table 8 list ports that are not implemented. the co rresponding control and data registers are not implemented. any attempt to access unimplemented mscrs generates a bus error. th e read value from unimplemented ports must be masked in cas e of parallel port accesses. 2.2.6 peripheral pin muxing the following table describes th e peripheral muxing capa bilities of the MPC5744P. see the device reference manual for ms cr register addresses. table 8. ports - not implemented port name port index c 3,8,9 d 15,13 e 1,3,8 f1,2 g0,1 j[15:12] h2,3 table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions flexcan_0 rxd imcr[32] 0000_0000 (default) 1 -disable 0000_0001 i/o-pad a[15] 0000_0010 i/o-pad b[1] 0000_0011-1 111_1111 - reserved flexcan_1 rxd imcr[33] 0000_0000 (default) -disable 0000_0001 i/o-pad a[15] 0000_0010 i/o-pad b[1] 0000_0011-1 111_1111 - reserved
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 49 flexcan_2 rxd imcr[34] 0000_0000 (default) -disable 0000_0001 i/o-pad f[15] 0000_0010 i/o-pad i[6] 0000_0011 i/o-pad j[8] 0000_0100-1 111_1111 - reserved ctu_0 ext_in imcr[38] 0000_0000 (default) -disable 0000_0001 i/o-pad c[13] 0000_0010 i/o-pad c[15] 0000_0011-1 111_1111 - reserved ctu_1 ext_in imcr[39] 0000_0000 (default) -disable 0000_0001 i/o-pad j[4] 0000_0010 i/o-pad j[9] 0000_0011-1 111_1111 - reserved dspi_0 sin imcr[41] 0000_0000 (default) -disable 0000_0001 i/o-pad c[7] 0000_0010-1 111_1111 - reserved dspi_1 sin imcr[44] 0000_0000 (default) -disable 0000_0001 i/o-pad a[8] 0000_0010-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 50 dspi_2 sin imcr[47] 0000_0000 (default) -disable 0000_0001 i/o-pad a[13] 0000_0010 i/o-pad a[2] 0000_0011-1 111_1111 - reserved dspi_3 sin imcr[50] 0000_0000 (default) -disable 0000_0001 i/o-pad j[1] 0000_0010-1 111_1111 - reserved etimer_0 etc0 imcr[59] 0000_0000 (default) -disable 0000_0001 i/o-pad d[10] 0000_0010 i/o-pad a[0] 0000_0011-1 111_1111 - reserved etimer_0 etc1 imcr[60] 0000_0000 (default) -disable 0000_0001 i/o-pad d[11] 0000_0010 i/o-pad a[1] 0000_0011-1 111_1111 - reserved etimer_0 etc2 imcr[61] 0000_0000 (default) -disable 0000_0001 i/o-pad f[0] 0000_0010 i/o-pad a[2] 0000_0011-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 51 etimer_0 etc3 imcr[62] 0000_0000 (default) -disable 0000_0001 i/o-pad d[14] 0000_0010 i/o-pad a[3] 0000_0011-1 111_1111 - reserved etimer_0 etc4 imcr[63] 0000_0000 (default) -disable 0000_0001 i/o-pad b[14] 0000_0010 i/o-pad g[3] 0000_0011 i/o-pad a[4] 0000_0100 i/o-pad c[11] 0000_0101-1 111_1111 - reserved etimer_0 etc5 imcr[64] 0000_0000 (default) -disable 0000_0001 i/o-pad b[8] 0000_0010 i/o-pad g[4] 0000_0011 i/o-pad c[12] 0000_0100 i/o-pad e[13] 0000_0101-1 111_1111 - reserved flexpwm_0 fault0 imcr[83] 0000_0000 (default) -disable 0000_0001 i/o-pad a[9] 0000_0010 i/o-pad a[13] 0000_0011 i/o-pad g[8] 0000_0100-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 52 flexpwm_0 fault1 imcr[84] 0000_0000 (default) -disable 0000_0001 i/o-pad c[10] 0000_0010 i/o-pad d[6] 0000_0011 i/o-pad g[9] 0000_0100-1 111_1111 - reserved flexpwm_0 fault2 imcr[85] 0000_0000 (default) -disable 0000_0001 i/o-pad d[5] 0000_0010 i/o-pad g[10] 0000_0011-1 111_1111 - reserved flexpwm_0 fault3 imcr[86] 0000_0000 (default) -disable 0000_0001 i/o-pad c[5] 0000_0010 i/o-pad d[8] 0000_0011 i/o-pad g[11] 0000_0100-1 111_1111 - reserved flexpwm_0 ext_sync imcr[87] 0000_0000 (default) -disable 0000_0001 i/o-pad c[13] 0000_0010 i/o-pad c[15] 0000_0011-1 111_1111 - reserved flexpwm_1 fault0 imcr[100] 0000_0000 (default) -disable 0000_0001 i/o-pad i[0] 0000_0010-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 53 flexpwm_1 fault1 imcr[101] 0000_0000 (default) -disable 0000_0001 i/o-pad i[1] 0000_0010-1 111_1111 - reserved flexpwm_1 fault2 imcr[102] 0000_0000 (default) -disable 0000_0001 i/o-pad i[2] 0000_0010-1 111_1111 - reserved flexpwm_1 fault3 imcr[103] 0000_0000 (default) -disable 0000_0001 i/o-pad i[3] 0000_0010-1 111_1111 - reserved flexpwm_1 a0 imcr[105] 0000_0000 (default) -disable 0000_0001 i/o-pad c[13] 0000_0010 i/o-pad h[5] 0000_0011-1 111_1111 - reserved flexpwm_1 b0 imcr[106] 0000_0000 (default) -disable 0000_0001 i/o-pad c[14] 0000_0010 i/o-pad h[6] 0000_0011-1 111_1111 - reserved flexpwm_1 a1 imcr[109] 0000_0000 (default) -disable 0000_0001 i/o-pad f[12] 0000_0010 i/o-pad h[8] 0000_0011-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 54 flexpwm_1 b1 imcr[110] 0000_0000 (default) -disable 0000_0001 i/o-pad f[13] 0000_0010 i/o-pad h[9] 0000_0011-1 111_1111 - reserved flexpwm_1 a2 imcr[112] 0000_0000 (default) -disable 0000_0001 i/o-pad a[4] 0000_0010 i/o-pad h[11] 0000_0011-1 111_1111 - reserved flexpwm_1 b2 imcr[113] 0000_0000 -disable 0000_0001 i/o-pad e[14] 0000_0010 i/o-pad h[12] 0000_0011-1 111_1111 - reserved flexray fr_a_rx imcr[136] 0000_0000 (default) -disable 0000_0001 i/o-pad d[1] 0000_0010-1 111_1111 - reserved flexray fr_b_rx imcr[137] 0000_0000 (default) -disable 0000_0001 i/o-pad d[2] 0000_0010-1 111_1111 - reserved lin_0 rxd imcr[165] 0000_0000 (default) -disable 0000_0001 i/o-pad b[3] 0000_0010 i/o-pad b[7] 0000_0011-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 55 lin_1 rxd imcr[166] 0000_0000 (default) -disable 0000_0001 i/o-pad b[13] 0000_0010 i/o-pad d[12] 0000_0011 i/o-pad f[15] 0000_0100-1 111_1111 - reserved mc_rgm abs1 imcr[169] 0000_0000 (default) i/o-pad a[2] 0000_0001 -disable 0000_0010-1 111_1111 - reserved mc_rgm abs2 imcr[171] 0000_0000 (default) i/o-pad a[3] 0000_0001 -disable 0000_0010-1 111_1111 - reserved mc_rgm fab imcr[172] 0000_0000 (default) i/o-pad a[4] 0000_0001 -disable 0000_0010-1 111_1111 - reserved siul req0 imcr[173] 0000_0000 (default) -disable 0000_0001 i/o-pad a[0] 0000_0010-1 111_1111 - reserved siul req1 imcr[174] 0000_0000 (default) -disable 0000_0001 i/o-pad a[1] 0000_0010-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 56 siul req2 imcr[175] 0000_0000 (default) -disable 0000_0001 i/o-pad a[2] 0000_0010-1 111_1111 - reserved siul req3 imcr[176] 0000_0000 (default) -disable 0000_0001 i/o-pad a[3] 0000_0010-1 111_1111 - reserved siul req4 imcr[177] 0000_0000 (default) -disable 0000_0001 i/o-pad a[4] 0000_0010-1 111_1111 - reserved siul req5 imcr[178] 0000_0000 (default) -disable 0000_0001 i/o-pad a[5] 0000_0010-1 111_1111 - reserved siul req6 imcr[179] 0000_0000 (default) -disable 0000_0001 i/o-pad a[6] 0000_0010-1 111_1111 - reserved siul req7 imcr[180] 0000_0000 (default) -disable 0000_0001 i/o-pad a[7] 0000_0010-1 111_1111 - reserved siul req8 imcr[181] 0000_0000 (default) -disable 0000_0001 i/o-pad a[8] 0000_0010-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 57 siul req9 imcr[182] 0000_0000 (default) -disable 0000_0001 i/o-pad a[10] 0000_0010-1 111_1111 - reserved siul req10 imcr[183] 0000_0000 (default) -disable 0000_0001 i/o-pad a[11] 0000_0010-1 111_1111 - reserved siul req11 imcr[184] 0000_0000 (default) -disable 0000_0001 i/o-pad a[12] 0000_0010-1 111_1111 - reserved siul req12 imcr[185] 0000_0000 (default) -disable 0000_0001 i/o-pad a[13] 0000_0010-1 111_1111 - reserved siul req13 imcr[186] 0000_0000 (default) -disable 0000_0001 i/o-pad a[14] 0000_0010-1 111_1111 - reserved siul req14 imcr[187] 0000_0000 (default) -disable 0000_0001 i/o-pad a[15] 0000_0010-1 111_1111 - reserved siul req15 imcr[188] 0000_0000 (default) -disable 0000_0001 i/o-pad b[0] 0000_0010-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 58 siul req16 imcr[189] 0000_0000 (default) -disable 0000_0001 i/o-pad b[1] 0000_0010-1 111_1111 - reserved siul req17 imcr[190] 0000_0000 (default) -disable 0000_0001 i/o-pad b[2] 0000_0010-1 111_1111 - reserved siul req18 imcr[191] 0000_0000 (default) -disable 0000_0001 i/o-pad b[6] 0000_0010-1 111_1111 - reserved siul req19 imcr[192] 0000_0000 (default) -disable 0000_0001 i/o-pad b[14] 0000_0010-1 111_1111 - reserved siul req20 imcr[193] 0000_0000 (default) -disable 0000_0001 i/o-pad b[15] 0000_0010-1 111_1111 - reserved siul req21 imcr[194] 0000_0000 (default) -disable 0000_0001 i/o-pad g[8] 0000_0010-1 111_1111 - reserved siul req22 imcr[195] 0000_0000 (default) -disable 0000_0001 i/o-pad c[4] 0000_0010-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 59 siul req23 imcr[196] 0000_0000 (default) -disable 0000_0001 i/o-pad c[5] 0000_0010-1 111_1111 - reserved siul req24 imcr[197] 0000_0000 (default) -disable 0000_0001 i/o-pad c[6] 0000_0010-1 111_1111 - reserved siul req25 imcr[198] 0000_0000 (default) -disable 0000_0001 i/o-pad e[13] 0000_0010-1 111_1111 - reserved siul req26 imcr[199] 0000_0000 (default) -disable 0000_0001 i/o-pad e[14] 0000_0010-1 111_1111 - reserved siul req27 imcr[200] 0000_0000 (default) -disable 0000_0001 i/o-pad e[15] 0000_0010-1 111_1111 - reserved siul req28 imcr[201] 0000_0000 (default) -disable 0000_0001 i/o-pad f[0] 0000_0010-1 111_1111 - reserved siul req29 imcr[202] 0000_0000 (default) -disable 0000_0001 i/o-pad g[9] 0000_0010-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice pinouts freescale semiconductor 60 siul req30 imcr[203] 0000_0000 (default) -disable 0000_0001 i/o-pad f[12] 0000_0010-1 111_1111 - reserved siul req31 imcr[204] 0000_0000 (default) -disable 0000_0001 i/o-pad f[13] 0000_0010-1 111_1111 - reserved sent_0 sent_rx[0] imcr[205] 0000_0000 (default) -disable 0000_0001 i/o-pad d[5] 0000_0010 i/o-pad i[7] 0000_0011-1 111_1111 - reserved sent_0 sent_rx[1] imcr[206] 0000_0000 (default) -disable 0000_0001 i/o-pad i[11] 0000_0010 i/o-pad j[5] 0000_0011-1 111_1111 - reserved sent_1 sent_rx[0] imcr[213] 0000_0000 (default) -disable 0000_0001 i/o-pad d[7] 0000_0010 i/o-pad i[8] 0000_0011-1 111_1111 - reserved sent_1 sent_rx[1] imcr[214] 0000_0000 (default) -disable 0000_0001 i/o-pad i[12] 0000_0010 i/o-pad j[6] 0000_0011-1 111_1111 - reserved table 9. peripheral muxing destination peripherals destination functions imcr register imcr:sss field value source peripherials source functions
pinouts MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 61 1) (default) = configuration after reset. peripheral muxing example: sss field in imcr register 214: 0x1 i/o-pad i[12] is connected to sent_1 receive input sent_rx[1] sss field in imcr register 214: 0x2 i/o-pad j[6] is connected to sent_1 receive input sent_rx[1]
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 62 3 electrical characteristics 3.1 introduction this section contains detailed information on power c onsiderations, dc/ac electric al characteristics, and ac timing specifications for this device. this device is designed to operate at tbd (design ta rget: 180 mhz or greater). th e electrical specifications are preliminary and are from pr evious designs, design simulations, or initial evaluation. these specifications may not be full y tested or guaranteed at th is early stage of the prod uct life cycle. finalized specifications will be published after complete ch aracterization and device qua lifications have been completed. the ?symbol? column of the electrical parameter a nd timings tables contains an additional column containing ?sr?, ?cc?, ?p?, ?c?, ?t?, or ?d?. ? ?sr? identifies system requireme nts?conditions that must be pr ovided to ensure normal device operation. an example is the input voltage of a voltage regulator. ? ?cc? identifies controller char acteristics?indicating the characteris tics and timing of the signals that the chip provides. ? ?p?, ?c?, ?t?, or ?d? apply only to controller characteristics?specifications that define normal device operation. they specify how e ach characteristic is guaranteed. ? p: parameter is guaranteed by production testing of each individual device. ? c: parameter is guaranteed by design charac terization. measurements are taken from a statistically relevant sample size across process variations. ? t: parameter is guaranteed by design characteri zation on a small sample size from typical devices under typical conditions unless otherwise noted. all valu es are shown in the typical (?typ?) column are within this category. ? d: parameters are derived mainly from simulations. note the specification classifications in th e ?symbol? column of the tables are preliminary and may change in fu ture releases of this document. 3.2 absolute maximum ratings table 10. absolute maximum ratings 1 symbol parameter conditions min max 2 unit v dd_hv_pmu sr 3.3 v voltage regulator supply voltage ? ?0.3 4.0 3, 4 v v dd_hv_iox sr 3.3 v input/output supply voltage ? ?0.3 3.63 3, 4 v v ss_hv_iox sr input/output ground voltage ? ?0.1 0.1 v v dd_hv_fla sr 3.3 v flash supply voltage ? ?0.3 3.63 3, 4 v v ss_hv_fla sr flash memory ground ? ?0.1 0.1 v v dd_hv_osc sr 3.3 v crystal oscillator amplifier supply voltage ? ?0.3 4.0 3, 4 v
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 63 3.3 recommended operating conditions v ss_hv_osc sr 3.3 v crystal oscillator amplifier reference voltage ? ?0.1 0.1 v v dd_hv_adre0 5 v dd_hv_adre1 sr 3.3 v / 5.0 v adc_0 high reference voltage 3.3 v / 5.0 v adc_1 high reference voltage ??0.36.0v v ss_hv_adre0 v ss_hv_adre1 sr adc_0 ground and low reference voltage adc_1 ground and low reference voltage ??0.10.1v v dd_hv_adv sr 3.3 v adc supply voltage ? ?0.3 4.0 3, 4 v v ss_hv_adv sr 3.3 v adc supply ground ? ?0.1 0.1 v tv dd sr supply ramp rate ? 0.5 3.0 10 6 (3.0 v / s) v/s v ina sr voltage on analog pin with respect to ground (v ss_hv_io x ) ??0.36.0v v in sr voltage on any digital pin with respect to ground (v ss_hv_io x ) relative to v dd_hv_iox ?0.3 v dd_hv_iox +0.3 6 v i injpad sr injected input current on any pin during overload condition ??1010ma i injsum sr absolute sum of all injected input currents during overload condition ??5050 ma t stg sr storage temperature ? ?55 165 c notes: 1 functional operating conditions are given in the dc electrical characteristics. absolute maxi mum ratings are stress ratings only, and functional operation at the maxima is not guaranteed. stress beyond the listed maxima may affect device reliability or cause permanent damage to the device. 2 absolute maximum voltages are currently maximum burn-in vo ltages. absolute maximum specifications for device stress have not yet been determined. 3 5.3 v for 10 hours cumulative over lifetime of device, 3.3 v +10% for time remaining. 4 voltage overshoots during a high-to-low or low-to-hig h transition must not exceed 10 seconds per instance. 5 v dd_hv_adre0 and v dd_hv_adre1 cannot be operated at different voltages, and need to be supplied by the same voltage source. 6 only when v dd_hv_iox < 3.63 v. table 11. recommended operating conditions (v dd_hv_xx = 3.3 v) symbol parameter c onditions min max 1 unit v dd_hv_pmu sr 3.3 v voltage regulator supply voltage ? 3.15 3.6 v v dd_hv_iox sr 3.3 v input/output supply voltage ? 3.15 3.6 v v ss_hv_iox sr input/output ground voltage ? 0 0 v v dd_hv_fla sr 3.3 v flash supply voltage ? 3.15 3.6 v v ss_hv_fla sr flash memory ground ? 0 0 v v dd_hv_osc sr 3.3 v crystal oscillator amplifier supply voltage ? 3.15 3.6 v v ss_hv_osc sr 3.3 v crystal oscillator amplifier reference voltage ? 0 0 v table 10. absolute maximum ratings 1 (continued) symbol parameter conditions min max 2 unit
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 64 3.4 thermal characteristics v dd_hv_adre0 2 v dd_hv_adre1 sr 3.3 v / 5.0 v adc_0 high reference voltage 3.3 v / 5.0 v adc_1 high reference voltage ? 3.0 to 5.5 v v dd_hv_adv sr 3.3 v adc supply voltage ? 3.15 3.6 v v ss_hv_adre0 2 v ss_hv_adre1 sr adc_0 ground and low reference voltage adc_1 ground and low reference voltage ?00v v ss_hv_adv sr 3.3 v adc supply ground ? 0 0 v v dd_lv_cor sr core supply, 1.25 v +/-5% ? 1.19 1.32 v v dd_lv_cor x sr internal supply voltage ? ? ? v v ss_lv_cor x 3 sr internal reference voltage ? 0 0 v v dd_lv_pll sr internal pll supply voltage ? 1.19 1.32 v v ss_lv_pll 3 sr internal pll reference voltage ? 0 0 v v dd_lv_nexus sr aurora lvds supply voltage ? 1.19 1.32 v v ss_lv_nexus sr aurora lvds supply ground ? 0 0 v v dd_lv_lfast sr lfast supply voltage ? 1.19 1.32 v v ss_lv_lfast sr lfast supply ground ? 0 0 v t a sr ambient temperature under bias f cpu tbd 3 ?40 tbd c t j sr junction temperature under bias ? ?40 165 c notes: 1 full functionality cannot be guaranteed when voltage drops below 3.0 v. in particular, adc electrical characteristics and i/os dc electrical specification may not be guaranteed. 2 v dd_hv_adre0 and v dd_hv_adre1 cannot be operated at different voltages, and need to be supplied by the same voltage source. 3 maximum frequency is tbd (design target: 180 mhz or greater). table 12. thermal characteristics for 144 lqfp package 1 notes: 1 thermal characteristics are targets based on simulation that are subject to change per device characterization. symbol c parameter conditions value unit r ja cc d thermal resistance, junc tion-to-ambient natural convection 2 2 junction-to-ambient thermal resistance determined per je dec jesd51-3 and jesd51-6. thermal test board meets jedec specification for this package. single layer board ? 1s 42 c/w four layer board ? 2s2p 34 r jma cc d thermal resistance, junction-to-ambient forced convection at 200 ft/min single layer board ? 1s 34 c/w four layer board ? 2s2p 28 r jb cc d thermal resistance junction-to-board 3 ?22c/w r jc cc d thermal resistance junction-to-case 4 ?8c/w jt cc d junction-to-package-top natural convection 5 ?3c/w table 11. recommended operating conditions (v dd_hv_xx = 3.3 v) (continued) symbol parameter c onditions min max 1 unit
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 65 3 junction-to-board thermal resistance determined per jedec jesd51-8. thermal test board meets jedec specification for the specified package. 4 junction-to-case at the top of the pa ckage determined using mil-std 883 method 1012.1. the cold plate temperature is used for the case temperature. r eported value includes the thermal resistance of the interface layer. 5 thermal characterization parameter indicating the temperature difference between the package top and the junction temperature per jedec jesd51-2. when greek letters are not available, the therma l characterization parameter is written as psi-jt. table 13. thermal characteristics for 176 lqfp-ep package 1 symbol parameter conditions value unit r ja d thermal resistance, junction-to-ambient natural convection 2 single layer board ? 1s 43 c/w four layer board ? 2s2p 24 r jma d thermal resistance, junction-to-ambient forced convection at 200 ft/min single layer board ? 1s 34 c/w four layer board ? 2s2p 18 r jb d thermal resistance junction-to-board 3 ?12c/w r jc d thermal resistance junction-to-case top 4 ?10c/w jt d junction-to-package-top natural convection 5 ?3c/w notes: 1 thermal characteristics are targets based on simulation that are subject to change per device characterization. 2 junction-to-ambient thermal resistance determined pe r jedec jesd51-3 and jesd51-6. thermal test board meets jedec specification for this package. 3 junction-to-board thermal resistance determined pe r jedec jesd51-8. thermal test board meets jedec specification for the specified package. 4 junction-to-case at the top of the package determine d using mil-std 883 method 1012.1. the cold plate temperature is used for the case temp erature. reported value includes the th ermal resistance of the interface layer. 5 thermal characterization parameter indicating the temp erature difference between the package top and the junction temperature per jedec jesd51-2. when greek lett ers are not available, the thermal characterization parameter is written as psi-jt. table 14. thermal characteristics for 257 mapbga package 1 notes: 1 thermal characteristics are targets based on simulation that are subject to change per device characterization. symbol parameter conditions value unit r ja d thermal resistance junction-to-ambient natural convection 2 2 junction-to-ambient thermal resistance determined pe r jedec jesd51-3 and jesd51-6. thermal test board meets jedec specification for this package. single layer board ? 1s 46 c/w four layer board ? 2s2p 26 r jma d thermal resistance, junction-to-ambient forced convection at 200 ft/min single layer board ? 1s 37 c/w four layer board ? 2s2p 22 r jb d thermal resistance junction-to-board 3 3 junction-to-board thermal resistance determined pe r jedec jesd51-8. thermal test board meets jedec specification for the specified package. ?13c/w r jc d thermal resistance junction-to-case 4 ?8c/w jt d junction-to-package-top natural convection 5 ?2c/w
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 66 3.4.1 general notes for specificatio ns at maximum ju nction temperature an estimation of the chip junction temperature, t j , can be obtained from equation 1 : t j =t a +(r ja p d ) eqn. 1 where: t a = ambient temperature for the package ( o c) r ja = junction to ambient thermal resistance ( o c/w) p d = power dissipation in the package (w) the junction to ambient thermal resistance is an i ndustry standard value that provides a quick and easy estimation of thermal performance. unfortunately, there are two valu es in common usage: the value determined on a single layer board and the value obtained on a board with two planes. for packages such as the pbga, these values can be different by a factor of two. which value is cl oser to the application depends on the power dissipated by other components on the board. the value obtained on a single layer board is appropriate for the tightly packed printed circuit board. the va lue obtained on the board with the internal planes is usually appropria te if the board has low power diss ipation and the components are well separated. when a heat sink is us ed, the thermal resistan ce is expressed in equation 2 as the sum of a junction to case thermal resistance and a case to ambient thermal resistance: r ja =r jc + r ca eqn. 2 where: r ja = junction to ambient thermal resistance (c/w) r jc = junction to case thermal resistance (c/w) r ca = case to ambient thermal resistance (c/w) r jc is device related and cannot be influenced by the user. the user c ontrols the thermal environment to change the case to ambient thermal resistance, r ca . for instance, the user can change the size of the heat sink, the air flow around the device, the interface material, the mounti ng arrangement on printed circuit board, or change the thermal dissipation on th e printed circuit board surrounding the device. to determine the junction temperatur e of the device in the application when heat sinks are not used, the thermal characterization parameter ( jt ) can be used to determine th e junction temperature with a measurement of the temperature at the top center of the package case using equation 3 : t j =t t +( jt p d ) eqn. 3 where: 4 junction-to-case at the top of the package determine d using mil-std 883 method 1012.1. the cold plate temperature is used for the case temp erature. reported value includes the th ermal resistance of the interface layer. 5 thermal characterization parameter indicating the temp erature difference between the package top and the junction temperature per jedec jesd51-2. when greek lett ers are not available, the thermal characterization parameter is written as psi-jt.
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 67 t t = thermocouple temperature on top of the package (c) jt = thermal characterizat ion parameter (c/w) p d = power dissipation in the package (w) the thermal characterization parame ter is measured per jesd51-2 spec ification using a 40 gauge type t thermocouple epoxied to the top center of the pack age case. the thermocouple should be positioned so that the thermocouple junction rests on the packag e. a small amount of epoxy is placed over the thermocouple junction and over about 1 mm of wire extending from th e junction. the thermocouple wire is placed flat against the package case to avoid measurement errors caused by cooling effects of the thermocouple wire. 3.4.1.1 references semiconductor equipment and materials international 3081 zanker road san jose, ca 95134 usa (408) 943-6900 mil-spec and eia/jesd (jedec) spec ifications are available from global engineering documents at 800-854-7179 or 303-397-7956. jedec specifications are available on the web at http://www.jedec.org. 1. c.e. triplett and b. joiner, ?an experiment al characterization of a 272 pbga within an automotive engine controller module,? pr oceedings of semitherm, san diego, 1998, pp. 47?54. 2. g. kromann, s. shidore, and s. addison, ?t hermal modeling of a pbga for air-cooled applications,? electr onic packaging and production, pp. 53?58, march 1998. 3. b. joiner and v. adams, ?measurement and si mulation of junction to bo ard thermal resistance and its application in thermal modeling,? pr oceedings of semither m, san diego, 1999, pp. 212?220. 3.5 electromagnetic interference (emi) characteristics the electromagnetic interference (emi) target characteristics are shown in table 16 : ? device configuration, test conditions, and em testing per standard iec61967-2 ? supply voltage of 3.3 v dc ? ambient temperature of 25 c the configuration information referenced in table 16 is explained in table 15 .
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 68 3.6 electrostatic discharge (esd) characteristics electrostatic discharges (a positive th en a negative pulse sepa rated by 1 second) are a pplied to the pins of each sample according to each pin combination. the sa mple size depends on the number of supply pins in the device (3 parts ( n + 1) supply pin). this test conforms to the aec-q100-002/-003/-011 standard. table 15. emi configuration summary configuration name description configuration a ? high emission = all pads have max slew rate, lvds pads running at 40 mhz ? oscillator frequency = 40 mhz ? system bus frequency = 80 mhz ? no pll frequency modulation ? iec level i ( 36 db v) configuration b ? reference emission = pads use min, mid and max slew rates, lvds pads disabled ? oscillator frequency = 40 mhz ? system bus frequency = 80 mhz ? 2% pll frequency modulation ? iec level k( 30 db v) table 16. emi emission testing specifications symbol parameter conditions min typ max unit v eme cc radiated emissions configuration a; frequency range 150 khz?50 mhz ?16?db v configuration a; frequency range 50?150 mhz ?16? configuration a; frequency range 150?500 mhz ?32? configuration a; frequency range 500?1000 mhz ?25? configuration b; frequency range 50?150 mhz ?15? configuration b; frequency range 50?150 mhz ?21? configuration b; frequency range 150?500 mhz ?30? configuration b; frequency range 500?1000 mhz ?24?
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 69 3.7 voltage regulator electrical characteristics the voltage regulator is compos ed of the following blocks: ? high power regulator (external npn to support core current) ? low voltage detector (lvd_ma in_1) for 3.3 v supply to io (v ddio ) ? low voltage detector (lvd_main_2) for 3.3 v supply (v ddreg ) ? low voltage detector (lvd_main_3) for 3.3 v flash supply (v ddflash ) ? low voltage detector (lvd_main_4) for 3.3 v adc supply (v ddadc ) ? low voltage detector (lvd_main_5) for 3.3 v osc supply (v ddosc ) ? low voltage detector (lvd_core) for 1.2 v digital core supply (hpv dd ) ? low voltage detector (lvd_core_bk) for the self-test of lvd_core ? high voltage detector (hvd_core) for 1.2 v digital core supply (hpv dd ) ? high voltage detector (hvd_core_bk) for the self-test of hvd_core. ? power on reset (por) the following bipolar transistors are supported: ? bcp68 from on semiconductor ? njd2873 ? nss20501uw3 table 17. esd ratings 1, 2 notes: 1 all esd testing is in conformity with cdf-aec-q100 stre ss test qualification for automotive grade integrated circuits. 2 a device will be defined as a failure if after exposure to esd pulses the device no longer meets the device specification requirements. complete dc parametric and functional testing shall be performed per applicable device specification at room temper ature followed by hot tem perature, unless specified otherwise in the device specification. no. symbol parameter conditions class max value 3 3 data based on characterization results, not tested in production. unit 1v esd(hbm) sr electrostatic discharge (human body model) t a =25c conforming to aec-q100-002 h1c 2000 v 2v esd(mm) sr electrostatic discharge (machine model) t a =25c conforming to aec-q100-003 m2 200 v 3v esd(cdm) sr electrostatic discharge (charged device model) t a =25c conforming to aec-q100-011 c3a 500 v 750 (corners)
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 70 table 18. voltage regulator electrical specifications symbol c parameter conditions min typ max unit c ld sr ? external decoupling/ stability capacitor min, max values shall be granted with respect to tolerance, voltage, temperature, and aging variations. 10 ?f sr ? combined esr of external capacitor ?0.03 ?0.15 t su cc start-up time after main supply stabilization c ld =10f ? ?2.5ms l bw sr ? bonding inductance 13 nh r bw sr ? bonding wire and pad resistance 0.5 r sd sr ? series resistance of on-chip power grid 0.1 c sd sr ? on-chip power grid to ground capacitance tbd nf c pd sr ? parallel decoupling capacitor per pin, no more than 300 nf total 47 nf r sn sr ? snubber resistor for stability dep. on transistor tbd c sn sr ? snubber capacitor for stability dep. on transistor tbd nf ? sr ? power supply rejection (c ld =10uf) @dc no load @200 khz no load @dc 400 ma @200 khz 400 ma -23 -23 -23 -23 db db db db ? sr ? load current transient i load from 20% to 80% c ld =10f 1.0 s ? cc d supply ramp rate vdd12_core ? 0.01 ? 1 v/ms ? cc d supply ramp rate vdd33_reg ? 25 ? 1000 v/ms ? cc t por vdd12_core 0.98 1.02 1.08 v cc t por vdd33_reg 2.4 2.59 2.76 v cc p lvd_core, lvd_core_bk calibrated (trimm ed) 1.12 1.15 1.18 v cc p hvd_core, hvd_core_bk calibrated (trimm ed) 1.32 1.36 1.40 v cc p lvd_reg calibrated (trimmed) 2.93 3.05 3.13 v cc p lvd_io calibrated (trimmed) 2.93 3.05 3.13 v
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 71 figure 19. core supply decoupling and parasitics cc p lvd_fls calibrated (trimmed) 2.93 3.05 3.13 v cc p lvd_adc calibrated (trimmed) 2.93 3.05 3.13 v cc p lvd_osc calibrated (trimmed) 2.93 3.05 3.13 v cc t hysteresis lvd_core 20 mv cc t hysteresis hvd_core 20 mv cc t hysteresis lvd_xxx 20 mv cc t lvd/hvd trimming 16 steps 5 mv t j cc t junction temperature -40 ? 165 c table 18. voltage regulator electrical specifications (continued) symbol c parameter conditions min typ max unit rsn cld 10u lbw package die cpd 47n rbw cpd 47n lbw rbw lbw rbw rbw lbw cpd 47n cpd 47n rsd csd vdd33_reg bctrl csn
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 72 3.8 dc electrical characteristics the following tables provide dc char acteristics for bidirectional pads: ? table 20 provides output driver charac teristics flexray i/os (sym). ? table 21 provides output driver char acteristics for lfast i/os. note fast ios must be specified only as fast (and not as high current). see table 22 . table 20. flexray (sym) configuration ou tput buffer electrical characteristics 1 notes: 1 please refer to flexray section for parameter dedicated to this interface. symbol c parameter conditions 2 2 v dd_hv_iox = 3.3 v (?5%, +10%), t j = ?40 / 165 c, unless otherwise specified value 3 3 all values need to be confirmed during device validation. unit min typ max r oh_y cc p pmos output impedance sym configuration push pull, i oh = 2 ma, v oh = v dd_hv_iox - (0.28...0.52 v) 35 50 65 r ol_y cc p pmos output impedance sym configuration push pull, i ol = 2 ma, v ol = 0.28...0.52 v 35 50 65 f max_y cc t output frequency sym configuration c l = 20pf (3) , v dd_hv_iox = 3.3 v ?5%, +10% ??50mhz t tr_y cc t transition time output pin sym configuration c l = 20 pf (3) , v dd_hv_iox = 3.3 v ?5%, +10% 1?6ns |t skew_y | cc t difference between rise and fall time ?0?1ns table 21. lfast output buffer electrical characteristics 1 notes: 1 please refer to lfast section for parameter dedicated to this interface. symbol c parameter conditions 2 2 v dd_hv_iox = 3.3 v (?5%, +10%), t j = ?40 / 165 c, unless otherwise specified value 3 3 all values need to be confirmed during device validation. unit min typ max | vo_l | cc t absolute value for differential output voltage swing (terminated) ? 100 200 285 mv v icom_l cc t common mode voltage ? 1.08 1.2 1.32 v t tr_l cc t transition time output pin lvds configuration ? 0.2 ? 1.5 ns
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 73 note: 1. max power supply ramp rate is 100 v / ms 2. measured when pad = 0 v 3. measured when pad = vdde 4. measured when pad is sourcing 2 ma. 5. measured when pad is sinking 2 ma. 6. ioh/iol is derived from spice simulations . these values are not guaranteed by test. table 22. dc electrical specifications symbol c parameter conditions value unit min typ max vdd 1 cc d lv (core) supply voltage ? 1.18 ? 1.32 v vdde 1 sr ? i/o supply voltage ? 3.15 ? 3.6 v vih cc d cmos input buffer high voltage (with hysteresis disabled) ? 0.55 * vdde ? vdde + 0.3 v vil cc d cmos input buffer low voltage (with hysteresis disabled) ? vss - 0.3 ? 0.40 * vdde v vhys cc d cmos input buffer hysteresis ? 0.1 * vdde ? v pull_ioh cc d weak pullup current 2 ? 15 ? 50 ua pull_iol cc d weak pulldown current 3 ? 15 ? 50 ua iinact_d cc d digital pad input leakage current (weak pull inactive) ? -2.5 ? 2.5 ua voh cc d output high voltage 4 ? 0.8 * vdde ? - v vol cc d output low voltage 5 ?-?0.2*vddev ioh_f cc d full drive ioh 6 (ipp_sre[1:0] = 11) ? 18 ? 70 ma iol_f cc d full drive iol 6 (ipp_sre[1:0] = 11) ? 21 ? 120 ma ioh_h cc d half drive ioh 6 (ipp_sre[1:0] = 10) ? 9 ? 35 ma iol_h cc d half drive iol 6 (ipp_sre[1:0] = 10) ? 10.5 ? 60 ma
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 74 3.9 supply current characteristics current consumption data is given in table 23 . these specifications are design targets and are subject to change per device characterization. table 23. current consumption characteristics symbol c parameter conditions 1 min typ max unit i dd_lv_typ +i dd_lv_pll 2 cc p operating current 1.2 v supplies t j =150 c v dd_lv_cor =1.32v ?400matbdma cc c 1.2 v supplies t j =165 c v dd_lv_cor =1.32v ?480ma ? i dd_lv_full +i dd_lv_pll 3 cc c operating current 1.2 v supplies t j =150 c v dd_lv_cor =1.32v ??570mama cc 1.2 v supplies t j =165 c v dd_lv_cor =1.32v ??660ma i dd_lv_bist +i dd_lv_pll cc t operating current 1.2 v supplies during lbist (full lbist configuration) t a =25 c v dd_lv_cor =1.32v ??tbdma cc t 1.2 v supplies t j =150 c v dd_lv_cor =1.32v ??tbd cc t 1.2 v supplies t j =165 c v dd_lv_cor =1.32v ??tbd i dd_lv_stop cc t operating current in v dd stop mode t a =25 c v dd_lv_cor =1.32v ??tbdma cc t t j =55 c v dd_lv_cor =1.32v ??tbd cc p t j =150 c v dd_lv_cor =1.32v ??tbd cc t t j =165 c v dd_lv_cor =1.32v ??tbd i dd_lv_halt cc t operating current in v dd halt mode t a =25 c v dd_lv_cor =1.32v ??tbdma cc t t j =55 c v dd_lv_cor =1.32v ??tbd cc p t j =150 c v dd_lv_cor =1.32v ??tbd cc t t j =165 c v dd_lv_cor =1.32v ??tbd
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 75 3.10 temperature sensor the following table describes the temper ature sensor electrical characteristics. i dd_hv_adv 4,5 cc t operating current t j =150 c 4 adcs operating at 80 mhz v dd_hv_adv =3.6v ??tbdma cc t t j =165 c 4 adcs operating at 80 mhz v dd_hv_adv =3.6v ??tbd i dd_hv_adre 5 cc t operating current t j =150 c adc operating at 80 mhz v dd_hv_adre =3.6v ??tbdma t j =150 c tbd frequency 6 adc operating at 80 mhz v dd_hv_adre =5.5v ??tbd t j =165 c adc operating at 80 mhz v dd_hv_adre =3.6v ??tbd t j =165 c tbd frequency 6 adc operating at 80 mhz v dd_hv_adre =5.5v ??tbd i dd_hv_osc cc t operating current t j =150 c 3.3 v supplies tbd frequency 6 ??tbd a t j =165 c 3.3 v supplies tbd frequency 6 ??tbd i dd_hv_flash cc t operating current t j =150 c 3.3 v supplies tbd frequency 6 ??tbdma t j =165 c 3.3 v supplies tbd frequency 6 ??tbd notes: 1 the content of the conditions column identifies the components that draw the specific current. 2 enabled modules in 'typical mode': two flexcans, adc0/1, ctu, flexpwm, th ree etimers, three dspis, swg, dma, stm, swt, pit (list subject to change). at maximum frequency. i/o supply current excluded. 3 enabled modules in 'full mode': tbd. at ma ximum frequency. i/o supply current excluded. 4 internal structures hold the input voltage less than vdd_hv_a dv + 1.0 v on all pads powered by vdda supplies, if the maximum injection current specification is met (3 ma for all pi ns) and vdda is within the operating voltage specifications. 5 this value is the total current for four adcs. 6 maximum frequency is tbd (desi gn target: 180 mhz or greater). table 23. current consumption characteristics (continued) symbol c parameter conditions 1 min typ max unit
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 76 3.11 main oscillator electrical characteristics the device provides an os cillator/resonator driver. figure 5 describes a simple model of the internal oscillator driver and provides an example of a connection for an oscillator or a resonator. figure 5. crystal oscillator and resonator connection scheme note xtal/extal must not be directly used to drive external circuits. table 24. temperature sensor electrical characteristics symbol c parameter conditions value unit min typ max ? cc c temperature monitoring range ? -40 ? 165 c ? cc c sensitivity ? ? 5.18 ? mv/c ? cc t accuracy t j = -40 to 165 c tbd ? tbd c ? cc c operating current t j = -40 to 165 c ? ? 600 a c l c l crystal xtal extal r p resonator xtal extal device device device xtal extal i r v dd
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 77 figure 6. main oscillator electrical characteristics table 25. main oscillator electrical characteristics symbol c parameter conditions 1 notes: 1 v dd_hv_osc = 3.3 v -5%,+10%, t j = ?40 to +165 c, unless otherwise specified. value unit min typ max f xoschs sr ? oscillator frequency ? 4.0 ? 40.0 mhz g mxoschs cc p oscillator transconductance v dd_hv_osc =3.3v ?5%, +10% tbd tbd tbd ma/v v xoschs cc d oscillation amplitude f osc = 4, 8, 10, 12, 16 mhz tbd v f osc =40mhz tbd v xoschsop cc d oscillation operating point ?tbdv i xoschs cc d oscillator consumption ? tbd ma t xoschssu cc t oscillator start-up time f osc = 4, 8, 10, 12 mhz 2 2 the recommended configuration for maxi mizing the oscillator margin are: xosc_margin = 0 for 4 mhz quartz xosc_margin = 1 for 8/16/40 mhz quartz tbd ms f osc = 16, 40 mhz 2 tbd v ih sr ? input high level cmos schmitt trigger oscillator bypass mode tbd v v il sr ? input low level cmos schmitt trigger oscillator bypass mode tbd v v xoschsop t xoschssu v xtal v xoschs valid internal clock 90% 10% 1/f xoschs mtrans 1 0
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 78 3.12 fmpll electrical characteristics figure 7. pll integration table 26. pll0 electrical characteristics symbol parameter conditions 1 notes: 1 v dd_lv = 1.25 v 5%, t j = -40 / 165 o c unless otherwise specified. value unit min typ max f pll0in sr ? pll0 input clock 2 2 pll0in clock retrieved directly from either internal rc osc or external xosc clock. input characteristics are granted when using internal rcosc or exter nal oscillator is used in functional mode. ?14?44mhz pll0in sr ? pll0 input clock duty cycle 2 ?40?60% f pll0vco cc d pll0 vco frequency ? 600 ? 1250 mhz f pll0phi0 cc d pll0 output clock phi0 ? 4.76 ? 625 mhz f pll0phi1 cc d pll0 output clock phi1 ? 20 ? 156 mhz t pll0lock cc p pll0 lock time ? ? ? 100 s | pll0ltj | cc t pll0 long term jitter f pll0in = 8 mhz (reso- nator) , f pll0phi0 = 40 mhz, 1s ?? 0.1 % f pll0phi0 = 40 mhz, 13 s ??tbd% i pll0 cc c pll0 consumption fine lock state ? ? 5 ma pll0 pll1 rcosc xosc pll0_phi1 pll0_phi0 pll1_phi0
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 79 3.13 internal 16 mhz rc oscill ator electrical characteristics table 27. fmpll1 electrical characteristics symbol c parameter conditions 1 notes: 1 v dd_lv = 1.25 v 5%, t j = -40 / 165 o c unless otherwise specified. value unit min typ max f pll1in sr ? pll1 input clock 2 2 pll1in clock retrieved directly from either internal pll0 or external fxosc clock. in put characteristics are granted when using internal ppl0 or external oscillator is used in functional mode. ?38?78mhz pll1in sr ? pll1 input clock duty cycle 2 ?35?65% f pll1vco cc d pll1 vco frequency ? 600 ? 1250 mhz f pll1phi0 cc d pll1 output clock phi0 ? 4.76 ? 625 mhz t pll1lock cc p pll1 lock time ? ? ? 100 s f pll1mod cc t pll1 modulation frequency ? ? ? 250 khz | pll1mod | cc t pll1 modulation depth (when enabled) center spread 0.25 ? 2 % down spread 0.5 ? 4 % i pll1 cc c pll1 consumption fine lock state ? ? 6 ma table 28. internal rc oscilla tor electrical specifications (v dd_hv_pmu = 3.15 v to 3.6 v, v ss = 0 v, v dd_lv = 1.18 v to 1.32 v, v ss = 0 v, t j = ?40 / 165 o c) symbol c parameter conditions value unit min typ max f ta r g e t cc d irc target frequency ? ? 16 ? mhz f untrimmed cc d irc frequency (untrimmed) ? 9.6 ? 24 mhz f var_not cc p irc frequency variation without temperature compensation 1 notes: 1 pending silicon characterization t j < 150 o c?8 ? +8 % t j < 165 o c ?10 ? +10 t startup cc t startup time without temperature compensation 1 ?? 5 s i vdd3 cc t current consumption on 3.3v power supply after t startup ? ? 55 a i vdd12 cc t current consumption on 1.2v power supply after t startup ??270a
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 80 3.14 adc electrical characteristics the device provides a 12-bit succe ssive approximation register (sar ) analog-to-digital converter. figure 8. adc characteristi cs and error definitions 3.14.1 input impedance and adc accuracy to preserve the accuracy of the a/d converter, it is necessary that analog input pins have low ac impedance. placing a capacitor with good high frequency character istics at the input pin of the device can be effective: the capacitor should be as large as possible, ideally infi nite. this capacito r contributes to attenuating the noise present on the i nput pin; further, it sources charge during th e sampling phase, when the analog signal source is a high-impedance source. a real filter can typi cally be obtained by using a series resistan ce with a capacitor on the input pin (simple rc filter). the rc filtering may be limited acco rding to the value of source impedance of the transducer or circuit supplying the anal og signal to be measured. th e filter at the input pins must be designed taking into account the dynamic characteristics of the i nput signal (bandwidth) and the equivalent input impedance of the adc itself. in fact a current sink contributor is represente d by the charge sharing effects with the sampling capacitance: c s being substantially a switched capacitance, with a frequency equal to the conversion rate of the adc, it can be seen as a re sistive path to ground. fo r instance, assuming a c onversion rate of 1 mhz, (2 ) (1) (3 ) (4) (5) offset error ose offset error ose gain error ge 1 lsb (ideal) v in(a) (lsb ideal ) (1) example of an actual transfer curve (2) the ideal transfer curve (3) differential non-linearity error (dnl) (4) integral non-linearity error (inl) (5) center of a step of the actual transfer curve code out 4095 4094 4093 4092 4091 4090 5 4 3 2 1 0 7 6 1 2 3 4 5 6 7 4089 4090 4091 4092 4093 4094 4095 1 lsb ideal =(vrefh-vrefl)/ 4096 = 3.3v/ 4096 = 0.806 mv total unadjusted error tue = +/- 6 lsb = +/- 4.84mv
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 81 with c s equal to 3 pf, a resistance of 330 k is obtained (r eq =1 / (f c c s ), where fc represents the conversion rate at the considered channel). to mi nimize the error induced by the voltage partitioning between this resistance (sampled voltage on c s ) and the sum of r s +r f +r l +r sw +r ad , the external circuit must be designed to respect the equation 9 : eqn. 9 equation 9 generates a constraint for external network de sign, in particular on resistive path. internal switch resistances (r sw and r ad ) can be neglected with resp ect to external resistances. figure 29. input equivalent circuit a second aspect involving the capaci tance network shall be considered. assuming the three capacitances c f , c p1 and c p2 are initially charged at the source voltage v a (refer to the equivale nt circuit reported in figure 29 ): a charge sharing phenomenon is installed wh en the sampling phase is started (a/d switch close). v a r s r f r l r sw r ad +++ + r eq -------------------------------------------------------------------------- - ? 1 2 -- -lsb < r f c f r s r l r sw1 c p2 v dd_hv_iox sampling source filter current limiter external circuit internal circuit scheme r s source impedance r f filter resistance c f filter capacitance r l current limiter resistance r sw1 channel selection switch impedance r ad sampling switch impedance c p pin capacitance (two contributions, c p1 and c p2 ) c s sampling capacitance c p1 r ad channel selection v a c s
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 82 figure 30. transient behavior during sampling phase in particular two different transi ent periods can be distinguished: ? a first and quick charge transfer from the internal capacitance c p1 and c p2 to the sampling capacitance c s occurs (c s is supposed initially completely di scharged): considering a worst case (since the time constant in real ity would be faster) in which c p2 is reported in parallel to c p1 (call c p = c p1 + c p2 ), the two capacitances c p and c s are in series, and the time constant is eqn. 10 equation 10 can again be simplified considering only c s as an additional worst condition. in reality, the transient is faster, but the a/d converter circuitry has been designed to be robust also in the very worst case: the sampling time t s is always much longer than the internal time constant: eqn. 11 the charge of c p1 and c p2 is redistributed also on c s , determining a new value of the voltage v a1 on the capacitance according to equation 12 : eqn. 12 ? a second charge transfer involves also c f (that is typically bigger th an the on-chip capacitance) through the resistance r l : again considering the worst case in which c p2 and c s were in parallel to c p1 (since the time constant in reality w ould be faster), the time constant is: eqn. 13 v a v a1 v a2 t t s v cs voltage transient on c s v < 0.5 lsb 1 2 1 < (r sw + r ad ) c s << t s 2 = r l (c s + c p1 + c p2 ) 1 r sw r ad + () = c p c s ? c p c s + --------------------- ? 1 r sw r ad + () < c s t s ? ? v a1 c s c p1 c p2 ++ () ? v a c p1 c p2 + () ? = 2 r l < c s c p1 c p2 ++ () ?
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 83 in this case, the time constant depends on the ex ternal circuit: in part icular imposing that the transient is completed well before the end of sampling time t s , a constraints on r l sizing is obtained: eqn. 14 of course, r l shall be sized also according to the curr ent limitation constraints, in combination with r s (source impedance) and r f (filter resist ance). being c f definitively bigger than c p1 , c p2 and c s , then the final voltage v a2 (at the end of the charge transfer transient) will be much higher than v a1 . equation 15 must be respected (cha rge balance assuming now c s already charged at v a1 ): eqn. 15 the two transients above are not influenced by the voltage source that, due to the presence of the r f c f filter, is not able to provi de the extra charge to compensate the voltage drop on c s with respect to the ideal source v a ; the time constant r f c f of the filter is very high with respect to the sampling time (t s ). the filter is typically designed to act as anti-aliasing. figure 31. spectral represe ntation of input signal calling f 0 the bandwidth of the source signal (and as a consequence the cut-off frequency of the anti-aliasing filter, f f ), according to the nyquist theorem the conversion rate f c must be at least 2f 0 ; it means that the constant time of the filter is greater than or at leas t equal to twice the conversion period (t c ). again the conversion period t c is longer than the sampling time t s , which is just a portion of it, even when fixed channel continuous conversion mode is sele cted (fastest conversi on rate at a specific channel): in conclusion it is evident th at the time constant of the filter r f c f is definitively much higher than the sampling time t s , so the charge level on c s cannot be modified by the analog signal source during the time in which the sampling switch is closed. 10 2 ? 10 r l c s c p1 c p2 ++ () ? ? =t s < () ? v a c f ? v a1 +c p1 c p2 +c s + () ? = f 0 f analog source bandwidth (v a ) f 0 f sampled signal spectrum (f c = conversion rate) f c f anti-aliasing filter (f f = rc filter pole) f f 2 f 0 f c (nyquist) f f = f 0 (anti-aliasing filtering condition) t c 2 r f c f (conversion rate vs. filter pole) noise
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 84 the considerations above lead to impose new constraints on the external circuit, to reduce the accuracy error due to the voltage drop on c s ; from the two charge balance equati ons above, it is simple to derive equation 16 between the ideal and real sampled voltage on c s : eqn. 16 from this formula, in the worst case (when v a is maximum, that is for instance 5 v), assuming to accept a maximum error of half a count, a constraint is evident on c f value: eqn. 17 table 32. adc conversion characteristics symbol c parameter conditions 1 min typ max unit f ck sr ? adc clock frequency (depends on adc configuration) (the duty cycle depends on ad_ck 2 frequency) ?20?80mhz f s sr ? sampling frequency ? ? ? 1.00 mhz t sample cc d sample time 3 80 mhz@200 ohm source impedance 275 ? ? ns t conv cc d conversion time 4 80 mhz 650 ? ? ns c s 5 cc d adc input sampling capacitance ? ? 3 5 pf c p1 5 cc d adc input pin capacitance 1 - tbd not in adc spec ???5 (6) pf c p2 5 cc d adc input pin capacitance 2 - tbd not in adc spec ???0.8 pf r sw1 5 cc d internal resistance of analog source - tbd not in adc spec v ref range = 4.5 to 5.5 v ? ? 0.3 k cc v ref range = 3.0 to 3.6 v ? ? 875 r ad 5 cc d internal resistance of analog source - tbd not in adc spec ? ? ? 825 inl cc d integral non linearity ? ?2 ? 2 lsb dnl cc d differential non linearity 7 ??1?1lsb ofs cc t offset error ? ?4 ? 4 lsb gne cc t gain error ? ?4 ? 4 lsb input (single adc channel) cc d max leakage 150c ? ? 250 na cc d max positive/negative injection ?3 ? 3 ma v a v a2 ----------- - c p1 c p2 +c f + c p1 c p2 +c f c s ++ ------------------------------------------------------- - = c f 2048 c s ? >
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 85 3.15 flash memory electrical characteristics input (double adc channel) cc d max leakage 150c ? ? 300 na cc d max positive/negative inje ction |vref_ad0 - vref_ad1| < 150 mv ?3.6 ? 3.6 ma snr cc t signal-to-noise ratio v ref = 3.3 v, fin < 125 khz 67 ? ? db snr cc t signal-to-noise ratio v ref = 5.0 v, fin < 125 khz 69 ? ? db thd cc t total harmonic distortion @ 125 khz tbd ? ? db sinad cc t signal-to-noise and distortion fin < 125 khz 65 ? ? db enob cc t effective number of bits fin < 125 khz 10.5 ? ? bits tue is1winj cc d total unadjusted error for is1winj without current injection ?6 ? 6 lsb tue is1wwinj cc d total unadjusted error for is1wwinj without current injection ?6 ? 6 lsb notes: 1 v dd_hv_iox = 3.3 v -5%,+10%, t j = ?40 to +165 c, unless otherwise specif ied, and analog input voltage from v agnd to v aref . 2 ad_ck clock is always half of the adc module input cl ock defined via the auxiliary clock divider for the adc. 3 during the sample time the input capacitance c s can be charged/discharged by the external source. the internal resistance of the analog source must allow the capacitance to reach its final voltage level within t sample . after the end of the sample time t sample , changes of the analog input voltage have no effect on the conversion result. values for the sample clock t sample depend on programming. 4 this parameter does not include the sample time t sample , but only the time for determining the digital result and the time to load the result register with the conversion result. 5 see figure 29 . 6 for the 144-pin package 7 no missing codes table 33. flash memory program and erase specifications symbol characteristic typ 1 , 2 initial max 25c 3 initial max all temps 4 lifetime max 5 unit t dwprogram double word (64 bits) program time 6 25 100 ? 500 s t pprogram page (256 bits) program time 7 53 200 ? 500 s t qprogram quad-page (1024 bits) program time 8 203 800 1,200 2,000 s t 16kpperase 16 kb block pre-program and erase time 225 1,000 1,500 5,000 ms t 32kpperase 32 kb block pre-program and erase time 250 1,000 1,500 5,000 ms t 64kpperase 64 kb block pre-program and erase time 325 1,000 1,500 5,000 ms t 256kpperase 256 kb block pre-program and erase time 695 2,000 3,000 15,000 ms t factory256kp perase 256 kb block factory pre-program and erase time 510 1,500 2,250 n/a ms table 32. adc conversion characteristics (continued) symbol c parameter conditions 1 min typ max unit
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 86 notes: 1 typical program and erase times represent the median perfor mance and assume nominal supply values and operation at 25c. these values are characterized, but not tested. 2 for memory sizes greater than 1mb, and for blocks with less than or equal to 100 program/erase cycles, the user can apply a 90% typical + 10% init max (25c or all temps depending on tem perature) for each unit (page or block) to calculate the total program or erase time. 3 initial max 25c program and erase times provide guidance for time-out limits used in the factory and apply for less than or equal to 100 program or erase cycles, 20c < tj < 30c junction temperature, and nominal (+/- 2%) supply voltages. these values are verified at production test. 4 initial max all temps program and erase times provide guidance fo r time-out limits used in the factory and apply for less than or equal to 100 program or erase cycles, -40c < tj < 150c junction temp erature, and nominal (+/- 2%) supply voltages. these values are verified at production test. 5 lifetime max program and erase times appl y across the voltage, temperature and cycl ing range of product life. this maximum value is characterized but not tested. 6 program times are actual hardware programming times and do not include software overhead. 7 program times are actual hardware programming times and do not include software overhead. 8 program times are actual hardware programming times and do not include software overhead. table 34. flash memory environmental ratings symbol characteristic min typical max units t a operating ambient temperature: - automotive - automotive with reduced functionality (slower read performance (15% slower), higher currents, slower erase when done at spec value (2x), and no program, erase or margin reads allowed at greater than 150c). - consumer -40 -40 -20 ? +125 +140 +70 c t j operating junction temperature: - automotive - automotive with reduced functionality (slower read performance (15% slower), higher currents, slower erase when done at spec value (2x), and no program, erase or margin reads allowed at greater than 150c). - consumer -40 -40 -20 ? +150 +165 +95 c t s storage ambient temperature - automotive - automotive with reduced functionality -40 -40 ? +150 +165 c t max absolute maximum ambient temperature exposure, 30 seconds or less. ??+250c t uv allowed time of exposure to uv light ? ? 0 s
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 87 3.16 swg electrical characteristics 3.17 ac specifications ac parameters are specified over the full operating junction temperature range of -40c to +165c and for the full operating range of the vdd_io supply defined in section 3.8, ?dc electrical characteristics .? table 35. flash memory module life general use specifications symbol characteristic cond itions min typical units array p/e cycles number of program/erase cycles per block for 16kb, 32kb and 64kb blocks. 1 notes: 1 program and erase supported across standard temperature specs. see table ta bl e 3 4 . - 100,000 ? p/e cycles number of program/erase cycles per block for 256kb blocks. 2 2 program and erase supported across standard temperature specs. see table ta bl e 3 4 . - 1,000 100,000 p/e cycles data retention minimum data retention. blocks with 0-1,000 p/e cycles. 20 ?years blocks with 1,001 to 10,000 p/e cycles. 10 ? years blocks with 10,001 to 100,000 p/e cycles. 5?years table 36. swg electrical characteristics symbol c parameter min max unit sinad cc c signal-to-noise ratio plus distortion 50 ? db freq cc t frequency range of the sine wave 1 50 khz frp cc t frequency precision of the sine wave -5 5 % app cc t sine wave amplitude (peak to peak) 0.426 2.063 v load cc d load capacitance 25 100 pf current cc d output current - 100 a t j cc d junction temperature -40 165 c
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 88 1.as measured from 50% of core side input to voh/vol of the output 2. slew rate control modes. note: data based on characterization results, not tested in production. 3.17.1 reset pad (ext_por , reset ) electrical characteristics the device implements a dedi cated bidirectional reset pin. figure 18. start-up reset requirements table 37. functional pad ac specifications symbol c prop. delay (ns) 1 l>h/h>l rise/fall edge (ns) drive load (pf) ipp_sre[1:0] min max min max msb,lsb i/o (output) cc t 2.5/2.5 7.5/7.5 0.9.0.9 3/3 50 11 12/12 200 8/8 3.5/3.5 25 10 11.5/11.5 6.5/6.5 50 30/30 200 45/45 25/25 50 01 2 65/65 30/30 200 75/75 40/40 50 00 2 110/110 50/50 200 i/o (input) sr ? 1.5/1.5 0.5/0.5 0.5 na v il v dd_hv_iox device reset forced by ext_por v ddmin ext_por v ih device start-up phase
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 89 figure 19. noise filtering on reset signal table 38. reset (ext_por , reset ) electrical characteristics symbol c parameter conditions 1 value 2 unit min typ max v ih sr ? input high level ttl (schmitt trigger) ? 2.0 ? v dd_hv_iox +0.4 v v il sr ? input low level ttl (schmitt trigger) ? ?0.4 ? 0.8 v v hys 3 cc c input hysteresis ttl (schmitt trigger) ?300??mv i ol_r cc p strong pull-down current device under power-on reset v dd_hv_io =1.0v, v ol = 0.35*v dd_hv_io 0.2 ? ? ma device under power-on reset v dd_hv_io =3.0v, v ol = 0.35*v dd_hv_io 15 ? ? ma w frst sr p (ext_por , reset )-input filtered pulse ???10ns w nfrst sr p (ext_por , reset )-input not filtered pulse ?100??ns |i wpu | cc p weak pull-up current absolute value reset_b pin v in = 0 v 30 ? 80 a |i wpd | cc p weak pull-down current absolute value ext_por pin v in = v dd_hv_iox 30 ? 80 a v ext_por v il v ih v dd_hv_io filtered by hysteresis filtered by lowpass filter w frst w nfrst hw_rst ?1? ?0? filtered by lowpass filter w frst unknown reset state device under hardware reset
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 90 3.17.2 wkup/nmi timing 3.17.3 debug/jtag/nexus/aurora timing 3.17.3.1 jtag interface timing notes: 1 v dd_hv_iox = 3.3 v -5%,+10%, t j = ?40 / 165 c, unless otherwise specified 2 all values need to be confirmed during device validation. 3 data based on characterization results, not tested in production table 39. wkup/nmi glitch filter no. symbol parameter min typ max unit 1w fnmi d nmi pulse width that is rejected ? ? 20 ns 2w nfnmi d nmi pulse width that is passed 400 ? ? ns table 40. jtag pin ac electrical characteristics 1 notes: 1 these specifications apply to jtag boundary scan only. # symbol c characteristic min max unit 1t jcyc cc d tck cycle time 2 36 ? ns 2t jdc cc t tck clock pulse width 40 60 % 3t tckrise cc d tck rise and fall times (40% - 70%) ? 3 ns 4t tmss, t tdis cc d tms, tdi data setup time 5 ? ns 5t tmsh, t tdih cc d tms, tdi data hold time 5 ? ns 6t tdov cc d tck low to tdo data valid ? 15 3 ns 7t tdoi cc c tck low to tdo data invalid 0 ? ns 8t tdohz cc d tck low to tdo high impedance ? 15 ns 9t jcmppw cc d jcomp assertion time 100 ? ns 10 t jcmps cc d jcomp setup time to tck low 40 ? ns 11 t bsdv cc d tck falling edge to output valid ? 600 4 ns 12 t bsdvz cc d tck falling edge to output valid out of high impedance ? 600 ns 13 t bsdhz cc d tck falling edge to output high impedance ? 600 ns 14 t bsdst cc d boundary scan input valid to tck rising edge 15 ? ns 15 t bsdht cc d tck rising edge to boundary scan input invalid 15 ? ns
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 91 figure 20. jtag test clock input timing figure 21. jtag test access port timing 2 this timing applies to tdi, tdo, tms pins, however, actual frequency is limited by pad type for extest instructions. refer to pad specification for allowed transition frequency 3 timing includes tck pad delay, clock tree delay, logic delay and tdo output pad delay. 4 applies to all pins, limited by pad slew rate. refer to io delay and transition specification and add 20 ns for jtag delay. tck 1 2 2 3 3 tck 4 5 6 7 8 tms, tdi tdo
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 92 figure 22. jtag jcomp timing tck jcomp 9 10
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 93 figure 23. jtag boundary scan timing 3.17.3.2 nexus timing table 41. nexus debug port timing 1 no. symbol c parameter conditions min max unit 1t mcyc cc d mcko cycle time ? 15.6 ? ns 2t mdc cc d mcko duty cycle ? 40 60 % 3t mdov cc d mcko low to mdo, mseo , evto data valid 2 ??0.10.25t mcyc 4t evtipw cc d evti pulse width ? 4.0 ? t tcyc 5t evtopw cc d evto pulse width ? 1 t mcyc 6t tcyc cc d tck cycle time 3 ?62.5?ns 7t tdc cc d tck duty cycle ? 40 60 % 8t ntdis, t ntmss cc d tdi, tms data setup time ? 8 ? ns tck output signals input signals output signals 11 12 13 14 15
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 94 figure 24. nexus output timing figure 25. nexus evti input pulse width 9 t ntdih, t ntmsh cc d tdi, tms data hold time 5 ? ns 10 t jov cc d tck low to tdo/rdy data valid 0 25 ns notes: 1 jtag specifications in this table apply when used for debug f unctionality. all nexus timing relative to mcko is measured from 50% of mcko and 50% of the respective signal. 2 for all nexus modes except ddr mode, mdo, mseo , and evto data is held valid until next mcko low cycle. 3 the system clock frequency needs to be four times faster than the tck frequency. table 41. nexus debug port timing 1 (continued) no. symbol c parameter conditions min max unit 1 2 mcko mdo mseo evto output data valid 3 5 evti 4
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 95 figure 26. nexus tdi, tms, tdo timing 3.17.3.3 aurora lvds driver electrical characteristics table 42. aurora lvds driver specifications symbol c parameter 1 value 2 unit min typ max data rate datarate sr ? data rate ? 1250 typ+0.1% mbps startup t strt_bias cc t bias startup time 3 ?? 5s t strt_tx cc t transmitter startup time 4 ?? 5s tdo/rdy 8 9 tms, tdi 10 tck 6 7
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 96 3.17.3.4 nexus aurora debug port timing t strt_rx cc t receiver startup time 5 ?? 4s notes: 1 conditions for these values are v dd_hv_iox = 3.3 v (?5%, +10%), t j = ?40 / 150 c 2 all values need to be confirmed during device characterization. 3 startup time is defined as the time ta ken by lvds current reference block for settling bias current after its pwr_down (power down) has been deasserted. lvds functio nality is guaranteed only after the startup time. 4 startup time is defined as the time taken by lvds transmitter for settling after its pwr_down (power down) has been deasserted. here it is assume d that current reference is already stable (see bias start-up time). lvds functionality is guaranteed only after the startup time. 5 startup time is defined as the time taken by lvds rece iver for settling after its pwr_down (power down) has been deasserted. here it is assume d that current reference is already stable (see bias start-up time). lvds functionality is guaranteed only after the startup time. table 43. nexus aurora debug port timing # symbol c characteristic min max unit 1t refclk cc t reference clock frequency 625 1250 mhz 1a t mcyc cc t reference clock rise/fall time ? 400 ps 2t rcdc cc d reference clock duty cycle 45 55 % 3j rc cc d reference clock jitter ? 40 ps 4t stability cc d reference clock stability 50 ? ppm 5 ber cc d bit error rate ? 10 -12 ? 6j d cc d transmit lane deterministic jitter ? 0.17 oui 7j t cc d transmit lane total jitter ? 0.35 oui 8s o cc t differential output skew ? 20 ps 9s mo cc t lane to lane output skew ? 1000 ps 10 oui cc d aurora lane unit interval 1 notes: 1 100 ppm 400 400 ps table 42. aurora lvds driver specifications (continued) symbol c parameter 1 value 2 unit min typ max
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 97 figure 27. nexus aurora timings 3.17.4 external interrupt timing (irq pin) table 44. external interrupt timing no. symbol c parameter c onditions min max unit 1t ipwl cc d irq pulse width low ? 3 ? t cyc 2t ipwh cc d irq pulse width high ? 3 ? t cyc 3t icyc cc d irq edge to edge time 1 notes: 1 applies when irq pins are configured for rising edge or falling edge events, but not both. ?6?t cyc tx data [m] zero crossover clock ref - clock ref + 2 zero crossover 1a 1a 1a 1a 2 1 tx data - tx data + ideal zero crossover tx data [n] zero crossover tx data [n+1] zero crossover 9 9 8 8 8
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 98 figure 28. external interrupt timing 3.17.5 dspi timing table 45. dspi timing no. symbol c parameter conditions min max unit 1t sck cc d dspi cycle time master (mtfe = 0) 62 ? ns cc d slave (mtfe = 0) 62 ? cc d slave receive only mode 1 16 ? 2t csc cc d pcs to sck delay ? 16 ? ns 3t asc cc d after sck delay ? 16 ? ns 4t sdc cc d sck duty cycle ? t sck /2 - 10 t sck /2 + 10 ns 5t a cc d slave access time ss active to sout valid ? 40 ns 6t dis cc d slave sout disable time ss inactive to sout high-z or invalid ? 10 ns 7t pcsc cc d pcsx to pcss time ? 13 ? ns 8t pasc cc d pcss to pcsx time ? 13 ? ns 9t sui cc d data setup time for inputs master (mtfe = 0) 20 ? ns slave 2? master (mtfe = 1, cpha = 0) 5? master (mtfe = 1, cpha = 1) 20 ? 10 t hi cc d data hold time for inputs master (mtfe = 0) ?5 ? ns slave 4 ? master (mtfe = 1, cpha = 0) 11 ? master (mtfe = 1, cpha = 1) ?5 ? 11 t suo cc d data valid (after sck edge) master (mtfe = 0) ? 4 ns slave ? 23 master (mtfe = 1, cpha = 0) ? 12 master (mtfe = 1, cpha = 1) ? 4 irq 1 2 3
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 99 figure 29. dspi classic spi timing ? master, cpha = 0 12 t ho cc d data hold time for outputs master (mtfe = 0) ?2 ? ns slave 6 ? master (mtfe = 1, cpha = 0) 6 ? master (mtfe = 1, cpha = 1) ?2 ? notes: 1 slave receive only mode can operate at a maximum frequency of 60 mhz. in this mode, the dspi can receive data on sin, but no valid data is transmitted on sout. table 45. dspi timing (continued) no. symbol c parameter conditions min max unit data last data first data first data data last data sin sout pcsx sck output 4 9 12 1 11 10 4 sck output (cpol=0) (cpol=1) 3 2 note: the numbers shown are referenced in ta b l e 4 5 .
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 100 figure 30. dspi classic spi timing ? master, cpha = 1 figure 31. dspi classic sp i timing ? slave, cpha = 0 data last data first data sin sout 12 11 10 last data data first data sck output sck output pcsx 9 (cpol=0) (cpol=1) note: the numbers shown are referenced in ta b l e 4 5 . last data first data 3 4 1 data data sin sout ss 4 5 6 9 11 10 12 sck input first data last data sck input 2 (cpol=0) (cpol=1) note: the numbers shown are referenced in table 45 .
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 101 figure 32. dspi classic sp i timing ? slave, cpha = 1 figure 33. dspi modified transfer format timing ? master, cpha = 0 5 6 9 12 11 10 last data last data sin sout ss first data first data data data sck input sck input (cpol=0) (cpol=1) note: the numbers shown are referenced in ta b l e 4 5 . pcsx 3 1 4 10 4 9 12 11 sck output sck output sin sout first data data last data first data data last data 2 (cpol=0) (cpol=1) note: the numbers shown are referenced in table 45 .
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 102 figure 34. dspi modified transfer format timing ? master, cpha = 1 figure 35. dspi modified transfer format timing ? slave, cpha = 0 pcsx 10 9 12 11 sck output sck output sin sout first data data last data first data data last data (cpol=0) (cpol=1) note: the numbers shown are referenced in table 45 . last data first data 3 4 1 data data sin sout ss 4 5 6 9 11 10 sck input first data last data sck input 2 (cpol=0) (cpol=1) 12 note: the numbers shown are referenced in ta b l e 4 5 .
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 103 figure 36. dspi modified transfer format timing ? slave, cpha = 1 figure 37. dspi pcs strobe (pcss ) timing 5 6 9 12 11 10 last data last data sin sout ss first data first data data data sck input sck input (cpol=0) (cpol=1) note: the numbers shown are referenced in ta b l e 4 5 . pcsx 7 8 pcss note: the numbers shown are referenced in ta b l e 4 5 .
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 104 3.17.6 lvds fast asynchronous tr ansmission (lfast) electrical characteristics 3.17.6.1 lfast interface timing diagrams figure 38. lfast timing definition
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 105 figure 39. power-down exit time figure 40. rise/fall time 3.17.6.2 lfast interface electrical characteristics ] table 46. lfast electrical characteristics symbol c parameter conditions 1 value 2 unit min typ max v dd_hv_ij sr ? operating supply conditions 3.15 ? 3.6 v data rate datarate sr ? data rate ? ? 312/320 typ+0.1% mbps startup t strt_bias cc t bias startup time 3 ??0.53s t pd2nm_tx cc t transmitter startup time (power down to normal mode) 4 ??0.22s data valid pad_p/pad_n lfast_pwr_down differential tx data lines h l tsu differential tx data lines pad_p/pad_n trise tfall 90% 10% v ih v il
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 106 t sm2nm_tx cc t transmitter startup time (sleep mode to normal mode) 5 ??0.20.5s t pd2nm_rx cc t receiver startup time 6 (power down to normal mode) ? ? 20 40 ns t pd2sm_rx cc t receiver startup time 6 (power down to sleep mode) ? ? 20 50 ns transmitter v os_drf cc t common mode voltage ? 1.08 ? 1.32 v | vod_drf | cc d differential output voltage swing (terminated) ? 100 200 285 mv t tr_drf cc t rise/fall time (10% - 90% of swing) ? 0.26 ? 1.5 ns r out_drf sr ? terminating resistance v dd_hv_ij = 5v10% 65 ? 171 sr ? v dd_hv_ij = 3v10% 67 ? 198 c out_drf sr ? capacitance 7 ???5pf receiver v icom_drf sr ? common mode voltage ? 0.15 8 ?1.6 9 v | vi_drf | sr ? differential input voltage ? 100 ? ? mv v hys_drf cc c input hysteresis ? 25 ? ? mv r in_drf cc d terminating resistance v dd_hv_ij = 5v10% 80 100 120 d terminating resistance v dd_hv_ij = 3v10% 80 115 150 c in_drf cc d capacitance 10 ??3.56pf l in_drf cc d parasitic inductance 11 ??510nh notes: 1 v dd_hv_iox = 3.3 v -5%,+10%, t j = ?40 / 165 c, unless otherwise specified 2 all values need to be confirmed during device characterization. 3 startup time is defined as the time taken by lfast current refe rence block for settling bias current after its pwr_down (power down) has been deasserted. lfast functionality is guaranteed only after the startup time. 4 startup time is defined as the time taken by lfast transm itter for settling after its pwr_down (power down) has been deasserted. here it is assumed that curre nt reference is already stable. lfast functionality is guaranteed only after the startup time. 5 startup time is defined as the time taken by lfast transm itter for settling after its pwr_down (power down) has been deasserted. here it is assumed that curre nt reference is already stable. lfast functionality is guaranteed only after the startup time. 6 startup time is defined as the time taken by lfast receiv er for settling after its pwr_down (power down) has been deasserted. here it is assumed that curre nt reference is already stable. lfast functionality is guaranteed only after the startup time. table 46. lfast electrical characteristics (continued) symbol c parameter conditions 1 value 2 unit min typ max
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 107 3.17.7 flexray 3.17.7.1 flexray timing parameters this section provides the flexray interface timing characteristics for the input and output signals. these numbers are recommended pe r the flexray electrical physical layer sp ecification, version 3.0.1, and subject to change per the fi nal timing analysis of the device. 7 total lumped capacitance including silicon, package pin and bond wire. application board simulation needed to verify lfast template compliancy. 8 absolute min = 0.15 v ? (285 mv / 2) = 0 v 9 absolute max = 1.6 v + (285 mv / 2) = 1.743 v 10 total capacitance including silicon, package pin and bond wire 11 total inductance including silicon, package pin and bond wire table 47. lfast electrical characteristics 1 notes: 1 the specifications in this table apply to both the interprocessor bus and debug lfast interfaces. symbol c parameter condition value unit min nominal max f rf_ref sr d sysclk frequency ? 10 ? 26 2 2 guarantee of the 26 mhz sysclk frequency spec ification is pending device characterization. mhz err ref cc d sysclk frequency error ? ?1 ? 1 % dc ref cc d sysclk duty cycle ? 45 ? 55 % c load cc d output buffer load capacitance ? ? ? 10 pf r load cc d output buffer load resistance ? 10 ? ? k pn cc d integrated phase noise (single side band) 20 mhz ? ? ?58 dbc cc d 10 mhz ? ? ?64 dbc f vco cc d pll vco frequency ? ? 320 ? mhz t lock cc d pll phase lock ? ? ? 40 s per cc t pll long term jitter (peak to peak) ???600ps
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 108 3.17.7.2 txen figure 41. flexray txen signal figure 42. flexray txen signal propagation delays table 48. txen output characteristics 1 notes: 1 all parameters specified for v dd_hv_iox = 3.3 v -5%, +10%, t j = ?40 o c / 165 o c, txen pin load maximum 25 pf. name description min max unit dcctxen rise25 rise time of txen signal at cc ?9ns dcctxen fall25 fall time of txen signal at cc ?9ns dcctxen 01 sum of delay between clk to q of the last ff and the final output buffer, rising edge ?25ns dcctxen 10 sum of delay between clk to q of the last ff and the final output buffer, falling edge ?25ns dcctxen rise dcctxen fall 20 % 80 % txen dcctxen 10 dcctxen 01 txen pe_clk
electrical characteristics MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 109 3.17.7.3 txd figure 43. flexray txd signal table 49. txd output characteristics name description 1 notes: 1 all parameters s pecified for v dd_hv_iox = 3.3 v -5%, +10%, t j = ?40 o c / 165 o c, txd pin load maximum 25 pf. min max unit dcctxasym asymmetry of sending cc @ 25 pf load (=dcctxd 50% -100ns) ?2.45 2.45 ns dcctxd rise25 +dcctxd fall25 sum of rise and fall time of txd signal at the output ?9ns dcctxd 01 sum of delay between clk to q of the last ff and the final output buffer, rising edge ?25ns dcctxd 10 sum of delay between clk to q of the last ff and the final output buffer, falling edge ?25ns dcctxd 50% txd dcctxd fall dcctxd rise 20 % 50 % 80 %
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice electrical characteristics freescale semiconductor 110 figure 44. flexray txd signal propagation delays 3.17.7.4 rxd table 50. rxd input characteristics 3.17.7.5 receiver asymmetry name description 1 notes: 1 all parameters s pecified for v dd_hv_iox = 3.3 v -5%, +10%, t j = ?40 o c / 165 o c. min max unit c_ccrxd input capacitance on rxd pin ?7 pf ucclogic_1 threshold for detecting logic high 35 70 % ucclogic_0 threshold for detecting logic low 30 65 % dccrxd 01 sum of delay from actual input to the d input of the first ff, rising edge ?10 ns dccrxd 10 sum of delay from actual input to the d input of the first ff, falling edge ?10 ns table 51. receiver asymmetry name description min max unit dccrxasymaccept 15 acceptance of asymmetry at receiving cc with 15 pf load (*) -31.5 +44.0 ns dccrxasymaccept 25 acceptance of asymmetry at receiving cc with 25 pf load (*) -30.5 +43.0 ns dcctxd 10 dcctxd 01 txd pe_clk * * flexray protocol engine clock
obtaining package dimensions MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 111 4 obtaining package dimensions package dimensions are provi ded in package drawings. to find a package drawing, go to http://www.freescale.com and perform a keyword search for the drawing?s document number: if you want the drawing for this package then use this document number 144-pin lqfp 98ass23177w 176-pin lqfp 98asa00300d 257-ball mapbga 98asa00081d
MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice ordering information freescale semiconductor 112 5 ordering information table 1. orderable part number summary part number 1 notes: 1 all packaged devices are ppc, rather than mpc or spc, until product qualifications are complete. not all configurations are available in the ppc parts. flash/sram package other features 2 2 the n33e maskset version of the device is limited to a maximum frequency of 180 mhz. ppc5744pfk0mlq8 2.5 mb/384 kb 144 lqfp (pb free) ?40 to +125 c ppc5744pfk0mku8 2.5 mb/384 kb 176 lqfp exposed pad (pb free) 3 3 the 176 lqfp-ep package is no t planned to be avai lable with the n33e maskset vers ion of the ppc5744 device. the 176 lqfp-ep package is under consideration, but not committed, for future maskset versions. lfast interface ?40 to +125 c ppc5744pfk0mmm8 2.5 mb/384 kb 257 mapbga (pb free) lfast interface nexus aurora ?40 to +125 c mpc5743pfk0mlq8 2 mb/256 kb 144 lqfp (pb free) ?40 to +125 c mpc5743pfk0mmm8 2 mb/256 kb 257 mapbga (pb free) lfast interface nexus aurora ?40 to +125 c mpc5742pfk0mlq8 1.5 mb/192 kb 144 lqfp (pb free) ?40 to +125 c mpc5742pfk0mmm8 1.5 mb/192 kb 257 mapbga (pb free) lfast interface nexus aurora ?40 to +125 c 5744p mpc lq note: not all options are available on all devices. see ta bl e 1 . k0 qualification status core code (power architecture) device number fab and mask identifier package identifier tape and reel status temperature range m = ?40c to +125c package identifier lq = 144 lqfp qualification status p = pre-qualification tape and reel status r = tape and reel (blank) = trays m temperature range mm = 257 mapbga r m = fully spec. qualified, general market flow s = fully spec. qualified, automotive flow ku = 176 lqfp k = ?40c to +tbdc for extended temp (+165c t j ) f f=flexray (blank) = no flexray 8 operating frequency operating frequency 8=180mhz 5 = 150 mhz
document revision history MPC5744P data sheet, rev. 0.3 preliminary?subject to change without notice freescale semiconductor 113 6 document revision history table 52 summarizes revisions to this document. table 52. revision history revision date description of changes rev. 0.3 06/2012 ? updated specifications and conditions th roughout the document and added new information ? updated the name of freescale?s digrf module to lfast module ? updated list and format of orderable part numbers as well as information about the 176 lqfp-ep package?s availability
document number: MPC5744P rev. 0.3 06/2012 how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor china ltd. exchange building 23f no. 118 jianguo road chaoyang district beijing 100022 china +86 10 5879 8000 support.asia@freescale.com information in this document is provid ed solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability arising out of the application or use of any product or circuit, and specif ically disclaims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale semiconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applic ations intended to support or sustain life, or for any other application in which the failure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemnify and hold freescale semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. the power architecture and power.org word marks and the power and power.org logos and related marks are trademarks and service marks licensed by power.org. ? freescale semiconductor, inc. 2012. all rights reserved. preliminary?subject to change without notice

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