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data sheet ?2011 cadeka microcircuits llc www.cadeka.com c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer features n 260mhz bandwidth n fully specifed at +2.7v and +5v supplies n output voltage range: 0.036v to 4.953v; v s = +5; r l = 2k n input voltage range: -0.3v to +3.8v; v s = +5 n 145v/s slew rate n 4.2ma supply current per amplifer n 55ma linear output current n 85ma short circuit current n directly replaces ad8052, ad8042 and ad8092 in single supply applications n pb-free soic-8 package applications n a/d driver n active flters n ccd imaging systems n cd/dvd rom n coaxial cable drivers n high capacitive load driver n portable/battery-powered applications n twisted pair driver n telecom and optical terminals n video driver general description the comlinear ad8052lv is a low cost dual, voltage feedback amplifer. this amplifer is designed to operate on +2.7v to +5v, or 2.5v supplies. the input voltage range extends 300mv below the negative rail and 1.2v below the positive rail. the ad8052lv offers superior dynamic performance with a 260mhz small signal bandwidth and 145v/s slew rate. the combination of low power, high output current drive, and rail-to-rail performance make the ad8052lv well suited for battery-powered communication/computing systems. the combination of low cost and high performance make the ad8052lv suitable for high volume applications in both consumer and industrial applications such as wireless phones, scanners, and color copiers. output swing ordering information part number package pb-free rohs compliant operating temperature range packaging method ad8052lviso8 soic-8 yes yes -40c to +85c rail AD8052LVISO8X soic-8 yes yes -40c to +85c reel ad8052lvimp8x* msop-8 yes yes -40c to +85c reel moisture sensitivity level for all parts is msl-1. *advance information, contact cadeka for availability. output voltage (0.5v/div) time (0.5 s/div) 2.7 0 v s = +2.7v r l = 2k g = -1
?2011 cadeka microcircuits llc www.cadeka.com 2 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a ad8052lv pin assignments soic-8, msop-8 pin no. pin name description 1 out1 output, channel 1 2 -in1 negative input, channel 1 3 +in1 positive input, channel 1 4 -v s negative supply 5 +in2 positive input, channel 2 6 -in2 negative input, channel 2 7 out2 output, channel 2 8 +v s positive supply ad8052lv pin confguration soic-8, msop-8 - + - + 1 2 3 4 out1 -in1 +in1 -v s +v s out2 -in2 +in2 8 7 6 5
?2011 cadeka microcircuits llc www.cadeka.com 3 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a absolute maximum ratings the safety of the device is not guaranteed when it is operated above the absolute maximum ratings. the device should not be operated at these absolute limits. adhere to the recommended operating conditions for proper device function. the information contained in the electrical characteristics tables and typical performance plots refect the operating conditions noted on the tables and plots. parameter min max unit supply voltage 0 +6 v input voltage range -v s -0.5v +v s +0.5v v reliability information parameter min typ max unit junction temperature 175 c storage temperature range -65 150 c lead temperature (soldering, 10s) 260 c package thermal resistance 8-lead soic 100 c/w 8-lead msop tbd c/w notes: package thermal resistance ( ja ), jdec standard, multi-layer test boards, still air. esd protection product soic-8 msop-8 human body model (hbm) 2.5kv tbd charged device model (cdm) 2kv tbd recommended operating conditions parameter min typ max unit operating temperature range -40 +85 c supply voltage range 2.5 5.5 v
?2011 cadeka microcircuits llc www.cadeka.com 4 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a electrical characteristics at 2.7v v s = +2.7v, g = 2, r f = 2k, r l = 2k to v s /2; unless otherwise noted. symbol parameter conditions min typ max units frequency domain response ugbw -3db bandwidth (2) g = +1, v out = 0.05v pp 215 mhz bw ss -3db bandwidth g = +2, v out = 0.2v pp 85 mhz bw ls large signal bandwidth g = +2, v out = 2v pp 36 mhz gbwp gain bandwidth product 86 mhz time domain response t r , t f rise and fall time (2) v out = 0.2v step 3.7 ns t s settling time to 0.1% v out = 1v step 40 ns os overshoot v out = 0.2v step 9 % sr slew rate 2.7v step, g = -1 130 v/s distortion/noise response hd2 2nd harmonic distortion (2) 1v pp , 5mhz 79 dbc hd3 3rd harmonic distortion (2) 1v pp , 5mhz 82 dbc 1v pp , 5mhz 77 db e n input voltage noise > 1mhz 16 nv/hz i n input current noise > 1mhz 1.3 pa/hz x talk crosstalk (1) 10mhz 65 db dc performance v io input offset voltage -1.6 mv dv io average drift 10 v/c i b input bias current 3 a di b average drift 7 na/c i io input offset current 0.1 a psrr power supply rejection ratio (1) dc 52 57 db a ol open-loop gain 75 db i s quiescent current per amplifer 3.9 ma input characteristics r in input resistance 4.3 m c in input capacitance 1.8 pf cmir common mode input range -0.3 to 1.5 v cmrr common mode rejection ratio dc, v cm = 0v to v s -1.5 87 db output characteristics v out output voltage swing r l = 10k to v s /2 0.023 to 2.66 v r l = 2k to v s /2 0.025 to 2.653 v r l = 150 to v s /2 0.065 to 2.55 v i out output current 55 ma -40c to +85c 50 ma i sc short-circuit output current 85 ma v s power supply operating range 2.5 2.7 5.5 v notes: 1. 100% tested at 25c. 2. r f = 1k was used for optimal performance. (for g = +1, r f = 0).
?2011 cadeka microcircuits llc www.cadeka.com 5 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a electrical characteristics at 5v v s = 5v, g = 2, r f = 2k, r l = 2k to v s /2; unless otherwise noted. symbol parameter conditions min typ max units frequency domain response ugbw -3db bandwidth (2) g = +1, v out = 0.05v pp 260 mhz bw ss -3db bandwidth g = +2, v out = 0.2v pp 90 mhz bw ls large signal bandwidth g = +2, v out = 2v pp 40 mhz gbwp gain bandwidth product 90 mhz time domain response t r , t f rise and fall time (2) v out = 0.2v step 3.6 ns t s settling time to 0.1% v out = 2v step 40 ns os overshoot v out = 0.2v step 7 % sr slew rate 5v step, g = -1 145 v/s distortion/noise response hd2 2nd harmonic distortion (2) 2v pp , 5mhz 71 dbc hd3 3rd harmonic distortion (2) 2v pp , 5mhz 78 dbc 2v pp , 5mhz 70 db dg differential gain ntsc (3.85mhz), ac-coupled, r l = 150 0.06 % ntsc (3.85mhz), dc-coupled, r l = 150 0.08 % dp differential phase ntsc (3.85mhz), ac-coupled, r l = 150 0.07 ntsc (3.85mhz), dc-coupled, r l = 150 0.06 e n input voltage noise >1mhz 16 nv/hz i n input current noise >1mhz 1.3 pa/hz x talk crosstalk (2) 10mhz 62 db dc performance v io input offset voltage (1) -8 1.4 +8 mv dv io average drift 10 v/c i b input bias current (1) -8 3 +8 a di b average drift 7 na/c i io input offset current (1) -0.8 0.1 +0.8 a psrr power supply rejection ratio (1) dc 52 57 db a ol open-loop gain (1) 68 78 db i s quiescent current (1) per amplifer 4.2 5.2 ma input characteristics r in input resistance 4.3 m c in input capacitance 1.8 pf cmir common mode input range -0.3 to 3.8 v cmrr common mode rejection ratio (1) dc, v cm = 0v to v s -1.5 72 87 db output characteristics v out output voltage swing r l = 10k to v s /2 0.027 to 4.97 v r l = 2k to v s /2 0.036 to 4.953 v r l = 150 to v s /2 (1) 0.3 0.12 to 4.8 4.625 v i out output current 55 ma -40c to +85c 50 ma i sc short-circuit output current 85 ma v s power supply operating range 2.5 5 5.5 v notes: 1. 100% tested at 25c. 2. r f = 1k was used for optimal performance. (for g = +1, r f = 0).
?2011 cadeka microcircuits llc www.cadeka.com 6 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a typical performance characteristics v s = +5v, g = 2, r f = 2k, r l = 2k to v s /2; unless otherwise noted. non-inverting frequency response v s = +5v inverting frequency response v s = +5v non-inverting frequency response v s = +2.7v inverting frequency response v s = +2.7v frequency response vs. c l large signal frequency response normalized magnitude (2db/div) frequency (mhz) 0.1 1 g = 10 r f = 2k 10 100 g = 5 r f = 2k g = 1 r f = 0 g = 2 r f = 1k normalized magnitude (1db/div) frequency (mhz) 0.1 1 g = -10 r f = 2k 10 100 g = -5 r f = 2k g = -2 r f = 2k g = -1 r f = 2k normalized magnitude (2db/div) frequency (mhz) 1 10 100 0.1 g = 10 r f = 2k g = 5 r f = 2k g = 1 r f = 0 g = 2 r f = 1k normalized magnitude (1db/div) frequency (mhz) 0.1 1 g = -10 r f = 2k 10 100 g = -5 r f = 2k g = -2 r f = 2k g = -1 r f = 2k magnitude (1db/div) frequency (mhz) 0.1 1 10 100 c l = 100pf r s = 25 c l = 50pf r s = 33 c l = 20pf r s = 20 c l = 10pf r s = 0 + - 1k 1k r s c l r l magnitude (1db/div) frequency (mhz) 0.1 1 10 100 v o = 1v pp v o = 2v pp
?2011 cadeka microcircuits llc www.cadeka.com 7 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a typical performance characteristics v s = +5v, g = 2, r f = 2k, r l = 2k to v s /2; unless otherwise noted. frequency response vs. temperature input voltage noise 2nd & 3rd harmonic distortion; v s = +5v 2nd & 3rd harmonic distortion; v s = +2.7v 2nd harmonic distortion vs. v o 3rd harmonic distortion vs. v o magnitude (0.5db/div) frequency (mhz) 1 10 100 voltage noise (nv/ hz) frequency (hz) 1k 10k 100k 1m 0 10 20 30 40 50 60 70 80 90 100 distortion (dbc) frequency (mhz) 0 5 10 15 3rd r l = 150 20 2nd r l = 150 3rd r l = 2k 2nd r l = 2k -90 -80 -70 -60 -50 -40 -30 -20 v o = 2v pp r f = 1k distortion (dbc) frequency (mhz) 0 5 10 15 2nd r l = 150 20 3rd r l = 150 3rd r l = 2k 2nd r l = 2k -90 -80 -70 -60 -50 -40 -30 -20 v o = 1v pp r f = 1k distortion (dbc) output amplitude (v pp ) 0.5 1.0 1.5 2.0 20mhz 10mhz 5mhz 2.5 -90 -80 -70 -60 -50 -40 -30 -20 r f = 1k 2mhz distortion (dbc) output amplitude (v pp ) 0.5 1.0 1.5 2.0 20mhz 10mhz 5mhz 2.5 -90 -80 -70 -60 -50 -40 -30 -20 r f = 1k 2mhz
?2011 cadeka microcircuits llc www.cadeka.com 8 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a typical performance characteristics v s = +5v, g = 2, r f = 2k, r l = 2k to v s /2; unless otherwise noted. psrr cmrr open loop gain & phase vs. frequency output current small signal pulse response v s = +5v small signal pulse response v s = +2.7v psrr (db) frequency (mhz) 1k 0.01 0.1 1 100 -70 -60 -50 -40 -30 -20 -10 0 10 cmrr (db) frequency (mhz) 0.01 0.1 1.0 10 100 -90 -80 -70 -60 -50 -40 open loop gain (db) frequency (mhz) -20 -10 0 10 20 -180 -135 -90 -45 0 30 40 50 60 70 80 0.01 0.1 1 10 100 phase (degrees) |gain| phase output voltage (v) output current (ma) -100 -50 0 50 100 linear output current 55ma -0.8 -0.6 -0.2 0 0.2 0.4 0.6 0.8 -0.4 short circuit current 85ma output voltage (0.05v/div) time (20ns/div) r f = 1k output voltage (0.05v/div) time (20ns/div) r f = 1k
?2011 cadeka microcircuits llc www.cadeka.com 9 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a typical performance characteristics v s = +5v, g = 2, r f = 2k, r l = 2k to v s /2; unless otherwise noted. large signal pulse response v s = +5v output swing channel matching v s = +5v output voltage (0.5v/div) time (20ns/div) r f = 1k output voltage (0.5v/div) time (0.5 s/div) 2.7 0 v s = +2.7v r l = 2k g = -1 magnitude (0.5db/div) frequency (mhz) 0.1 1 10 100 channel 1 r f = 1k r l = 2k g = 2 channel 2
?2011 cadeka microcircuits llc www.cadeka.com 10 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a application information general description the ad8052lv is a single supply, general purpose, volt - age-feedback amplifer fabricated on a complementary bipolar process using a patent pending topography. they feature a rail-to-rail output stage and is unity gain stable. both gain bandwidth and slew rate are insensitive to tem - perature. the common mode input range extends to 300mv below ground and to 1.2v below v s . exceeding these values will not cause phase reversal. however, if the input volt - age exceeds the rails by more than 0.5v, the input esd devices will begin to conduct. the output will stay at the rail during this overdrive condition. the design uses a darlington output stage. the output stage is short circuit protected and offers soft saturation protection that improves recovery time. figures 1, 2, and 3 illustrate typical circuit confgurations for non-inverting, inverting, and unity gain topologies for dual supply applications. they show the recommended bypass capacitor values and overall closed loop gain equations. figure 4 shows the typical non-inverting gain circuit for single supply applicaitons. + - r f 0.1f 6.8f output g = 1 + ( r f /r g ) input +v s -v s r g 0.1f 6.8f r l figure 1. typical non-inverting gain circuit + - r f 0.1f 6.8f output g = - ( r f /r g ) for optimum input offset voltage set r 1 = r f || r g input +v s -v s 0.1f 6.8f r l r g r 1 figure 2. typical inverting gain circuit + - 0.1f 6.8f output g = 1 input +v s -v s 0.1f 6.8f r l figure 3. unity gain circuit + - r f 0.01f 6.8f out in +v s + r g figure 4. single supply non-inverting gain circuit
?2011 cadeka microcircuits llc www.cadeka.com 11 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a at non-inverting gains other than g = +1, keep r g below 1k to minimize peaking; thus, for optimum response at a gain of +2, a feedback resistor of 1k is recommended. figure 5 illustrates the ad8052lv frequency response with both 1k and 2k feedback resistors. magnitude (1db/div) frequency (mhz) 1 10 100 r f = 2k r f = 1k g = 2 r l = 2k v s = +5v figure 5: frequency response vs. r f power dissipation power dissipation should not be a factor when operating under the stated 2k load condition. however, applications with low impedance, dc coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond its intended operating range. maximum power levels are set by the absolute maximum junction rating of 150c. to calculate the junction temperature, the package thermal resistance value theta ja (? ja ) is used along with the total die power dissipation. t junction = t ambient + (? ja p d ) where t ambient is the temperature of the working environment. in order to determine p d , the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. p d = p supply - p load supply power is calculated by the standard power equation. p supply = v supply i rms supply v supply = v s+ - v s- power delivered to a purely resistive load is: p load = ((v load ) rms 2 )/rload eff the effective load resistor (rload eff ) will need to include the effect of the feedback network. for instance, rload eff in figure 3 would be calculated as: r l || (r f + r g ) these measurements are basic and are relatively easy to perform with standard lab equipment. for design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. here, p d can be found from p d = p quiescent + p dynamic - p load quiescent power can be derived from the specifed i s values along with known supply voltage, v supply . load power can be calculated as above with the desired signal amplitudes using: (v load ) rms = v peak / 2 ( i load ) rms = ( v load ) rms / rload eff the dynamic power is focused primarily within the output stage driving the load. this value can be calculated as: p dynamic = (v s+ - v load ) rms ( i load ) rms assuming the load is referenced in the middle of the power rails or v supply /2. the ad8052lv is short circuit protected. however, this may not guarantee that the maximum junction temperature (+150c) is not exceeded under all conditions. figure 6 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. 0 0.5 1 1.5 2 2.5 - 40 - 20 0 20 40 60 80 maximum power dissipation (w) ambient temperature ( c) soic - 8 figure 6. maximum power derating
?2011 cadeka microcircuits llc www.cadeka.com 12 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a driving capacitive loads increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. use a series resistance, r s , between the amplifer and the load to help improve stability and settling performance. refer to figure 7. + - r f input output r g r s c l r l figure 7. addition of r s for driving capacitive loads table 1 provides the recommended r s for various capacitive loads. the recommended r s values result in approximately <1db peaking in the frequency response. c l (pf) r s () -3db bw (khz) 10pf 0 100 20pf 20 94 50pf 33 72 100pf 25 58 table 1: recommended r s vs. c l for a given load capacitance, adjust r s to optimize the tradeoff between settling time and bandwidth. in general, reducing r s will increase bandwidth at the expense of additional overshoot and ringing. overdrive recovery an overdrive condition is defned as the point when either one of the inputs or the output exceed their specifed voltage range. overdrive recovery is the time needed for the amplifer to return to its normal or linear operating point. the recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. the ad8052lv will typically recover in less than 20ns from an overdrive condition. figure 8 shows the ad8052lv in an overdriven condition. input voltage (0.5v/div) time (20ns/div) output input r l = 2k v in =2v pp g = 5 r f = 1k figure 8. overdrive recovery layout considerations general layout and supply bypassing play major roles in high frequency performance. c adeka has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. follow the steps below as a basis for high frequency layout: ? include 6.8f and 0.1f ceramic capacitors for power supply decoupling ? place the 6.8f capacitor within 0.75 inches of the power pin ? place the 0.1f capacitor within 0.1 inches of the power pin ? remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance ? minimize all trace lengths to reduce series inductances refer to the evaluation board layouts below for more information. evaluation board information the following evaluation boards are available to aid in the testing and layout of these devices: evaluation board # products ceb006 ad8052lv in soic ceb010 ad8052lv in msop
?2011 cadeka microcircuits llc www.cadeka.com 13 data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a evaluation board schematics evaluation board schematics and layouts are shown in figures 9-13. these evaluation boards are built for dual- supply operation. follow these steps to use the board in a single-supply application: 1. short -vs to ground. 2. use c3 and c4, if the -v s pin of the amplifer is not directly connected to the ground plane. figure 9. ceb006 & ceb010 schematic figure 10. ceb006 top view figure 11. ceb006 bottom view figure 12. ceb010 top view figure 13. ceb010 bottom view
for additional information regarding our products, please visit cadeka at: cadeka.com cadeka, the cadeka logo design, comlinear, and the comlinear logo design are trademarks or registered trademarks of cadeka microcircuits llc. all other brand and product names may be trademarks of their respective companies. cadeka reserves the right to make changes to any products and services herein at any time without notice. cadeka does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by cadeka; nor does the purchase, lease, or use of a product or service from cadeka convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of cadeka or of third parties. copyright ?2011 by cadeka microcircuits llc. all rights reserved. cadeka headquarters loveland, colorado t: 970.663.5452 t: 877.663.5452 (toll free) data sheet c omlinear ? ad8052lv low cost, +2.7v to 5.5v, 260mhz rail-to-rail amplifer rev 1a mechanical dimensions soic-8 package msop-8 package gauge p lane seating p lane 3.000.10 4.900.15 3.000.10 0.380 0.270 0.65 1.10max 0.150 0.050 a b 0.10 a b c 0.23 0.13 see detail a 0.25 0.70 0.40 0.95 8 0 12 top & bottom top view s i de v i e w end view detail a mkt-mua08arevb notes: a. conforms to jedec mo-187 b, dimensions are in m m c. di me nsions a re exclusive of b urrs, mo ld flash, and tie bar extrusions d. dimensions and tolerances are per asme y14.5m, 1994 land pattern recommendation e landpattern as per ipc7351 #tsop65p490x110-8b l (4.20) (0.45) 0.65 (5.50) (1.30) pin #1 i d quadrant c

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