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this is information on a product in full production. march 2012 doc id 022112 rev 7 1/36 36 LPS331AP mems pressure sensor: 260-1260 mbar absolute digital output barometer datasheet ? production data features 260 to 1260 mbar absolute pressure range high-resolution mode: 0.020 mbar rms low power consumption: ? low resolution mode: 5.5 a ? high resolution mode: 30 a high overpressure capa bility: 20x full scale embedded temperature compensation embedded 24-bit adc selectable odr from 1 hz to 25 hz spi and i 2 c interfaces supply voltage: 1.71 to 3.6 v high shock survivability: 10,000 g small and thin package ecopack ? lead-free compliant applications indoor and outdoor navigation enhanced gps for dead-reckoning altimeter and barometer for portable devices weather station equipment sport watches description the LPS331AP is an ultra compact absolute piezoresistive pressure sensor. it includes a monolithic sensing element and an ic interface able to take the information from the sensing element and to provide a digital signal to the external world. the sensing element cons ists of a suspended membrane realized insi de a single mono-silicon substrate. it is capable to detecting pressure and is manufactured using a dedicated process developed by st, called vensens . the vensens process allows to build a mono- silicon membrane above an air cavity with controlled gap and defined pressure. the membrane is very small compared to the traditionally built silicon micromachined membranes. membrane breakage is prevented by an intrinsic mechanical stopper. the ic interface is manufactured using a standard cmos process that allows a high level of integration to design a dedicated circuit which is trimmed to better match the sensing element characteristics. the LPS331AP is available in a small holed cap land grid array (hclga) package and it is guaranteed to operate over a temperature range extending from -40 c to +85 c. the package is holed to allow external pressure to reach the sensing element. hclga-16l (3 x 3 x 1 mm) table 1. device summary order codes temperature range [c] package packing LPS331APy -40 to +85 hclga-16l tr ay LPS331APtr tape and reel www.st.com
contents LPS331AP 2/36 doc id 022112 rev 7 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 LPS331AP block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 mechanical and electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 sensing element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.2 ic interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.3 factory calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.1 soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.1 i2c serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.2 i2c serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5.2.1 i2c operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.3 spi bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3.1 spi read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.3.2 spi write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.3.3 spi read in 3-wires mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 8 package mechanical section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
LPS331AP block diagram and pin description doc id 022112 rev 7 3/36 1 block diagram and pin description 1.1 LPS331AP block diagram figure 1. LPS331AP block diagram 1.2 pin description figure 2. pin connection am0 8 7 3 6v1 p i 2 c c s s pi s cl/ s pc s da/ s do / s di s a0/ s do s en s ing element temper a t u re s en s or s en s or b i as volt a ge a nd c u rrent b i as clock a nd timing d s p for temper a t u re compen sa tion adc + digit a l filter low noi s e a n a log front end mux v u p r s r s r s r s vdown vo u t am0 8 7 3 7v1 1 3 1 5 9 pin 1 indic a tor bottom view
block diagram and pin description LPS331AP 4/36 doc id 022112 rev 7 table 2. pin description pin# name function 1 vdd_io power supply for i/o pins 2 nc not connected 3 nc not connected 4 scl spc i 2 c serial clock (scl) spi serial port clock (spc) 5 gnd 0 v supply 6 sda sdi sdo i 2 c serial data (sda) spi serial data input (sdi) 3-wire interface serial data output (sdo) 7 sdo sa0 spi serial data output (sdo) i 2 c less significant bit of the device address (sa0) 8cs spi enable i 2 c/spi mode selection (1: i 2 c mode; 0: spi enabled) 9 int2 interrupt 2 (or data ready) 10 reserved connect to gnd 11 int1 interrupt 1 (or data ready) 12 gnd 0 v supply 13 gnd 0 v supply 14 vdd power supply 15 vcca analog power supply 16 gnd 0 v supply
LPS331AP mechanical and electrical specifications doc id 022112 rev 7 5/36 2 mechanical and electrical specifications conditions at v dd = 2.5 v, t = 25 c, unless otherwise noted. 2.1 mechanical characteristics . table 3. mechanical characteristics symbol parameter test condition min. typ. (1) 1. typical specificat ions are not guaranteed. max. unit top operating temperature range -40 ? 85 c tfull full accuracy temperature range 0?80 c pop operating pressure range 260 ? 1260 mbar pbits pressure output data ? 24 ? bits pres pressure sensitivity ? 4096 ? lsb/ mbar paccrel relative accuracy over pressure (2) 2. characterization data. parameter not tested at final test p = 800 to 1100 mbar t= 25c ? 0.1 0.2 mbar pacct absolute accuracy pressure over temperature (3) 3. embedded pwl compensation. p = 800 to 1100 mbar t = 0 +80 c - 3.2 22.6 mbar pnoise pressure noise see table 17. mbar rms tbits temperature output data ? 16 ? bits tres temperature sensitivity ? 480 ? lsb/c tacc absolute accuracy temperature t= 0~+80 c ? 2? c
mechanical and electrical specifications LPS331AP 6/36 doc id 022112 rev 7 2.2 electrical characteristics table 4. electrical characteristics symbol parameter test condition min. typ. (1) 1. typical specificat ions are not guaranteed. max. unit vdd supply voltage 1.71 ? 3.6 v vdd_io io supply voltage 1.71 ? 3.6 v idd supply current @ odrp 1 hz and odrt = 1hz see ta b l e 5 a iddpdn supply current in power-down mode t = 25 c ?0.5 ? a table 5. supply current at odrp 1 hz, odrt 1 hz symbol res_conf (hex) min. typ. max. unit idd 73 ? 5.5 ? a 75 ? 6.6 ? 77 ? 11.5 ? 78 ? 17.5 ? 7a ? 30.0 ?
LPS331AP mechanical and electrical specifications doc id 022112 rev 7 7/36 2.3 absolute maximum ratings stress above those listed as ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device under these conditions is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. note: supply voltage on any pin should never exceed 4.8 v. table 6. absolute maximum ratings symbol ratings maximum value unit vdd supply voltage -0.3 to 4.8 v vdd_io i/o pins supply voltage -0.3 to 4.8 v vin input voltage on any control pin -0.3 to vdd_io +0.3 v p overpressure 20 bar t stg storage temperature range -40 to +125 c esd electrostatic discharge protection 2 (hbm) kv this is a mechanical shock sensitive device, improper handling can cause permanent damage to the part. this is an esd sensitive device, improper handling can cause permanent damage to the part.
functionality LPS331AP 8/36 doc id 022112 rev 7 3 functionality the LPS331AP is a high resolution, digital output pressure sensor packaged in an hclga holed package. the complete device includes a sensing element based on a piezoresistive wheatstone bridge approach, and an ic interface able to take the information from the sensing element to the external world, as a digital signal. 3.1 sensing element an st proprietary process is used to obtain a mono-silic on -sized membrane for mems pressure sensors, without requiring substr ate to substrate bonding. when pressure is applied, the membrane deflection induces an imbalance in the wheatstone bridge piezoresistances, whose output signal is converted by the ic interface. intrinsic mechanical stoppers prevent breakage in case of pressure overstress, ensuring measurement repeatability. the pressure inside the buried cavity under the membrane is constant and controlled by process parameters. 3.2 ic interface the complete measurement chain consists of a low-noise capacitive amplifier, which converts the resistive unbalance of the mems sensor into an analog voltage signal, and of an analog-to-digital converter, which translates the produced signal into a digital bitstream. the converter is coupled with a dedicated reco nstruction filter which removes the high frequency components of the quantization noise and provides low rate and high resolution digital words. the pressure data can be accessed through an i 2 c/spi interface making the device particularly suitable for direct interfacing with a microcontroller. 3.3 factory calibration the ic interface is factory calibrated at three temperatures and two pressures for sensitivity and accuracy. the trimming values are stored inside the device by a non-volatile structure. whenever the device is turned on, the trimming parameters are downloaded into the registers to be employed during normal operation. this allo ws the user to employ the device without requiring any further calibration.
LPS331AP application hints doc id 022112 rev 7 9/36 4 application hints figure 3. LPS331AP electrical connection the device core is supplied through the vdd line. power supply decoupling capacitors (100 nf ceramic, 10 f aluminum) should be placed as near as possible to the supply pad of the device (common design practice). the functionality of the device and the measured data outputs are selectable and accessible through the i 2 c/spi interface. when using the i 2 c, cs must be tied high (i.e. connected to vdd_io). 4.1 soldering information the hclga package is compliant with the ecopack ? standard and it is qualified for soldering heat resistance a ccording to jedec j-std-020. cs 10? vdd 100nf gnd vdd_io sdo/sa0 sda/sdi/sdo res scl/spc digital signal from/to signal controller. signal levels are defined through proper selection of vdd_ 1 5 8 13 top view 6 9 14 16 9 5 res
digital interfaces LPS331AP 10/36 doc id 022112 rev 7 5 digital interfaces 5.1 i 2 c serial interface the registers embedded in the LPS331AP may be accessed through both the i 2 c and spi serial interfaces. the latter may be sw configured to operate either in 3-wire or 4-wire interface mode. the serial interfaces are mapped onto the same pads. to select/exploit the i 2 c interface, cs line must be tied high (i.e. connected to vdd_io). 5.2 i 2 c serial interface the LPS331AP i 2 c is a bus slave. the i 2 c is employed to write data into registers whose content can also be read back. the relevant i 2 c terminology is given in table 8. there are two signals associated with the i 2 c bus: the serial clock line (scl) and the serial data line (sda). the latter is a bi-directional line used for sending and receiving the data to/from the interface. both lines have to be connected to vdd_io through pull-up resistors. the i 2 c interface is compliant wit h fast mode (400 khz) i 2 c standards as well as with the normal mode. table 7. serial interface pin description pin name pin description cs spi enable i 2 c/spi mode selection (1: i 2 c mode; 0: spi enabled) scl/ spc i 2 c serial clock (scl) spi serial port clock (spc) sda/ sdi/ sdo i 2 c serial data (sda) spi serial data input (sdi) 3-wire interface serial data output (sdo) sa0/ sdo i 2 c less significant bit of the device address (sa0) spi serial data output (sdo) table 8. serial interface pin description term description transmitter the device which sends data to the bus receiver the device which receives data from the bus master the device which initiates a transfer, generates clock signals and terminates a transfer slave the device addressed by the master
LPS331AP digital interfaces doc id 022112 rev 7 11/36 5.2.1 i 2 c operation the transaction on the bus is started through a start (st) signal. a start condition is defined as a high to low transition on the data line while the scl line is held high. after this has been transmitted by the master, the bus is considered busy. the next byte of data transmitted after the start condition contains the address of the slave in the first 7 bits and the eighth bit tells whether the master is receiving data from the slave or transmitting data to the slave. when an address is sent, each device in the system compares the first seven bits after a start condition with its address. if they match, the device considers itself addressed by the master. the slave address (sad) associated to the LPS331AP is 101110xb. the sdo / sa0 pad can be used to modify the less significant bit of th e device address. if the sa0 pad is connected to voltage supply, lsb is ?1? (address 1011101b), otherwise if the sa0 pad is connected to ground, the lsb value is ?0? (address 1011100b). this solution permits to connect and address two different LPS331APs to the same i 2 c lines. data transfer with acknowledge is mandatory. the transmitter must release the sda line during the acknowledge pulse. the receiver must then pull the data line low so that it remains stable low during the high period of the acknowledge clock pulse. a receiver which has been addressed is obliged to generate an acknowledge after each byte of data received. the i 2 c embedded in the LPS331AP behaves like a slave device and the following protocol must be adhered to. after the start condition (st) a slave address is sent, once a slave acknowledge (sak) has be en returned, a 8-bit sub-address (sub) will be transmitted: the 7 lsb represents the actual register address while the msb enables address auto increment. if the msb of the sub field is ?1?, the sub (reg ister address) will be automatically increased to allow multiple data read/write. the slave address is completed with a read/write bit. if the bit was ?1? (read), a repeated start (sr) condition must be issued after the two sub-address bytes; if the bit is ?0? (write) the master will tran smit to the slave with direction unchanged. ta bl e 9 explains how the sad+read/write bit pattern is composed, listing all the possible configurations. table 9. sad+read/write patterns command sad[6:1] sad[0] = sa0 r/w sad+r/w read 101110 0 1 10111001 (b9h) write 101110 0 0 10111000 (b8h) read 101110 1 1 10111011 (bbh) write 101110 1 0 10111010 (bah) table 10. transfer when master is writing one byte to slave master st sad + w sub data sp slave sak sak sak table 11. transfer when master is writing multiple bytes to slave master st sad + w sub data data sp slave sak sak sak sak
digital interfaces LPS331AP 12/36 doc id 022112 rev 7 data are transmitted in byte format (data). each data transfer contains 8 bits. the number of bytes transferred per transfer is unlimited. data is transferred with the most significant bit (msb) first. if a receiver can?t receive another complete byte of data until it has performed some other functions, it can hold the clock line, scl low to force the transmitter into a wait state. data transfer only continues when the receiver is ready for another byte and releases the data line. if a slave receiver does not acknowledge the slave address (i.e. it is not able to receive because it is performing some real time function) the data line must be kept high by the slave. the master can then abort the transfer. a low to high transition on the sda line while the scl line is high is defined as a stop condition. each data transfer must be terminated by the generation of a stop (sp) condition. in order to read multiple bytes incrementing the register address, it is necessary to assert the most significant bit of the sub-address field. in other words, sub(7) must be equal to 1 while sub(6-0) represents the address of the first register to be read. in the presented communication format mak is master acknowledge and nmak is no master acknowledge. 5.3 spi bus interface the LPS331AP spi is a bus slave. the spi allows to write and read the registers of the device. the serial interface interacts with the outside world with 4 wires: cs , spc , sdi and sdo . figure 4. read and write protocol cs is the serial port enable and it is controlled by the spi master. it goes low at the start of the transmission and returns to high at the end. spc is the serial port clock and it is controlled by the spi master. it is stopped high when cs is high (no transmission). sdi and table 12. transfer when master is receiving (reading) one byte of data from slave master st sad + w sub sr sad + r nmak sp slave sak sak sak data table 13. transfer when master is receiving (reading) multiple bytes of data from slave master st sad+w sub sr sad+r mak mak nmak sp slave sak sak sak data data data cs spc sdi sdo rw ad5 ad4 ad3 ad2 ad1 ad0 di7di6di5di4di3di2di1di0 do7do6do5do4do3do2do1do0 ms
LPS331AP digital interfaces doc id 022112 rev 7 13/36 sdo are respectively the serial port data input and output. those lines are driven at the falling edge of spc and should be captured at the rising edge of spc . both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in the case of multiple bytes read/write. bit duration is the time between two falling edges of spc . the first bit (bit 0) starts at the first falling edge of spc after the falling edge of cs while the last bit (bit 15, bit 23, ...) starts at the last falling edge of spc just before the rising edge of cs . bit 0 : rw bit. when 0, the data di(7:0) is written into the device. when 1, the data do(7:0) from the device is read. in th e latter case, the chip will drive sdo at the start of bit 8. bit 1 : ms bit. when 0, the address will remain unch anged in multiple r ead/write commands. when 1, the address will be auto increment ed in multiple r ead/write commands. bit 2-7 : address ad(5:0). this is the address field of the indexed register. bit 8-15 : data di(7:0) (write mode). this is the data that is written into the device (msb first). bit 8-15 : data do(7:0) (read mode). this is the data that is read from the device (msb first). in multiple read/write commands further blocks of 8 clock periods are added. when the ms bit is 0 the address used to read/write data remains the same for every block. when ms bit is 1 the address used to read/write data is increased at every block. the function and the behavior of sdi and sdo remain unchanged. 5.3.1 spi read figure 5. spi read protocol the spi read command is performed with 16 clock pulses. the multiple byte read command is performed adding blocks of 8 clock pulses at the previous one. bit 0 : read bit. the value is 1. bit 1 : ms bit. when 0 do not increment address, when 1 increment address in multiple reading. bit 2-7 : address ad(5:0). this is the address field of the indexed register. bit 8-15 : data do(7:0) (read mode). this is the data that is read from the device (msb first). bit 16-... : data do(...-8). further data in multiple byte readings. cs spc sdi sdo rw do7 do6 do5 do4 do3 do2 do1 do0 ad5 ad4 ad3 ad2 ad1 ad0 ms
digital interfaces LPS331AP 14/36 doc id 022112 rev 7 figure 6. multiple bytes spi read protocol (2 bytes example) 5.3.2 spi write figure 7. spi write protocol the spi write command is performed with 16 clock pulses. the multiple byte write command is performed adding blocks of 8 clock pulses at the previous one. bit 0 : write bit. the value is 0. bit 1 : ms bit. when 0 do not increment the address, when 1 increment the address in multiple writings. bit 2 -7 : address ad(5:0). this is the address field of the indexed register. bit 8-15 : data di(7:0) (write mode). this is the data that is written in the device (msb first). bit 16-... : data di(...-8). further data in multiple byte writings. figure 8. multiple bytes spi write protocol (2 bytes example) cs spc sdi sdo rw do7do6do5do4do3do2do1do0 ad5 ad4 ad3 ad2 ad1 ad0 do15 do14 do13 do12 do11 do10 do9 do8 ms cs spc sdi rw di7 di6 di5 di4 di3 di2 di1 di0 ad5 ad4 ad3 ad2 ad1 ad0 ms cs spc sdi rw ad5 ad4 ad3 ad2 ad1 ad0 di7 di6 di5 di4 di3 di2 di1 di0 di15 di14 di13 di12 di11 di10 di9 di8 ms
LPS331AP digital interfaces doc id 022112 rev 7 15/36 5.3.3 spi read in 3-wires mode a 3-wires mode is entered by setting to ?1? bit sim (spi serial interface mode selection) in ctrl_reg4. figure 9. spi read protocol in 3-wires mode the spi read command is performed with 16 clock pulses: bit 0 : read bit. the value is 1. bit 1 : ms bit. when 0, do not increment the address, when 1, increment the address in multiple readings. bit 2-7 : address ad(5:0). this is the address field of the indexed register. bit 8-15 : data do(7:0) (read mode). this is the data that is read from the device (msb first). multiple read command is also available in 3-wires mode. cs spc sdi/o rw do7 do6 do5 do4 do3 do2 do1 do0 ad5 ad4 ad3 ad2 ad1 ad0 ms
register mapping LPS331AP 16/36 doc id 022112 rev 7 6 register mapping ta bl e 1 4 provides a list of the 8-bit registers embedded in the device and the related addresses. . registers marked as reserved must not be changed. the writing to those registers may cause permanent damages to the device. the content of the registers that are loaded at boot should not be changed. they contain the factory calibration values. their content is automatically restored when the device is powered-up. table 14. registers address map name type register address default function and comment hex binary reserved (do not modify) 00-07 0d - 0e reserved ref_p_xl r/w 08 0001000 00000000 ref_p_l r/w 09 0001001 00000000 ref_p_h r/w 0a 0001010 00000000 who_am_i r 0f 0001111 10111011 dummy register res_conf r/w 10 0010000 011111010 reserved (do not modify) 11-1f reserved ctrl_reg1 r/w 20 010 0000 00000000 ctrl_reg2 r/w 21 010 0001 00000000 ctrl_reg3 r/w 22 010 0010 00000000 int_cfg_reg r/w 23 0100011 00000000 int_source_reg r 24 0100100 00000000 ths_p_low_reg r/w 25 0100101 0000000 ths_p_high_reg r/w 26 0100110 0000000 status_reg r 27 010 0111 00000000 press_pout_xl_reh r 28 010 1000 output press_out_l r 29 010 1001 output press_out_h r 2a 010 1010 output temp_out_l r 2b 010 1011 output temp_out_h r 2c 010 1100 output reserved (do not modify) 2d-2f reserved amp_ctrl r/w 30 011 0000 partially reserved
LPS331AP register description doc id 022112 rev 7 17/36 7 register description the device contains a set of registers which are used to control its behavior and to retrieve pressure and temperature data. the register address, made up of 7 bits, is used to identify them and to read/write the data through the serial interface. ref_p_xl reference pressure (lsb data) address: 08h type: r/w reset: 00h description: this reference pressure register contains the lower part of the reference pressure that is sum to the sensor output pressure. the full value is ref_p_xl & ref_p_h & ref_p_l and is represented as 2?s complement. ref_p_l reference pressure (middle part) address: 09h type: r/w reset: 00h description: this register contains the middle part of the reference pressure that is sum to the sensor output pressure. the full value is ref_p_xl & ref_p_h & ref_p_l and is represented as 2?s complement. 76543210 refl7 refl6 refl5 refl4 refl3 refl2 refl1 refl0 [7:0] refl7 - refl0: reference pressure lsb data. default value: 00h 16 15 14 13 12 11 10 9 refl15 refl14 refl13 refl12 refl11 refl10 refl9 refl8 [16:9] refl15 - refl8: default value: 00h
register description LPS331AP 18/36 doc id 022112 rev 7 ref_p_h reference pressure (msb data) address: 0ah type: r/w reset: 00h description: this register contains the higher part of the reference pressure that is sum to the sensor output pressure. the full value is ref_p_xl & ref_p_h & ref_p_l and is represented as 2?s complement. res_conf(10h) pressure resolution mode address: 10h type: r/w reset: 7ah description: avgp3-avgp0 allow to select the pressure internal average. avgt2-avgt0 allow to select the temperature internal average. avgp3-avgp0 bits can be configured as described in ta b l e 1 5 . avgt2-avgt0 bits can be configured as described in ta b l e 1 6 . 24 23 22 21 20 19 18 17 refl23 refl22 refl21 refl20 refl19 refl18 refl17 refl16 [24:17] refl23 - refl16: re ference pressure msb data. default value: 00h. 76543210 rfu avgt2 avgt1 avgt0 avgp3 avgp2 avgp1 avgp0 table 15. pressure resolution configuration avgp3 avgp2 avgp1 avgp0 nr. internal average 0000 1 0001 2 0010 4 0011 8 0100 16 0101 32 0110 64 0111 128 1000 256
LPS331AP register description doc id 022112 rev 7 19/36 table 17. pressure resolution 1001 384 1010 512 (1) 1. register configuration 7ah not allowed with odr = 25hz/25hz (register ctrl_reg1). for ord 25hz/25hz the suggested configur ation for res_conf is 6ah. table 16. temperature resolution configuration avgt2 avgt1 avgt1 nr. internal average 000 1 001 2 010 4 011 8 100 16 101 32 110 64 1 1 1 128 (1) 1. register configuration 7ah not allowed with odr = 25hz/25hz (register ctrl_reg1). for ord 25hz/25hz the suggested configur ation for res_conf is 6ah. res_conf (hex) rms noise (1) 1. rms noise is calculated as standard deviation of 10 data points. unit 70 0.450 mbar 71 0.320 72 0.230 73 0.160 74 0.110 75 0.080 76 0.060 77 0.040 78 0.030 79 0.025 7a (2) 2. this configuration is not allowed for odr = 25h z/25hz (register ctrl_reg1). for ord = 25 hz/ 25 hz the suggested configuration for res_conf is 6ah. 0.020 table 15. pressure resolution configuration avgp3 avgp2 avgp1 avgp0 nr. internal average
register description LPS331AP 20/36 doc id 022112 rev 7 who_am_i device identification address: 0fh type: r description: this read-only register contains the device identifier that, for LPS331AP, is set to bbh. ctrl_reg1 control register 1 address: 20h type: r/w description: control register. pd bit allows to turn on the device. the device is in power-down mode when pd = ?0? (default value after boot). the device is active when pd is set to ?1?. odr2- odr1 - odr0 bits allow to change the output data rates of pressure and temperature samples. the default value is ?000? which corresponds to ?one shot configuration? for both pressure and temperature output. odr2, odr1 and odr0 bits can be configured as described in ta bl e 1 8 . note: before changing the odr it is necessary to power down the device (ctrl_reg1[7]). 76543210 10111011 76543210 pd odr2 odr1 odr0 diff_en dbdu delta_en sim [7] pd: power down control. default value: 0 (0: power-down mode; 1: active mode) [6:4] odr2, odr1, odr0: output data rate selection. default value: 00 (see ta bl e 1 8 ) [3] diff_en: interrupt circuit enable. default value: 0 (0: interrupt generation disabled; 1: interrupt circuit enabled) [2] bdu: block data update. default value: 0 (0: continuous update; 1: ou tput registers not updated until msb and lsb reading) [1] delta_en: delta pressure enable (1: delta pressure registers enabled. 0: disable) [0] sim: spi serial interface mode selection. default value: 0 (0: 4-wire interface; 1: 3-wire interface)
LPS331AP register description doc id 022112 rev 7 21/36 diff_en bit is used to enable the circuitry for the computing of differential pressure output. in default mode (dif_en=?0?) the circuitry is turned off. it is suggested to turn on the circuitry only after the configuration of ref_p_x and ths_p_x. bdu bit is used to inhibit the output registers update between the reading of upper and lower register parts. in default mode (bdu = ?0?), the lower and upper register parts are updated continuously. if it is not sure to read faster than output data rate, it is recommended to set bdu bit to ?1?. in this way, after the reading of the lower (upper) register part, the content of that output registers is not updated until the upper (lower) part is read too. this feature avoids reading lsb and msb related to different samples. sim bit selects the spi serial interface mode. when sim is ?0? (default value) the 4-wire interface mode is selected and data coming from the device are sent to pin #7 (sdo). in 3-wire interface mode, output data are sent to pin #6 (sdi/sdo). table 18. output data rate bit configurations odr2 odr1 odr0 pressure output data rate temperature output data rate 0 0 0 one shot one shot 001 1hz 1hz 010 7hz 1hz 011 12.5hz 1hz 100 25hz 1hz 101 7hz 7hz 1 1 0 12.5 hz 12.5 hz 1 1 1 25 hz 25 hz
register description LPS331AP 22/36 doc id 022112 rev 7 ctrl_reg2 control register 2 address: 21h type: r/w description: control register. boot bit is used to refresh the content of the internal registers stored in the flash memory block. at the device power-up the content of the flash memory block is transferred to the internal registers related to trimming functions to permit a good behavior of the device itself. if for any reason, the content of the trimming registers is modified, it is sufficient to use this bit to restore the correct values. when boot bit is set to ?1? the content of the internal flash is copied inside the corresponding internal registers and is used to calibrate the device. these values are factory trimmed and they are different for every device. they permit good behavior of the device and normally they should not be changed. at the end of the boot process the boot bit is set again to ?0?. boot bit takes effect after one odr clock cycle. swreset is the software reset bit. the device is reset to the power on configuration if the swreset bit is set to ?1? and boot is set to ?1?. auto_zero, when set to ?1?, the actual pressure output is copied in the ref_p_h & ref_p_l & ref_p_xl and kept as refe rence and the press_out_h & press_out_l & press _out_xl is the difference between this reference and the pressure sensor value. one_shot bit is used to start a new conversi on when odr1-odr0 bits in ctrl_reg1 are set to ?000?. in this situation a single acquisition of temperature and pressure is started when one_shot bit is set to ?1?. at the end of conversion the new data are available in the output registers, the staus_reg[0] and staus_reg[1] bits are set to ?1? and the one_shot bit comes back to ?0? by hardware. 76543210 boot reserved swreset auto_zero one_shot [7] boot: reboot memory content. default value: 0 (0: normal mode; 1: reboot memory content) [6:3] reserved [2] software reset. default value: 0 (0: normal mode; 1: software reset) [1] autozero enable. default value: 0 (0: normal mode; 1: autozero enable) [0] one shot enable. default value: 0 (0: waiting for start of conversion; 1: start for a new dataset)
LPS331AP register description doc id 022112 rev 7 23/36 ctrl_reg3 interrupt control address: 22h type: r/w description: control register. the device features two fully-programmable interrupt sources ( int1 and int2 ) which may be configured to trigger different pressure events. figure 10 shows the block diagram of the interrupt generation block and output pressure data. the device may also be configured to generate, through interrupt pins, a data ready signal ( drdy ) which indicates when a new measured pressu re data is available, thus simplifying data synchronization in digital systems. 76543210 int_h_l pp_od int2_s3 int2_s2 int2_s1 int1_s3 int1_s2 int1s1 [7] int_h_l: interrupt active high, low. default value: 0 (0: active high; 1: active low) [6] pp_od: push-pull/open drain selection on interrupt pads. default value: 0 (0: push-pull; 1: open drain) [5:3] int2_s3, int2_s2, int2_s1: data signal on int2 pad control bits. default value: 00 (see table 19. ) [2:0 int1_s3, int1_s2, int1_s1: data signal on int1 pad control bits. default value: 00 (see table 19. ) table 19. interrupt configurations int1(2)_s3 int1(2)_s2 in t1(2)s1 int1(2) pin 000 gnd 0 0 1 pressure high (p_high) 0 1 0 pressure low (p_low) 011p_low or p_high 100 data ready 101 reserved 110 reserved 111 tri-state
register description LPS331AP 24/36 doc id 022112 rev 7 figure 10. interrupt generation block and output pressure data. interrupt_cfg interr upt configuration address: 23h type: r/w reset: 00h description: interrupt configuration. 76543210 reserved lir pl_e ph_e am0 8 7 38 v1 high press int low press int press threshold reference press press threshold positive negative sensor output pressure press_out_h & press_out_l & press_out_xl reference pressure ref_p_h & ref_p_l & ref_p_xl + - pressure threshold ths_p_h & ths_p_l - + - + -1 low press interrupt pl high press interrupt ph [7:3] reserved [2] lir: latch interrupt request into in t_source register. default value: 0. (0: interrupt request not latched; 1: interrupt request latched) [1] pl_e: enable interrupt generation on differ ential pressure low event. default value: 0. (0: disable interrupt request; 1: enable interrupt request on measured differentia l pressure value lower than preset threshold) [0] ph_e: enable interrupt generation on differential pressure high event. default value: 0 (0: disable interrupt request; 1:enable interrupt request on measured differential pressure value higher than preset threshold)
LPS331AP register description doc id 022112 rev 7 25/36 int_source interrupt source address: 24h type: r reset: 00h description: int_source register is cleared by reading int_ack register. ths_p_l threshold pressure (lsb ) address: 25h type: r/w reset: 00h description: this register contains the low part of threshold value for pressure interrupt generation. the complete threshold value is given by ths_p_h & ths_p_l and is expressed as unsigned number. 76543210 00000iaplph [7:3] 0 [2] ia: interrupt active. (0: no interrupt has been generated; 1: one or more interrupt events have been generated). [1] pl: differential pressure low. (0: no interrupt has been generated; 1: low differential pressure event has occurred). [0] ph: differential pressure high. (0: no interrupt has been generated; 1: high differential pressure event has occurred). 76543210 ths7 ths6 ths5 ths4 ths3 ths2 ths1 ths0 [7:0] ths7 - ths0: threshold pressure lsb. default value: 00h.
register description LPS331AP 26/36 doc id 022112 rev 7 ths_p_h threshold pressure (msb) address: 26h type: r/w reset: 00h description: this register contains the high part of the threshold value for pressure interrupt generation. the complete threshold value is given by ths_p_h & ths_p_l and is expressed as unsigned number. p_ths(mbar)=(ths_p_h & ths_p_l)[dec]/16. status_reg status register address: 27h type: r reset: 00h description: the content of this register is updated every odr cycle, regardless of bdu value in ctrl_reg1. p_da is set to 1 whenever a new pressure sample is available. p_da is cleared anytime press_out_h (29h ) register is read. t_da is set to 1 whenever a new temperature sample is available. t_da is cleared anytime temp_out_h (2bh) register is read. p_or bit is set to '1' whenever new pressure data is available and p_da was set in the previous odr cycle and not cleared. p_or is cleared anytime press_out_h (29h) register is read. t_or is set to ?1? whenever new temperature data is available and t_da was set in the previous odr cycle and not cleared. t_or is cleared anytime temp_out_h (2bh) register is read. 15 14 13 12 11 10 9 8 ths15 ths14 ths13 ths12 ths11 ths10 ths9 ths8 [15:8] ths7 - ths0: threshold pressure msb. default value: 00h. 76543210 0 0 p_or t_or 0 0 p_da t_da [7:6] 0 [5] p_or: pressure data overrun. default value: 0 (0: no overrun has occurred; 1: new data for pressure has overwritten the previous one) [4] t_or: temperature data ov errun. default value: 0 (0: no overrun has occurred; 1: a new data for temperature has overwritten the previous one)
LPS331AP register description doc id 022112 rev 7 27/36 press_out_xl pressure data (lsb) address: 28h type: r reset: 00h description: pressure data. press_out_l pressure data address: 29h type: r reset: 80 description: pressure data. [3:2] 0 [1] p_da: pressure data available. default value: 0 (0: new data for pressure is not yet available; 1: new data for pressure is available) [0] t_da: temperature data available. default value: 0 (0: new data for temperature is not yet available; 1: new data for temperature is available) 76543210 pout7 pout6 pout5 pout4 pout3 pout2 pout1 pout0 [7:0] pout7 - pout0: pressure data lsb 15 14 13 12 11 10 9 8 pout15 pout14 pout13 pout12 pout11 pout10 pout9 pout8 [15:8] pout15 - pout8: pressure data
register description LPS331AP 28/36 doc id 022112 rev 7 press_out_h (2ah) pressure data (msb) address: 2ah type: r reset: 2f description: pressure data are expressed as press_out_h & press_out_l & press_out_xl in 2?s complement. values exceeding the o perating pressure range (see table 3) are clipped. pressure output data: pout(m bar)=(press_out_h & press_out_l & press_out_xl)[dec]/4096 24 23 22 21 20 19 18 17 pout23 pout22 pout21 pout20 pout19 pout18 pout17 pout16 [24:17] pout23 - pout16: pressure data msb
LPS331AP register description doc id 022112 rev 7 29/36 temp_out_l (2bh) temperature data (lsb) address: 2bh type: r reset: 00h temp_out_h (2ch) tem perature data (msb) address: 2ch type: r reset: 00h temperature data are expressed as temp_out_h & temp_out_l as 2?s complement numbers. temperature output data: t(degc) = 42.5 + (temp_outh & temp_out_l)[dec]/480 76543210 tout7 tout6 tout5 tout4 tout3 tout2 tout1 tout0 [7:0] tout7 - tout0: temperature data lsbl 15 14 13 12 11 10 9 8 tout15 tout14 tout13 tout12 tout11 tout10 tout9 tout8 [15:8] tout15 - tout8: temperature data msb.
register description LPS331AP 30/36 doc id 022112 rev 7 amp_ctrl analog front end control address: 2dh type: r/w reset: 00h delta_press_xl (3ch) pressure offset address: 3ch type: r/w reset: 00h delta_press_l (3dh ) pressure offset address: 3dh type: r/w reset: 00h 76543210 reserved selmain [7:1] reserved [0] selmain: current of opera tional amplifier selector ?1? always high current ?0? high current during pressure acquisition and low current during temperature acquisition 76543210 d e lta 7 d e lta 6 d e lta 5 d e lta 4 d e lta 3 d e lta 2 d e lta 1 d e lta 0 [7:0] delta0 - delta7: delta pressure register for one point calibration 15 14 13 12 11 10 9 8 delta15 delta14 delta13 delta12 delta11 delta10 delta9 delta8 [15:8] delta15-delta8: delta pressure register for one point calibration
LPS331AP register description doc id 022112 rev 7 31/36 delta_press_l (3eh ) pressure offset address: 3eh type: r/w reset: 00h delta_press registers are used to store the one point calibration value to eliminate accuracy shift after soldering. delta_press acts on the output pressure when ctrl_reg1[1] delta_en is set to ?1?. 24 23 22 21 20 19 18 17 delta23 delta22 delta21 delta20 delta19 delta18 delta17 delta16 [23:16] delta23-delta16: de lta pressure register for one point calibration
package mechanical section LPS331AP 32/36 doc id 022112 rev 7 8 package mechanical section in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack is an st trademark. figure 11. package outline for hclga-16l (3 x 3 x 1 mm)
LPS331AP package mechanical section doc id 022112 rev 7 33/36 table 20. hclga-16l (3 x 3 x 1 mm) mechanical data figure 12. tray information symbol millimeters min typ max e1 2.850 3.000 3.150 e3 ? 0 ? d1 2.850 3.000 3.150 d3 ? 0.700 ? r1 ? 0.400 ? a1 ? 1.000 ? l1 ? 1.000 ? n1 ? 0.500 ? l2 ? 2.000 ? n2 ? 1.000 ? p1 ? 0.875 ? p2 ? 1.275 ? t1 ? 0.350 ? t2 ? 0.250 ? d ? 0.150 ? k ? 0.050 ? m ? 0.100 ?
package mechanical section LPS331AP 34/36 doc id 022112 rev 7 figure 13. tape information
LPS331AP revision history doc id 022112 rev 7 35/36 9 revision history table 21. document revision history date revision changes 12-aug-2011 1 initial release. 16-aug-2011 2 ? updated order code in table 1: device summary ? minor formatting and text modifications throughout the document 20-oct-2011 3 ? updated: features list, ta bl e 3 , ta b l e 6 , section 4 and section 7 . ? added: ta bl e 1 7 , figure 12 and figure 13 . 15-dec-2011 4 ? modified: minor text updates in the features section, ta b l e 3 , ta b l e 4 , ta b l e 5 , section 3.1: sensing element and figure 11 . 13-jan-2012 5 modified: ? temperature range in ta b l e 1 from ?-20 to +105? to ?-40 to +85?. ? temperature output data in register temp_out_h (2ch) from ?42.5? to ?22.5?. ? pacct test cond ition data in ta b l e 3 from ?p = 260 to 1260 mbar? to ?p = 800 to 1100 mbar? ? device operating range in description on page 1 from ? -20 c to +105 c? to ?-40 c to +85 c? 27-feb-2012 6 document status prom oted from preliminary data to datasheet. modified: ? temperature output data in register temp_out_h (2ch) from ?22.5? to ?42.5? ? added register address in register delta_press_xl (3ch) and modified register address in delta_press_l from ?3dh? to ?3eh?. 29-mar-2012 7 modified the description for pin 14 in ta bl e 2 and the list of applications in the cover page.
LPS331AP 36/36 doc id 022112 rev 7 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by two authorized st representatives, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2012 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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