RT9807 1 ds9807-01 april 2011 www.richtek.com general description the RT9807 is a micro -power voltage detector with deglitched manual reset input which supervises the power supply voltage level for microprocessors ( p) or digital systems. it provides internally fixed threshold levels ranging from 1.2v to 3.3v with 0.1v per step, which covers most digital applications. it features low supply current of 3 a. the RT9807 performs supervisory function by sending out a reset signal whenever the vdd voltage falls below a preset threshold level. the timeout period of this reset signal can be adjusted via an external capacitor. once vdd recovers above the threshold level, the reset signal will be released after a certain delay time. to manually pull reset signal low, just pull the manual reset input (mr) below the specified logic-low level. the RT9807 is available in an sot-2 3-5 package. note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. ordering information pin configurations (top view) sot-23-5 micro-power voltage detector with manual reset features z z z z z monitor system voltages from 0.9v to 5.5v z z z z z capacitor-adjustable reset timeout period z z z z z manual reset input z z z z z low quiescent current z z z z z high accuracy 1.5% z z z z z low functional supply voltage 0.9v z z z z z n-channel open-drain output z z z z z small sot-23-5 package z z z z z rohs compliant and halogen free applications z computers z controllers z intelligent instruments z critical up and uc power monitoring z portable/battery-powered equipment typical application circuit marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area. gnd vdd ct 4 23 5 rst mr RT9807 gnd reset rst vdd 2 3 51 mr c in 1uf c ct 10nf ct r 470k 4 v dd RT9807- package type b : sot-23-5 lead plating system g : green (halogen free and pb free) output voltage 12 : 1.2v 13 : 1.3v : 32 : 3.2v 33 : 3.3v
RT9807 2 ds9807-01 april 2011 www.richtek.com recommended operating conditions (note 4) z junction temperature range -------------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range -------------------------------------------------------------------------------------------- ? 40 c to 85 c function block diagram functional pin description pin no. pin name pin function 1 rst reset output pin. (open drain) 2 gnd ground pin. 3 mr manual reset pin. 4 ct connect an external capacitor for setting reset timeout period. 5 vdd supply voltage input pin. absolute maximum ratings (note 1) z supply input voltage, v dd ----------------------------------------------------------------------------------------------- ? 0.3v to 6v z reset output v oltage, rst --------------------------------------------------------------------------------------------- ? 0.3v to 6v z other pins ------------------------------------------------------------------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c sot-23-5 -------------------------------------------------------------------------------------------------------------------- 0.4w z package thermal resistance (note 2) sot-23-5, ja --------------------------------------------------------------------------------------------------------------- 250 c/w z junction temperature range -------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 se c.) ------------------------------------------------------------------------------- 260 c z storage temperature range -------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd suscep tibility (note 3) hbm (human body mode) ---------------------------------------------------------------------------------------------- 2kv mm (ma chine mode) ------------------------------------------------------------------------------------------------------ 200v timeout setting comparator v ref manual reset vdd rst ct n-mosfet gnd mr + -
RT9807 3 ds9807-01 april 2011 www.richtek.com electrical characteristics (t a = 25 c, unless otherwise specified) parameter symbol test conditions min typ max unit operating vdd range v dd 0.9 -- 5.5 v supply current i dd v th = 3v, v dd = 4.5v -- 3 5 a reset threshold v th 1.2 -- 3.3 v threshold voltage accuracy v th ? 1.5 -- 1.5 % threshold voltage hysteresis v hys -- 50 x v th -- mv reset threshold tempco -- 100 -- ppm/ c vdd drop to reset delay t rp drop = v th ? 250mv -- 100 -- s rst output voltage low (note 5) v ol v dd < v th(min.) , i sink = 3.5ma -- -- 0.4 v logic-high v ih 0.7v dd -- -- mr input threshold voltage logic-low v il -- -- 0.25v dd v mr glitch rejection -- 80 -- ns mr to reset propagation delay t mr -- 2 -- s mr pull-up resistance r mr -- 20 -- k c ct = 1500pf 3.35 4.375 5.40 reset timeout period t rp c ct = 0pf -- 0.275 -- ms ct source current i ramp -- 240 -- na ct source threshold voltage v th-ramp -- 0.65 -- v ct threshold hysteresis -- 33 -- mv note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in natural convection at t a = 25 c on a low effective thermal conductivity test board of jedec 51-3 thermal measurement standard. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. note 5. the voltage v ol can be calculated by v ol = v dd - i r x r. where r is the pull-up resistor and i r is the current flowing through the pull-up resistor. for typical application r = 100k , vol is less than 0.2v.
RT9807 4 ds9807-01 april 2011 www.richtek.com typical operating characteristics detector threshold vs. temperature 1.4 1.45 1.5 1.55 1.6 1.65 1.7 -50 -25 0 25 50 75 100 125 temperature (c) detector threshold (v) v dd = 5v, ct open, r = 470k rising falling supply current vs. input voltage 0 1 2 3 4 5 6 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) supply current ( a ) t a = ? 40 c t a = 25 c t a = 125 c ct open t a = 85 c ct threshold voltage vs. temperature 0.6 0.61 0.62 0.63 0.64 0.65 0.66 0.67 -50 -25 0 25 50 75 100 125 temperature (c) ct threshold voltage (v) rising falling r = 470k power on reset delay time vs. temperature 100 150 200 250 300 350 -50 -25 0 25 50 75 100 125 temperature (c) power on reset delay time ( s) v dd = 5v, ct open, r = 470k vdd drop reset delay time vs. temperature 50 70 90 110 130 150 -50-25 0 25 50 75100125 temperature (c) vdd drop reset delay time ( s) v dd = 5v, ct open, r = 470k reset delay time vs capacitance 0.1 1 10 100 1000 10000 0.001 0.01 0.1 1 10 100 1000 capacitance (nf) reset delay time (ms) v dd = 5v, r = 470k
RT9807 5 ds9807-01 april 2011 www.richtek.com application information the RT9807 provides adjustable reset delay time to fit the need of a variety of p applications. the reset delay time of the RT9807 ca n be adjusted by connecting a capacitor between the ct pin and gnd. the ct capacitor must fit the need of low-leakage (<10na), and it is recommended to use a ceramic capacitor such as x7r or npo type. reset delay time setting when the vdd voltage exceeds th e vdd threshold voltage, a current source will start to charge the ct capacitor and the ct voltage will rise. when the ct voltage exceeds 0.65v, the rst voltage will change from low to high. therefore, there is a delay time between the point of vdd reaching its threshold voltage and the rst active-high point. the delay time can be calculated according to the following equation. vdd voltage v ct delay time 0.65v gnd gnd gnd vdd threshold voltage rst voltage operating with a voltage divider the voltage detector monitors the v cc voltage to generate a reset signal when v cc is higher than the detecting level. the detecting level is determined by an external resistive voltage divider. RT9807 ct vdd gnd r c ct v cc r1 r1 rst figure 1. delay time cc_th th th cc_hys hys r1 v = v x 1 + , v : threshold voltage. r2 r1 v = v x 1 + r2 ?? ?? ?? ?? ?? ?? the rising and falling of the vcc and rst voltage can be explained in five steps as shown in the following diagram. figure 2. voltage divider delay 6 ct 0.58 t ( s) = + 220 0.18 x 10 x c ( f) figure 3. operation diagram 12 3 4 5 hysteresis range gnd gnd power-on reset delay time vcc minimum operation voltage v cc_th a b v cc_th C hysteresis voltage rst voltage drop reset delay time 1. rst voltage is pulled up to vcc voltage. 2. when the vcc voltage is down to the detector threshold voltage (point a), rst voltage becomes low level. 3. when the vcc voltage is lower than minimum operating voltage, the rst voltage is indefinite. in the case of open drain type, rst voltage is equal to pull-up voltage. 4. rst voltage becomes low level. 5. when the vcc voltage exceeds the threshold voltage (point b), the internal source current will start to charge ct capacitor. the rst voltage will go high after a delay time when the ct capacitor voltage reaches 0.65v.
RT9807 6 ds9807-01 april 2011 www.richtek.com interfacing to other voltages the RT9807 is an open-drain voltage detector that can provide different voltage level of reset signals for processor application. as shown in figure 4, the open-drain output can be connected to another voltage level less than 5.5v. this allows for easy logic compatibility to various microprocessors. thermal considerations for continuous operation, do not exceed absolute maximum operatio n junction temperature. the maximum power dissipation depends on the thermal resistance of ic package, pcb layout, the rate of surroundings airflow and temperature difference between junction to ambient. the maximum power dissipation can be calculated by following formula : p d(max) = ( t j(max) ? t a ) / ja where t j(max) is the maximum operation junction temperature, t a is the ambient temperature and the ja is the junction to ambient thermal resistance. for recommended operating conditions specification of the RT9807, the maximum junction temperature is 125 c. the junction to ambient thermal resistance ja is layout dependent. for sot-23-5 package, the therm al resistance ja is 250 c/w on the standard jedec 51-3 single layer thermal test board. the maximum power dissipation at manual reset input many processor based products require manual reset capability, allowing the user or external logic circuitry to initiate a reset. a logic low on mr asserts reset. reset remains asserted while mr is low and for the reset timeout period after mr returns high. connect a normally open momentary switch from mr to ground to create a manual reset function. layout considerations ct is a precise current so urce. when developing the layout for the application, be careful to minimize board capacitance and leakage currents around this pin. traces connected to ct should be kept as short as possible. traces carrying high-speed digital signals and traces with large voltage potentials should be routed as far from ct as possible. leakage current and stray capacitance (e.g., a scope probe) at this pin can cause errors in the reset delay time. gnd ct gnd vdd 4 2 3 5 1 r c in sw c ct should be placed as close as possible to the ic. rst c ct mr figure 6. pcb layout guide figure 4 t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (250 c/w) = 0.4w for sot-23-5 package the maximum power dissipation depends on operating ambient temperature for fixed t j(max) and thermal resistance ja . for RT9807 package, the derating curve in figure 5 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 5. derating curve for RT9807 package 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) sot-23-5 single layer pcb RT9807 vdd gnd 3.3v 470k 5v system 5v 1f rst rst
RT9807 7 ds9807-01 april 2011 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property inf ringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications i s assumed by richtek. richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension a a1 e b b d c h l sot-23-5 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.889 1.295 0.035 0.051 a1 0.000 0.152 0.000 0.006 b 1.397 1.803 0.055 0.071 b 0.356 0.559 0.014 0.022 c 2.591 2.997 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024
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