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+3 v/+5 v/5 v cmos 4- and 8-channel analog multiplexers adg658/adg659 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2004C2009 analog devices, inc. all rights reserved. features 2 v to 6 v dual supply 2 v to 12 v single supply automotive temperature range ?40c to +125c <0.1 na leakage currents 45 on resistance over full signal range rail-to-rail switching operation single 8-to-1 multiplexer adg658 differential 4-to-1 multiplexer adg659 16-lead lfcsp/tssop/qsop packages typical power consumption <0.1 w ttl/cmos compatible inputs package upgrades to 74hc4051/74hc4052 and max4051/max4052/max4581/max4582 applications automotive applications automatic test equipment data acquisition systems battery-powered systems communication systems audio and video signal routing relay replacement sample-and-hold systems industrial control systems functional block diagram s1 s 8 s1a s4b s4a d db da a0 a1 en a0 a1 a2 1 of 8 decoder 1 of 4 decoder switches shown for a logic 1 input adg659 s1b 03273-0-001 en adg658 figure 1. general description the adg658 and adg659 are low voltage, cmos analog multiplexers comprised of eight single channels and four differential channels, respectively. the adg658 switches one of eight inputs (s1Cs8) to a common output, d, as determined by the 3-bit binary address lines a0, a1, and a2. the adg659 switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines a0 and a1. an en input on both devices is used to enable or disable the device. when disabled, all channels are switched off. these parts are designed on an enhanced process that provides lower power dissipation yet gives high switching speeds. these parts can operate equally well as either multiplexers or demultiplexers and have an input range that extends to the supplies. all channels exhibit break-before-make switching action, preventing momentary shorting when switching channels. all digital inputs have 0.8 v to 2.4 v logic thresholds, ensuring ttl/cmos logic compatibility when using single +5 v or dual 5 v supplies. the adg658 and adg659 are available in 16-lead tssop/ qsop packages and 16-lead 4 mm 4 mm lfcsp packages. product highlights 1. single- and dual-supply operation. the adg658 and adg659 offer high performance and are fully specified and guaranteed with 5 v, +5 v, and +3 v supply rails. 2. automotive temperature range ?40c to +125c. 3. low power consumption, typically <0.1 w. 4. 16-lead 4 mm 4 mm lfcsp packages, 16-lead tssop package and 16-lead qsop package.
adg658/adg659 rev. b | page 2 of 20 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? product highlights ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? dual supply ................................................................................... 3 ? 5 v single supply .......................................................................... 5 ? 2.7 v to 3.6 v single supply ........................................................ 7 ? absolute maximum ratings ............................................................9 ? esd caution...................................................................................9 ? pin configurations and function descriptions ......................... 11 ? typical performance characteristics ........................................... 13 ? test circuits ..................................................................................... 16 ? outline dimensions ....................................................................... 19 ? ordering guide ............................................................................... 20 ? revision history 2/09rev. a to rev. b changes to ordering guide .......................................................... 20 7/04rev. 0 to rev. a updated format .................................................................. universal added qsop package outline ..................................................... 20 changes to ordering guide .......................................................... 20 3/03rev. 0: initial version
adg658/adg659 rev. b | page 3 of 20 specifications dual supply v dd = +5 v 10%, v ss = ?5 v 10%, gnd = 0 v, unless otherwise noted. table 1. b version y version parameter +25c ?40c to +85c ?40c to+125c unit test conditions/comments analog switch analog signal range v ss to v dd v v dd = +4.5 v, v ss = ?4.5 v on resistance (r on ) 45 typ v s = 4.5 v, i s = 1 ma; see figure 21 75 90 100 max on resistance match between 1.3 typ channels (?r on ) 3 3.2 3.5 max v s = 3.5 v, i s = 1 ma on resistance flatness (r flat(on) ) 10 typ v dd = +5 v, v ss = ?5 v; 16 17 18 max v s = 3 v, i s = 1 ma leakage currents v dd = +5.5 v, v ss = ?5.5 v source off leakage i s (off) 0.005 na typ v d = 4.5 v, v s = 4.5 v; see m figure 22 0.2 5 na max drain off leakage i d (off) 0.005 na typ v d = 4.5 v, v s = 4.5 v; see m figure 23 adg658 0.2 5 na max adg659 0.1 2.5 na max channel on leakage i d , i s (on) 0.005 na typ v d = v s = 4.5 v; see figure 24 adg658 0.2 5 na max adg659 0.1 2.5 na max digital inputs input high voltage, v inh 2.4 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 1 a max c in , digital input capacitance 2 pf typ dynamic characteristics 1 t transition 80 ns typ r l = 300 , c l = 35 pf 115 140 165 ns max v s = 3 v; see figure 25 t on ( en ) 80 ns typ r l = 300 , c l = 35 pf 115 140 165 ns max v s = 3 v; see figure 27 t off ( en ) 30 ns typ r l = 300 , c l = 35 pf 45 50 55 ns max v s = 3 v; see figure 27 break-before-make time delay, t bbm 50 ns typ r l = 300 , c l = 35 pf 10 ns min v s1 = v s2 = 3 v; see figure 26 charge injection 2 pc typ v s = 0 v, r s = 0 , 4 pc max c l = 1 nf; see figure 28 off isolation ?90 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 total harmonic distortion, thd + n 0.025 % typ r l = 600 , 2 v p-p, f = 20 hz to 20 khz channel-to-channel crosstalk (adg659) ?90 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 31 ?3 db bandwidth adg658 210 mhz typ r l = 50 , c l = 5 pf; see figure 30 adg659 400 mhz typ
adg658/adg659 rev. b | page 4 of 20 b version y version parameter +25c ?40c to +85c ?40c to+125c unit test conditions/comments c s (off) 4 pf typ f = 1 mhz c d (off) adg658 23 pf typ f = 1 mhz adg659 12 pf typ f = 1 mhz c d , c s (on) adg658 28 pf typ f = 1 mhz adg659 16 pf typ f = 1 mhz power requirements v dd = +5.5 v, v ss = ?5.5 v i dd 0.01 a typ digital inputs = 0 v or 5.5 v 1 a max i ss 0.01 a typ digital inputs = 0 v or 5.5 v 1 a max 1 guaranteed by design; not subject to production test.
adg658/adg659 rev. b | page 5 of 20 5 v single supply v dd = 5 v 10%, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 2. b version y version parameter +25c ?40c to +85c ?40c to +125c unit test conditions/comments analog switch analog signal range 0 to v dd v v dd = 4.5 v, v ss = 0 v on resistance (r on ) 85 typ v s = 0 v to 4.5 v, i s = 1 ma; see figure 21 150 160 200 max on resistance match between 4.5 typ v s = 3.5 v, i s = 1 ma channels (?r on ) 8 9 10 max on resistance flatness (r flat(on) ) 13 14 16 typ v dd = 5 v, v ss = 0 v, v s = 1.5 v to 4 v, i s = 1 ma leakage currents v dd = 5.5 v source off leakage i s (off) 0.005 na typ v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 22 0.2 5 na max drain off leakage i d (off) 0.005 na typ v s = 1 v/4.5 v, v d = 4.5 v/1 v; see figure 23 adg658 0.2 5 na max adg659 0.1 2.5 na max channel on leakage i d , i s (on) 0.005 na typ v s = v d = 1 v or 4.5 v, see figure 24 adg658 0.2 5 na max adg659 0.1 2.5 na max digital inputs input high voltage, v inh 2.4 v min input low voltage, v inl 0.8 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 1 a max c in , digital input capacitance 2 pf typ dynamic characteristics 1 t transition 120 ns typ r l = 300 , c l = 35 pf 200 270 300 ns max v s = 3 v; see figure 25 t on ( en ) 120 ns typ r l = 300 , c l = 35 pf 190 245 280 ns max v s = 3 v; see figure 27 t off ( en ) 35 ns typ r l = 300 , c l = 35 pf 50 60 70 ns max v s = 3 v; see figure 27 break-before-make time delay, t bbm 100 ns typ r l = 300 , c l = 35 pf 10 ns min v s1 = v s2 = 3 v; see figure 26 charge injection 0.5 pc typ v s = 2.5 v, r s = 0 , c l = 1 nf; see figure 28 1 pc max off isolation ?90 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 channel-to-channel crosstalk ?90 db typ r l = 50 , c l = 5 pf; f = 1 mhz; see figure 31 (adg659) ?3 db bandwidth adg658 180 mhz typ r l = 50 , c l = 5 pf; see figure 30 adg659 330 mhz typ c s (off) 5 pf typ f = 1 mhz c d (off) adg658 29 pf typ f = 1 mhz adg659 15 pf typ f = 1 mhz
adg658/adg659 rev. b | page 6 of 20 b version y version parameter +25c ?40c to +85c ?40c to +125c unit test conditions/comments c d , c s (on) adg658 30 pf typ f = 1 mhz adg659 16 pf typ f = 1 mhz power requirements v dd = 5.5 v i dd 0.01 a typ digital inputs = 0 v or 5.5 v 1 a max 1 guaranteed by design; not subject to production test.
adg658/adg659 rev. b | page 7 of 20 2.7 v to 3.6 v single supply v dd = 2.7 to 3.6 v, v ss = 0 v, gnd = 0 v, unless otherwise noted. table 3. b version y version parameter +25c ?40c to +85c ?40c to +125c unit test conditions/comments analog switch analog signal range 0 to v dd v v dd = 2.7 v, v ss = 0 v on resistance (r on ) 185 typ v s = 0 v to 2.7 v, i s = 0.1 ma; see figure 21 300 350 400 max on resistance match between 2 typ v s = 1.5 v, i s = 0.1 ma channels (?r on ) 4.5 6 7 max leakage currents v dd = 3.3 v source off leakage i s (off) 0.005 na typ v s = 1 v/3 v, v d = 3 v/1 v; see figure 22 0.2 5 na max drain off leakage i d (off) 0.005 na typ v s = 1 v/3 v, v d = 3 v/1 v; see figure 23 adg658 0.2 5 na max adg659 0.1 2.5 na max channel on leakage i d , i s (on) 0.005 na typ v s = v d = 1 v or 3 v, see figure 24 adg658 0.2 5 na max adg659 0.1 2.5 na max digital inputs input high voltage, v inh 2.0 v min input low voltage, v inl 0.5 v max input current i inl or i inh 0.005 a typ v in = v inl or v inh 1 a max c in , digital input capacitance 2 pf typ dynamic characteristics 1 t transition 200 ns typ r l = 300 , c l = 35 pf 370 440 490 ns max v s = 1.5 v; see figure 25 t on ( en ) 230 ns typ r l = 300 , c l = 35 pf 370 440 490 ns max v s = 1.5 v; see figure 27 t off ( en ) 50 ns typ r l = 300 , c l = 35 pf 80 90 110 ns max v s = 1.5 v; see figure 27 break-before-make time delay, t bbm 200 ns typ r l = 300 , c l = 35 pf 10 ns min v s1 = v s2 = 1.5 v; see figure 26 charge injection 1 pc typ v s = 1.5 v, r s = 0 , c l = 1 nf; see figure 28 2 pc max off isolation ?90 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 29 channel-to-channel crosstalk ?90 db typ r l = 50 , c l = 5 pf; f = 1 mhz; see figure 31 (adg659) ?3 db bandwidth adg658 160 mhz typ r l = 50 , c l = 5 pf; see figure 30 adg659 300 mhz typ c s (off) 5 pf typ f = 1 mhz c d (off) adg658 29 pf typ f = 1 mhz adg659 15 pf typ f = 1 mhz
adg658/adg659 rev. b | page 8 of 20 b version y version parameter +25c ?40c to +85c ?40c to +125c unit test conditions/comments c d , c s (on) adg658 30 pf typ f = 1 mhz adg659 16 pf typ f = 1 mhz power requirements v dd = 3.6 v i dd 0.01 a typ digital inputs = 0 v or 3.6 v 1 a max 1 guaranteed by design; not subject to production test.
adg658/adg659 rev. b | page 9 of 20 absolute maximum ratings t a = 25c, unless otherwise noted. table 4. parameter rating v dd to v ss 13 v v dd to gnd ?0.3 v to +13 v v ss to gnd +0.3 v to ?6.5 v analog inputs 1 v ss ? 0.3 v to v dd + 0.3 v digital inputs 1 gnd ? 0.3 v to v dd + 0.3 v or 10 ma, whichever occurs first peak current, s or d 40 ma (pulsed at 1 ms, 10% duty cycle max) continuous current, s or d 20 ma operating temperature range automotive (y version) ?40c to +125c industrial (b version) ?40c to +85c storage temperature range ?65c to +150c junction temperature 150c ja thermal impedance 16-lead qsop 104c/w 16-lead tssop 150.4c/w 16-lead lfcsp (4-layer board) 70c/w lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c esd 5.5 kv 1 over voltages at a x , en , s, or d are clamped by internal diodes. current should be limited to the maximum ratings. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adg658/adg659 rev. b | page 10 of 20 table 5. adg658 truth table a2 a1 a0 en switch condition x 1 x x 1 x x 1 1 none 0 0 0 0 1 0 0 1 0 2 0 1 0 0 3 0 1 1 0 4 1 0 0 0 5 1 0 1 0 6 1 1 0 0 7 1 1 1 0 8 1 x = dont care table 6. adg659 truth table a1 a0 en on switch pair x 1 x x 1 1 none 0 0 0 1 0 1 0 2 1 0 0 3 1 1 0 4 1 x = dont care
adg658/adg659 rev. b | page 11 of 20 pin configurations and function descriptions adg659 top view (not to scale) adg658 top view (not to scale) 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 16 15 14 13 12 11 10 9 v dd s3 s2 s1 s4 a0 a1 a2 v dd s3a s2a da s1a s4a a0 a1 s1b s3b db s4b s2b v ss gnd s5 s7 d s8 s6 v ss gnd en en 03273-0-002 figure 2. 16-lead tssop/ qsop pin configuration 12 11 10 9 1 2 3 4 16 15 14 13 5 6 7 8 d s8 s6 v ss gnd a2 a1 s2 s1 s4 a0 s7 s5 v dd s3 adg659 top view (not to scale) 12 11 10 9 1 2 3 4 16 15 14 13 5 6 7 8 db s4b s2b v ss gnd a1 a0 s2a da s1a s4a s3b s1b v dd s3a adg658 top view (not to scale) en en 03273-a-003 exposed pad floating figure 3. 16-lead, 4 mm 4 mm lfcsp pin configuration table 7. pin function descriptions paraeter description v dd most positive power supply potential. v ss most negative power supply potential. i dd positive supply current. i ss negative supply current. gnd ground (0 v) reference. s source terminal. may be an input or output. d drain terminal. may be an input or output. a x logic control input. en active low digital input. when high, device is disabled and all switches are off. when low, a x logic inputs determine on switch. v d (v s ) analog voltage on terminals d, s. r on ohmic resistance between d and s. ?r on on resistance match between any two channels, i.e., r on max ? r on min. r flat(on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s (off) source leakage current with the switch off. i d (off) drain leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v inl maximum input voltage for logic 0. v inh minimum input voltage for logic 1. i inl (i inh ) input current of the digital input. c s (off) off switch source capacitance. measured with reference to ground. c d (off) off switch drain capacitance. measured with reference to ground. c d , c s (on) on switch capacitance. measured with reference to ground. c in digital input capacitance.
adg658/adg659 rev. b | page 12 of 20 parameter description t on delay between applying the digital control input and the output switching on. see test circuit 7. t off delay between applying the digital cont rol input and the output switching off. t bbm on time. measured between 80% points of both switches when switching from one address state to another. charge injection measure of the glitch impulse transferred from the di gital input to the analog output during switching. off isolation measure of unwanted sign al coupling through an off switch. crosstalk measure of unwanted signal coupled through from on e channel to another as a result of parasitic capacitance. bandwidth the frequency at which the output is attenuated by 3 db. on response the frequency response of the on switch. insertion loss the loss due to the on resistance of the switch.
adg658/adg659 rev. b | page 13 of 20 typical performance characteristics 0 80 60 40 20 100 ?5.5 ?3.5 ?1.5 0.5 2.5 4.5 70 50 30 10 90 t a = 25 c v d , v s (v) on resistance ( ) 03273-0-006 v dd ,v ss = 2.7v v dd ,v ss = 3v v dd ,v ss = 5.5v v dd ,v ss = 5v v dd ,v ss = 4.5v 100 60 20 140 0 1.0 2.0 80 40 0 120 0.5 1.5 2.5 3.0 4.54.0 5.0 3.5 v d , v s (v) on resistance ( ) 03273-0-009 +125 c +85 c +25 c ?40 c dd = 5v ss = 0v v v figure 4. on resistance vs. v d (v s ) for dual supply figure 7. on resistance vs. v d (v s ) for different temperatures (single supply) 0 200 150 100 50 250 0 0.5 1.0 1.5 2.0 2.5 3.0 300 v d , v s (v) on resistance ( ) 03273-0-010 +125 c +85 c +25 c ?40 c v dd = 3v v ss = 0v 0 200 150 100 50 250 024681012 v d , v s (v) on resistance ( ) 03273-0-007 t a = 25 c v dd = 2.7v v dd = 3v v dd = 3.3v v dd = 4.5v v dd = 5v v dd = 5.5v v dd = 10v v dd = 12v figure 8. on resistance vs. v d (v s ) for different temperatures (single supply) figure 5. on resistance vs. v d (v s ) for single supply 0.5 ?0.5 ?1.5 ?2.5 1.5 0 ?1.0 ?2.0 1.0 0 20 40 60 80 100 120 temperature ( c) current (na) 03273-0-011 i s (off) i d (off) i s ,i d (on) v dd = 5v v ss = ?5v v d = 4v v s = 4v 0 80 60 40 20 100 ?5 ?2 0 70 50 30 10 90 ?4 ?1 123 5 v d , v s (v) on resistance ( ) 4 ?3 03273-0-008 +125 c +85 c +25 c ?40 c v dd = +5v v ss = ?5v figure 9. leakage current vs. temperature (dual supply) figure 6. on resistance vs. v d (v s ) for different temperatures (dual supply)
adg658/adg659 rev. b | page 14 of 20 0.5 ?0.5 ?1.5 ?2.5 1.5 0 ?1.0 ?2.0 1.0 0 20 40 60 80 100 120 temperature (c) current (na) 03273-0-012 v dd = +5v v ss = 0v v d = 4v v s =1v v dd = +3v v ss = 0v v d = 2.4v v s =1v i s (off) i d (off) i s ,i d (on) figure 10. leakage current vs. temperature (single supply) ?4 12 8 4 0 ?5 ?3 ?1 1 3 5 10 6 2 ?2 14 ?4 ?2 0 2 4 v s (v) q inj ( p c) 03273-0-013 v dd = +5v v ss = 0v v dd = +5v v ss = ?5v t a = 25 c figure 11. charge injection vs. source voltage 100 60 20 140 80 40 0 120 ?40 ?20 0 20 40 60 80 100 120 temperature ( c) time (ns) 03273-0-014 v dd = +5v v ss = ?5v t on t off figure 12. t on /t off times vs. temperature (dual supply) 300 200 100 250 150 0 350 ?40 ?20 0 100 120 50 temperature (c) time (ns) 03273-0-015 20 40 60 80 v ss = 0v t on t off v dd = 3v v dd = 3v v dd = 5v v dd = 5v figure 13. t on /t off times vs. temperature (single supply) 100k 1m 10m 100m ?9 ?11 ?13 0 ?10 ?12 ?15 ?7 ?14 frequency (hz) db ?8 ?6 ?4 ?5 ?3 ?1 ?2 v dd = +5v v ss = ?5v t a = 25 c 03273-0-016 figure 14. on response vs. frequency (adg658) 100k 1m 10m 100m ?12 ?16 ?20 0 ?14 ?18 ?24 ?8 ?22 frequency (hz) db ?10 ?6 ?2 ?4 v dd = +5v v ss = ?5v t a = 25 c 03273-0-017 figure 15. on response vs. frequency (adg659)
adg658/adg659 rev. b | page 15 of 20 100k 1m 10m 100m ?40 ?80 ?120 0 ?60 ?100 ?20 frequency (hz) db v dd = +5v v ss = ?5v t a = 25 c 03273-0-018 100 1 0.01 10000 10 0.1 1000 01 0 1 2 v dd = 12v v dd = 5v v dd = 3v v(en) (v) i dd ( a) 03273-0-021 v ss = 0v 2468 figure 19. v dd current vs. logic level figure 16. off isolat ion vs. frequency 0 2.5 2.0 1.5 1.0 3.0 0 0.5 v dd (v) logic threshold voltage (v) 03273-0-022 12 246810 ?30 ?70 ?110 0 ?50 ?90 ?130 100k 1m 10m 100m ?40 ?80 ?120 ?10 ?60 ?100 ?20 frequency (hz) db v dd = ?5v v ss = +5v t a = 25 c 03273-0-019 figure 20. logic threshold voltage vs. supply voltage figure 17. crosstalk vs. frequency 100 20 50 100 frequency (hz) thd + n (%) 200 500 1k 5k 10k 20k 10 1 0.1 0.01 2k 600 in and out v dd = +5v v ss = ?5v t a = 25 c 03273-0-020 figure 18. thd + noise
adg658/adg659 rev. b | page 16 of 20 test circuits i ds v1 s d v s r on =v 1 /i ds 03273-0-023 figure 21. on resistance v dd s1 d v d v ss v s v dd v ss s2 s8 gnd en logic 1 a i s (off) 03273-0-024 figure 22. i s (off) v dd s1 d v s v ss v o s2 s8 gnd logic 1 a i d (off) v dd v ss 03273-0-025 en figure 23. i d (off) v dd s1 d v s v ss v d s8 gnd a i d (on) v dd v ss 03273-0-026 en figure 24. i d (on) v dd v ss v s1 v s8 v out 50 r l 300 v in a2 a1 a0 gnd s1 s8 d adg658* 90% 90% 50% 50% 3v 0v v s1 v out v s8 v dd v ss * similar connection for adg659 c l 35pf address drive (v in ) t transition t transition 03273-0-027 en s2?s7 figure 25. switching time of multiplexer, t transition
adg658/adg659 rev. b | page 17 of 20 v dd v ss v s v out v in a2 a1 a0 gnd s1 s2?s7 s8 d adg658* t bbm 80% 3v 0v v out * similar connection for adg659 80% address drive (v in ) v dd v ss 50 r l 300 c l 35pf 03273-0-028 en figure 26. break-before-make delay, t bbm v dd v ss v s v out 50 a2 a1 a0 gnd s1 s2?s8 d t on (en) 0.9v o 50% 50% 3v 0v v o 0v v in 0.9v o enable drive (v in ) output t off (en) v ss adg658* v dd r l 300 c l 35pf * similar connection for adg659 03273-0-029 en figure 27. enable delay, t on ( en ), t off ( en ) 03273-0-030 v dd v ss v s v out a2 a1 a0 gnd 3v 0v v in adg658* r s c l 1nf * similar connection for adg659 en sd v dd v ss logic input (v in ) v out q inj = c l v out v out figure 28. charge injection
adg658/adg659 rev. b | page 18 of 20 v dd v ss a2 a1 a0 gnd s d 50 v out v s logic 1 v dd v ss 0.1 f 0.1 f network analyzer 50 r l 50 off isolation = 20 log v out v s 03273-0-031 en figure 29. off isolation v dd v ss a2 a1 a0 gnd s d insertion loss = 20 log v out with switch v out without switch r l 50 v out 50 v s v dd v ss 0.1 f0 . 1 f 03273-0-032 en figure 30. bandwidth v dd v ss a0 a1 gnd s1a da 0.1 f v out db da 50 v s adg659 channel-to-channel crosstalk = 20 log v out v s v dd v ss 0.1 f r l 50 network analyzer network analyzer 50 db s1b 03273-0-033 en figure 31. channel-to-channel crosstalk
adg658/adg659 rev. b | page 19 of 20 outline dimensions 16 9 8 1 pin 1 seating plane 8 0 4.50 4.40 4.30 6.40 bsc 5.10 5.00 4.90 0.65 bsc 0.15 0.05 1.20 max 0.20 0.09 0.75 0.60 0.45 0.30 0.19 coplanarity 0.10 compliant to jedec standards mo-153ab figure 32. 16-lead thin shrink small outline package [tssop] (ru-16) dimensions shown in millimeters 16 5 13 8 9 12 1 4 2.25 2.10 sq 1.95 0.75 0.60 0.50 0.65 bsc 1.95 bsc 0.35 0.28 0.25 12 max 0.20 ref seating plane pin 1 indicato r top view 4.0 bsc sq 3.75 bsc sq 0.60 max 0.60 max 0.05 max 0.02 nom 0.80 max 0.65 typ pin 1 indicato r 1.00 0.85 0.80 coplanarity 0.08 0.25 min exposed pad (bottom view) compliant to jedec standards mo-220-vggc figure 33. 16-lead lead frame chip scale package [lfcsp] (cp-16-4) dimensions shown in millimeters
adg658/adg659 rev. b | page 20 of 20 16 9 8 1 pin 1 seating plane 0.010 0.004 0.012 0.008 0.025 bsc 0.010 0.006 0.050 0.016 8 0 coplanarity 0.004 0.065 0.049 0.069 0.053 0.154 bsc 0.236 bsc compliant to jedec standards mo-137ab 0.193 bsc figure 34. 16-lead shrink small outline package [qsop] (rq-16) dimensions shown in millimeters ordering guide model temperature range packag e description package option adg658yru ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg658yru-reel7 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg658yruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg658yruz-reel7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg658ycp ?40c to +85c 16-lead lead frame chip scale package [lfcsp] cp-16 adg658ycp-reel7 ?40c to +85c 16-lead lead frame chip scale package [lfcsp] cp-16 adg658ycpz 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp] cp-16 adg658yrq ?40c to +125c 16-lead shrink small outline package [qsop] rq-16 adg658yrq-reel ?40c to +125c 16-lead shri nk small outline package [qsop] rq-16 adg658yrqz 1 ?40c to +125c 16-lead shrink small outline package [qsop] rq-16 adg658yrqz-reel7 1 ?40c to +125c 16-lead shrink small outline package [qsop] rq-16 adg659yru ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 ADG659YRU-REEL7 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg659yruz 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg659yruz-reel7 1 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg659wyruz-reel7 1 , 2 ?40c to +125c 16-lead thin shrink small outline package [tssop] ru-16 adg659ycp ?40c to +85c 16-lead lead frame chip scale package [lfcsp] cp-16 adg659ycpz 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp] cp-16 adg659ycpz-reel7 1 ?40c to +85c 16-lead lead frame chip scale package [lfcsp] cp-16 adg659yrq ?40c to +125c 16-lead shrink small outline package [qsop] rq-16 adg659yrq-reel ?40c to +125c 16-lead shri nk small outline package [qsop] rq-16 adg659yrq-reel7 ?40c to +125c 16-lead sh rink small outline package [qsop] rq-16 adg659yrqz 1 ?40c to +125c 16-lead shrink small outline package [qsop] rq-16 1 z = rohs compliant part. 2 qualified for automotive. ?2004C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d03273-0-2/09(b)

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