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| ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ?d e t 3 9 f b 1 1k t ?? :? ) 1 / 6 d *? 2 3? ) 2 0 2 7 d * j& h@ -? ? ??| ;5 ) o w * ? t ?" ? e t 3 9 f b 1 1 ?? ?? 0?? | 7 5?? e s?? ?k ?# [?# t -?m 2 . x j s f ? ogr?rk ?r 3 - ? ?| 2 . x j s f { > ?? ? [ ?w if ?'{ e t 3 9 f b 1 1 ??m y 2 . x j s f ? e| - # ?+ 2 . x j s ft y4 e t 3 9 f b 1 1 ?? y j|[ m?? 6? ?v'{ ? ? s h? ? 5||? ??? e sb? v ? ?? ? ?ty4 t|t? +y?? 6? ? zk[ m -2+?0r? tr e t 3 9 f b 1 1 ? ? {-k ?# ys ?} ?+ ) ? * -2 wj]?? ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` b k ?0g?? -t *? i w b d; ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` v ? k t ? *?? . 5 1 d? , 9 6 d ? ? -? | :? 2 3?t j& h ? ?| 2 . x j s f { >?? >}k ?0g ? ? h ?? ? ? 0?|? 7 5?? e s ? ? ??0gmm < ? jz+t 6?b ? ? ? ?| 2 . x j s f { > ?? ? [ ?w if ? ? -?c o wt ?" 0 ? ? ? ?? ? ? pi?t?? *?| h ? *e [ 2 . x j s f y+ ? y 0 - j p ! ) q j p *[ m ? ? 5 ? -2 ? q j p[ m 6? h?? e||? ]? ? ?+ *?? , 4 / 1 w? , 6 / 6 w . 5 1 d? , 9 6 d ? -?k ?# ? ? 9[ m t p q v? e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ________________________________________________________________ maxim integrated products 1 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ? g? ds28ea00 io piob pioa gnd v dd v dd note: schematic shows pio pins wired for sequence-detect function. 1-wire master #1 ds28ea00 io piob px. y microcontroller pioa gnd v dd #2 ds28ea00 io piob pioa gnd v dd #3 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ?o ?+? 5 rev 2; 4/09 ta5^ak ?t ?|iaa| -@? !i?|yei tg?? ?[i???4|? |l ^at ? ? % ? ? g?? e n b y j n?>i|f? 2 1 9 1 1 ! 9 6 3 ! 2 3 5 : ! )?| *l * 2 1 9 1 1 ! 2 6 3 ! 2 3 5 : ! ) | *l * t 7 n b y j n||a?6? d i j o b / n b y j n . j d / d p n part temp range pin-package ds28ea00u+ -40 c to +85 c 8 sop ds28ea00u+t&r -40 c to +85 c 8 sop mk , -,? ) q c * 0 o ] s p i t*e| v? u ' s ! > ! rt? 2 . x j s f5 n b y j n ! j o u f h s b u f e ! q s p e v d u t - ! j o d /|?* e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (t a = -40c to +85c.) (note 1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. io voltage range to gnd ........................................-0.5v to +6v io sink current....................................................................20ma maximum pioa or piob pin current...................................20ma maximum current through gnd pin ..................................40ma operating temperature range ...........................-40c to +85c junction temperature ......................................................+150c storage temperature range .............................-55c to +125c soldering temperature...........................refer to the ipc/jedec j-std-020 specification. parameter symbol conditions min typ max units power supply supply voltage v dd (note 2) 3.0 5.5 v supply current (note 3) i dd v dd = +5.5v 1.5 ma standby current i dds v dd = +5.5v 1.5 a io pin: general data local power 3.0 v dd 1-wire pullup voltage (note 2) v pup parasite power 3.0 5.5 v 1-wire pullup resistance r pup (notes 2, 4) 0.3 2.2 k input capacitance c io (notes 3, 5) 1000 pf input load current i l io pin at v pup 0.1 1.5 a high-to-low switching threshold v tl (notes 3, 6, 7) 0.46 v pup - 1.9v v parasite powered 0.5 input low voltage (notes 2, 8) v il v dd powered (note 3) 0.7 v low-to-high switching threshold (notes 3, 6, 9) v th parasite power 1.0 v pup - 1.1v v switching hysteresis (notes 3, 6, 10) v hy parasite power 0.21 1.7 v output low voltage (note 11) v ol at 4ma 0.4 v standard speed, r pup = 2.2k 5 overdrive speed, r pup = 2.2k 2 recovery time (notes 2, 12) t rec overdrive speed, directly prior to reset pulse; r pup = 2.2k 5 s standard speed 0.5 5.0 rising-edge hold-off time (notes 3, 13) t reh overdrive speed not applicable (0) s standard speed 65 time-slot duration (notes 2, 14) t slot overdrive speed 8 s io pin: 1-wire reset, presence-detect cycle standard speed 480 640 reset low time (note 2) t rstl overdrive speed 48 80 s e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t _______________________________________________________________________________________ 3 electrical characteristics (continued) (t a = -40c to +85c.) (note 1) parameter symbol conditions min typ max units standard speed 15 60 presence-detect high time t pdh overdrive speed 2 6 s standard speed 1.125 8.1 presence-detect fall time (notes 3, 15) t fpd overdrive speed 0 1.3 s standard speed 60 240 presence-detect low time t pdl overdrive speed 8 24 s standard speed 68.1 75 presence-detect sample time (notes 2, 16) t msp overdrive speed 7.3 10 s io pin: 1-wire write standard speed 60 120 write-zero low time (notes 2, 17) t w0l overdrive speed 6 16 s standard speed 5 15 write-one low time (notes 2, 17) t w1l overdrive speed 1 2 s io pin: 1-wire read standard speed 5 15 - read low time (notes 2, 18) t rl overdrive speed 1 2 - s standard speed t rl + 15 read sample time (notes 2, 18) t msr overdrive speed t rl + 2 s pio pins input low voltage v ilp (note 2) 0.3 v input high voltage (note 2) v ihp v x = max(v pup , v dd ) v x - 1.6 v input load current (note 19) i lp pin at gnd -1.1 a output low voltage (note 11) v olp at 4ma 0.4 v chain-on pullup impedance r co (note 3) 20 40 60 k eeprom programming current i prog (notes 3, 20) 1.5 ma programming time t prog (note 21) 10 ms at +25c 200,000 write/erase cycles (endurance) (notes 22, 23) n cy -40c to +85c 50,000 data retention (notes 24, 25) t dr at +85c (worst case) 10 years temperature converter conversion current i conv (notes 3, 20) 1.5 ma 12-bit resolution (1/16c) 750 11-bit resolution (1/8c) 375 10-bit resolution (1/4c) 187.5 conversion time (note 26) t conv 9-bit resolution (1/2c) 93.75 ms -10c to +85c -0.5 +0.5 conversion error below -10c (note 3) -0.5 +2.0 c converter drift d (note 27) -0.2 +0.2 c e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 4 _______________________________________________________________________________________ note 1: specifications at t a = -40c are guaranteed by design and not production tested. note 2: system requirement. note 3: guaranteed by design, characterization, and/or simulation only. not production tested. note 4: maximum allowable pullup resistance is a function of the number of 1-wire devices in the system and 1-wire recovery times. the specified value here applies to parasitically powered systems with only one device and with the minimum 1-wire recovery times. for more heavily loaded systems, local power or an active pullup such as that found in the ds2482-x00, ds2480b, or ds2490 may be required. if longer t rec is used, higher r pup values may be tolerable. note 5: value is 25pf maximum with local power. maximum value represents the internal parasite capacitance when v pup is first applied. if r pup = 2.2k , 2.5s after v pup has been applied, the parasite capacitance does not affect normal communications. note 6: v tl , v th , and v hy are a function of the internal supply voltage, which is a function v dd , v pup , r pup , 1-wire timing, and capacitive loading on io. lower v dd , v pup , higher r pup , shorter t rec , and heavier capacitive loading all lead to lower val- ues of v tl , v th , and v hy . note 7: voltage below which, during a falling edge on io, a logic 0 is detected. note 8: the voltage on io must be less than or equal to v ilmax at all times when the master drives the line to a logic 0. note 9: voltage above which, during a rising edge on io, a logic 1 is detected. note 10: after v th is crossed during a rising edge on io, the voltage on io must drop by at least v hy to be detected as logic 0. note 11: the i-v characteristic is linear for voltages less than +1v. note 12: applies to a single parasitically powered ds28ea00 attached to a 1-wire line. these values also apply to networks of multiple ds28ea00 with local supply . note 13: the earliest recognition of a negative edge is possible at t reh after v th has been reached on the preceding rising edge. note 14: defines maximum possible bit rate. equal to 1/(t w0lmin + t recmin ). note 15: interval during the negative edge on io at the beginning of a presence-detect pulse between the time at which the voltage is 80% of v pup and the time at which the voltage is 20% of v pup . note 16: interval after t rstl during which a bus master is guaranteed to sample a logic 0 on io if there is a ds28ea00 present. minimum limit is t pdhmax + t fpdmax ; the maximum limit is t pdhmin + t pdlmin . note 17: in figure 13 represents the time required for the pullup circuitry to pull the voltage on io up from v il to v th . the actual maximum duration for the master to pull the line low is t w1lmax + t f - and t w0lmax + t f - , respectively. note 18: in figure 13 represents the time required for the pullup circuitry to pull the voltage on io up from v il to the input-high threshold of the bus master. the actual maximum duration for the master to pull the line low is t rlmax + t f . note 19: this load current is caused by the internal weak pullup, which asserts a logic 1 to the piob and pioa pins. the logical state of piob must not change during the execution of the conditional read rom command. note 20: current drawn from io during eeprom programming or temperature conversion interval in parasite-powered mode. the pullup circuit on io during the programming or temperature conversion interval should be such that the voltage at io is greater than or equal to v pupmin . if v pup in the system is close to v pupmin , then a low-impedance bypass of r pup , which can be activated during programming or temperature conversions, may need to be added. the bypass must be activated within 10s from the beginning of the t prog or t conv interval, respectively. note 21: the t prog interval begins t rehmax after the trailing rising edge on io for the last time slot of the command byte for a valid copy scratchpad sequence. interval ends once the devices self-timed eeprom programming cycle is complete and the current drawn by the device has returned from i prog to i l (parasite power) or i dds (local power). note 22: write-cycle endurance is degraded as t a increases. note 23: not 100% production tested. guaranteed by reliability monitor sampling. note 24: data retention is degraded as t a increases. note 25: guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data sheet limit at operating temperature range is established by reliability testing. note 26: the t conv interval begins t rehmax after the trailing rising edge on io for the last time slot of the command byte for a valid convert temperature sequence. the interval ends once the devices self-timed temperature conversion cycle is complete and the current drawn by the device has returned from i conv to i l (parasite power) or i dds (local power). note 27: drift data is preliminary and based on a 1000-hour stress test performed on another device with comparable design and fabricated in the same manufacturing process. this test was performed at greater than +85c with v dd = +5.5v. confirmed thermal drift results for this device are pending the completion of a new 1000-hour stress test. electrical characteristics (continued) (t a = -40c to +85c.) (note 1) e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t _______________________________________________________________________________________ 5 1 io 2, 3, 5 n.c. 4 gnd 6 pioa ( done ) 7 piob ( en ) 8 v dd ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` .? e t 3 9 f b 1 1 ? y m? .| ? 1 vd ?, e t 3 9 f b 1 1]t j k ?]?? 7 5?? e s 7 5 ?@ [|? @ 2 . x j s f s p n ? <?] ? s p n ? ? ?? h ?+? ??? e h| ? <?]?? h|?w+ [ <?? 0 vw+tt ??? 6?| ? 5?2 q j p 7 - ??e ) d s d * ?st [@k ? oe ? 6k ?rsv?? 6? -| q j p c +?r? q j p b? h| {? y e t 3 9 f b 1 1 5 e ?i|t????? ?? ?e sk ? 2 . x j s fog|?( ? ?d 2?,# ??e 2- s p n ? ? || ? s f b e ! s p n n b u d i s p n t f b s d i ! s p n d p o e j u j p o b m ! ) b m b s n * ! t f b s d i ! s p n d p o e j u j p o b m ! s f b e ! s p n t l j q ! s p n p w f s e s j w f . t l j q ! s p n p w f s e s j w f . n b u d i ! s p n ? +?*e h?r ? s p n ? h s ?? y+&% ?|??0g s2 y+ ?r s p n ? ? ?%-|og?d 2 2?,? ??rr s p n ? ? ? e t 3 9 f b 1 1 s6 ? 9 h ? <? { > ? -2 ? ? h <? ? ? ||?@ #z |zk <? ? ? ?%-|og? d :?, ??k ?v5??i ) m t *?? 7 5?? e s ? e t 3 9 f b 1 1t :?| 7 5? s p n? e s 9?5 2 . x j s f i { v| 5 9?5?|? e s" ? 9? 5 6 7?| d s d i )d 3?, * 2 . x j s f d s d?$? @ [ y p s ?? 5 ?|?2+ ? ?d 4?,z ?2+?? y 9 , ! y 6 , ! y 5 , ! 2 ? 2 . x j s f d s d|. g??l b 3 8? ? [? n b y j n j c v u u p o ? ? -||- ??e ) d s d * e s$? @| ???* ?? 1m ?- i |"??i? *$?$? @ ?($? 2?i i|? 9?$? ? *$? 5 9?? e s?? e s| " ? ?$? ?$? @|k? t? d s d? $? 9? d s d ?$? @|???]] j c v u u p o5 n b y j n ! j o u f h s b u f e ! q s p e v d u t - ! j o d /|?* ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` [ m? [ m a ? 2 . x j s f# { > [ ?? '[ m?j]? o? ? { ??? ' ? 5 q j p b0x [ ? 5r q j p b? ? 5| h| q j p c {2#? 6? ? ? 5|" ? h|b[ m? 9 t { h o e ' ? 5 q j p c0x [ ? 5r? ? 5|? h| q j p c? { h o e2#? 6? ? ??[ m? ? y+? s { h o e e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 6 _______________________________________________________________________________________ ds28ea00 power-supply sensor 64-bit scratchpad temperature sensor 8-bit crc generator 1-wire rom function control device function control alarm and configuration registers 64-bit registration number piob (en) pioa (done) io v dd (on) internal v dd r co ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` 1 vd available commands: data field affected: read rom match rom search rom conditional search rom conditional read rom skip rom overdrive-skip rom overdrive-match rom 64-bit rom 64-bit rom 64-bit rom 64-bit rom, temperature alarm registers, scratchpad 64-bit rom, piob pin state, chain state (none) 64-bit rom, od-flag 64-bit rom, od-flag 1-wire rom function commands (see figure 11) write scratchpad read scratchpad copy scratchpad convert temperature read power mode recall eeprom pio access read pio access write chain scratchpad scratchpad temperature alarm and configuration registers scratchpad, temperature alarm registers v dd pin voltage scratchpad, temperature alarm, and configuration registers pio pins pio pins chain state, pioa pin state ds28ea00-specific control function commands (see figure 9) command level: ds28ea00 d 2 / ! 2 . x j s fog|?( ? e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t _______________________________________________________________________________________ 7 msb 8-bit crc code 48-bit serial number msb msb lsb lsb lsb 8-bit family code (42h) msb lsb d 3 / ! 7 5?? e s 1st stage 2nd stage 3rd stage 4th stage 7th stage 8th stage 6th stage 5th stage x 0 x 1 x 2 x 3 x 4 polynomial = x 8 + x 5 + x 4 + 1 input data x 5 x 6 x 7 x 8 d 4 / ! 2 . x j s f ! d s d scratchpad (power-up state) byte address temperature lsb (50h) 0 temperature msb (05h) 1 th register or user byte 1* 2 tl register or user byte 2* *power-up state depends on value(s) stored in eeprom. 3 configuration register* 4 reserved (ffh) 5 reserved (0ch) 6 reserved (10h) backup eeprom n/a n/a th register or user byte 1 tl register or user byte 2 configuration register n/a n/a n/a 7 d 5 / ! @o? @? e t 3 9 f b 1 1|@o??d 5?, ?@? 9 ?@ [ 4 ?? q f f q s p n ?? 9 ?@| 3 ??tk @ ? @?? @ tt ? ?d @2 ?| 4 ? ? -vz 4 ?t j ) u i * @ [? ) u m * @2 |? @? 4 ?? ? ? ?? ? h s ?k u? ?zk ?|?y? ?? ? @|| u i u m [|? @k ?i?tt | j & h@ ?i?bt5 eiu ?" u i u m [|? @k ? ??u f f q s p n ?? ;5v e t 3 9 f b 1 1?? s f f q s p nk ???@ e t 3 9 f b 1 1 tk|]?? dg 2 7? o s k1| 3|w i ?+ - 2 e ? j& h? 2 3? t @k ?|b g 3|w i ? +? ?k o s???? + h| j& h??? 2 3? m t ?|????i| j & h?? 2 3?? 1? ) 2 2? y+ *? 1??? 2? ) 2 1? y + * t? 1??? 3? ) :? y+ * ? ???c tt ? + ? @|k? ?r w2 i?5 e ? ?"g 3|w ip+ a 9? 3 ??k-, ?"| o s [k??? ? " 2 2 d? ?? +tt ? + m??? u i @ |k? t c??? u m @|k? s? t g s ? h s 0b d p o e j u j p o b m ! t f b s d i ! s p n ? ? +2 ?|tt ? +? ? u i [ u m @? c| *? ? . ? ? r? 6? [ q j p| 2 . x j s fk t 8 _______________________________________________________________________________________ addrress bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0h 2 3 2 2 2 1 2 0 2 -1 2 -2 2 -3 2 -4 ls byte 1h s s s s s 2 6 2 5 2 4 ms byte temperature (c) digital output (binary) digital output (hex) +85* 0000 0101 0101 0000 0550h +25.0625 0000 0001 1001 0001 0191h +10.125 0000 0000 1010 0010 00a2h +0.5 0000 0000 0000 1000 0008h 0 0000 0000 0000 0000 0000h -0.5 1111 1111 1111 1000 fff8h -10.125 1111 1111 0101 1110 ff5eh -25.0625 1111 1110 0110 1111 fe6fh -40 1111 1101 1000 0000 fd80h - 2 / ! t 0k ?|b * tk @??? ?? |t?? , 9 6 d addrress bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 2h s 2 6 2 5 2 4 2 3 2 2 2 1 2 0 high alarm (th) 3h s 2 6 2 5 2 4 2 3 2 2 2 1 2 0 low alarm (tl) ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` @.? tk @ t @ m t ? n t ? ) u i * ? ) u m * ??| ????-?,? \ 5 ; 1 ^?2 ? 8? ?? ?c ?y ?$b|k? h ?? j& h? 2 3? e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t _______________________________________________________________________________________ 9 addrress bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 4h 0 r1 r0 1 1 1 1 1 bit description bit(s) definition r1, r0: temperature converter resolution [6:5] these bits control the resolution of the temperature converter. the codes are as follows: r1 r0 0 0 9 bits 0 1 10 bits 1 0 11 bits 1 1 12 bits device behavior chain state piob ( en )pioa ( done ) conditional read rom off (default) pio (high impedance) pio (high impedance) not recognized on en input pullup on recognized if en is 0 done no function pulldown on ( done logic 0) not recognized - 3 / ! ? 5? q j p ? ? q j p ?t : ' ? 5 o - [ ?s [ m?|r?0x ? - ? q j pr?@ <? ?d 6?, h ? <?]? s q j p 2 . x j s f { > ?r ] { q j p b] w e e ? .? ? o0x ?e ? ? 5 ? - #? 6? ? )l e 1 vd * q j p c 5 ' ? q j pr - |?? ???? ?0 - )d 6|? ? * s q j p[ m? o?] w e e ? 5 ? ? 5 ??? 2 . x j s f ? 6?2#v? e ) ? * 1+ { | hj? ?z?k? ?? ? ? . ???| h ;? 1# ) ?? -2 v? ?@ t@ y4??|t *? +y ?? ? 5 ? ? ??j- s h? ? 5||? ??? e sb ? v ? 5 ?? y [ m?r?[ m ) en *' h? 6? - |+0b r[ m ) done * -20? ? 5| h$ h| 6?/r? e t 3 9 f b 1 1| y 0 > -2+ ? 5 ? q j p c| ? ?? en r? q j p b ? done g s@ h| en r?$ ? ?o ? +? 5 ?, ? 5|? h| en r?? {? h o e tw?? 6? -|? ] 1g s?d y [ mj? 6? ? -0 - d p o e j u j p o b m ! s f b e ! s p n ? # ? ?4 } ? 5 ? [u?| q j p ? e t 3 9 f b 1 1 ?l j? ? 5?? p g g p o [ e p o f-? ? 5 ?t ? ? ? 5? 0 - ? 5 ? <?- 3 ? ? 5?2 q j p[ m|?w+ d q q pio output latch clock pio pin pio pin state pio output latch state pio data pio clock d 6 / ! q j p < ? ] vd |? @ e t 3 9 f b 1 1 ?? ? ?? ? 5?? p g g% q j p b [ q j p c0 - q j p b d d f t t ! s f b e [ q j p ! b d d f t t ! x s j u f ? <? ? 5?? p o q j p b0 - ??? 5 1 l |? ? o? h] w e e ??? h| q j p c ) en *[ m ] 2g s ??i e t 3 9 f b 1 1| en [ m? ] 1& ? h?? p o ? c0b d p o e j u j p o b m s f b e s p n ? s h| s p n? e s ? h ?? e p o f ? 5?' ? 5 h0b d p o e j u j p o b m s f b e s p n ? ? 6? - * ?? h ? p o ? 5? 6 ? -| h ?t ? e p o f??u$0? ? h??" ??? h ? p g g ? 5?; 9 q j p@?d?@?? ??? ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` <? ? ? d : ?#t? ?@ [ q j p[ m 7 ? 5 ? ? ???|ogta" ? ?? \gzk ? 2 ?|# ? ? e t 3 9 f b 1 1? . |0g -2g *e h ) ??? p e > 1 * -g y+ ) p e > 2 *?? ?? + ?? i??? y+ e t 3 9 f b 1 1 2*e h0g x s j u f ! t d s b u d i q b e ! \ 5 f i ^ ? ? ?? ?6 e t 3 9 f b 1 1|@v? 4 ?|k ?? k ? ?b? u i @ ) ??? 3 *? ?b u m @ ) ??? 4 *? ? b| ? @ ) ??? 5 *rk ??-"??i? * ? ? ? ??g s?z 4 ??]]v? e -t?k ?ryrs s f b e ! t d s b u d i q b e ! \ c f i ^ ? ? ?? ?s@|?k ?r-?? ??? 1|ts @|"??i? *??r @|? 8 ?? + ? ?w+ -s ? : ? 5@|??k ? | 9? d s de i ? d s d? e t 3 9 f b 1 1? ??2+ e t 3 9 f b 1 1?? s p n? e s| d s d i|?2+$4 ? d s d?? i ?+ )4$ *? + ??] j@k ? ? - ? ??g s ?fw+ d p q z ! t d s b u d i q b e ! \ 5 9 i ^ ? ? ? ??@ ?? ? 3? 5 ! ) u i u m [|? @ *||?u? q f f q s p n? + h ?? w e e ?? ? ??? ? ? ? ?| 2 1 t .' 2 . x j s f #?|? o@? u q s p h n b y .? + h0 - w e e [ m ? ? -2? 2 *? ?? - i ?u 2? y5 1? - ??r? d p o w f s u ! u f n q f s b u v s f ! \ 5 5 i ^ ? ? ??tt t r? ?? ?{u| t ?@|tk @l?| e t 3 9 f b 1 1 ) ??? ? r 9?? + h ?? w e e ?? ? ?? ? ? ? ?| 2 1 t .' 2 . x j s f#?| ? o@? u d p o w n b y . ? . j' h? ? + h0 - w e e [ m ? ?? *?t -| i ?su 2? y5 1? tt r? s f b e ! q p x f s ! n p e f ! \ c 5 i ^ ?r d p q z ! t d s b u d i q b e [ d p o w f s u ! u f n q f s b u v s f ? ?? ?x e t 3 9 f b 1 15 e? w e e ???r s f b e ! q p x f s ! n p e f ? -26 ? zg? ?r ? t i ? ? ? ? + ?u 2 h0 - w e e [ m ?? + h? 2 . x j s f# 5 ? ?u 1?? 6 ? ? ? t i ?? ?? | ? g w e e [ m|? s f d b m m ! f f q s p n ! \ c 9 i ^ ? ? -? q f f q s p n| u i [ u m ? ?2 | ?k ?@ s ??u@|$b?? ? t i ?r? ? ? ? 2 *? -5 er ?i ?u 2? y5 1? -,k ? ?r? ?? ? ? ? ?r?? ?l r? 6? [ q j p| 2 . x j s fk t 10 ______________________________________________________________________________________ q j p ! b d d f t t ! s f b e ! \ g 6 i ^ ? ? ?"- ?s q j p[ m| ] ? ? q j pr?@? 2 . x j s f ?? ? -2 ?? q j p b d d f t t ! s f b e? d i b j o ! p o [ d i b j o ! e p o f? -?r q j p ! b d d f t t ! s f b e ? c5i h ? d i b j o ! p o t d i b j o e p o f? q j pr?@?*?? 2 -t?y uis q j p|[ m? y q j p0x|?g4 ?rcu ? t i g 6 i| " ?? )" ?i? * ? *?(gm ? s q j p ?0?# ?i ? {cu q j p? ?|" ?? )" ?i? * ?(g *?%- ?u ?? 2 . x j s f ??g s??- ? n t?|? ?? ? 3 - u s f i , y? . *d(g?d 7?, y ? ?? 1 / 3 t q j p ! b d d f t t ! x s j u f ! \ b 6 i ^ q j p ! b d d f t t ! x s j u f ? 6 q j pr?@vk ?2 <? q j p0x| o - ? -0 - ? ? 6 q j pv? dk ?m ? ? q j p??%?"- 0 -z? \ :| v ? 1+ -2' ?zvw+5 e? ? 0 - 2 . x j s f ?? ? -2 ?? q j p ! b d d f t t ! x s j u f ? i h ? d i b j o ! p o t d i b j o ! e p o f? q j p ! b d d f t t ! x s j u f ? y h? l0 ? ?r ? t i ?2 ? ? q j prk ? ? 2i? q j pr - |d??? )"??i? * b q j p b?b q j p c 7? ??b| q j p[ m b*?6zk? ? 2|'r - t0? s$ b?? 1| ? ?r - )yt0 * ???? ? 2zt-d q j pr?|k ? ? 2? i e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 11 q j p?? j| bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 complement of b3 to b0 piob output latch state piob pin state pioa output latch state pioa pin state q j prk ?? j| bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 x x x x x x piob pioa sampling point** t reh + x v th io *the "previous byte" could be the command code or the data byte resulting from the previous pio sample. **the sample point timing also applies to the pio access write command, with the "previous byte" being the write confirmation b yte (aah). most significant 2 bits of previous byte* least significant 2 bits of pio status byte d 7 / ! q j p ! b d d f t t ! s f b e ?d e t 3 9 f b 1 1 p+? q j p[ m? ? ?k ?r|? ??2 ( ip+? ? ? q j prk ? ???i rk ??? q j p?c ?$# ?- q j p ? ( i| n t?|? ? * 3 - u s f i , y|? . q j pc t ?d|??d 8?, y |? ?? 1 / 3 t? s q j p ?0g? ?|g? ?? ? e t 3 9 f b 1 1 ? k?? b b i|i? ?i ?ri? ?| n t? ? e t 3 9 f b 1 1 q j p[ m? ?rg?d 7?, @ s?g|? ? ? ? ?6 q j pv? ? ?k ? ? 2 . x j s f ??g s v ?f ? d i b j o ! \ : : i ^ ? ? ?? ? s e t 3 9 f b 1 1??? ? 5?||? ?d 9?, h?? ? ? 5 p g g?| s e t 3 9 f b 1 1 -??t ? ?? ??? d i b j o ? t i ? ? $b| ? 5 <? ??? 4 d i 6 b i [ : 7 i )? ip+ *z k??i j0t- p g g p o [ e p o f ? <?k ? 2? ip+ ?m ?2 ( ip+ ?? + ? 5?? ? ?$ ? {c b b ii? ? ? + ? 5? ?$? ) <? ? ?g?i <? ? * ? s 1 1 i ? r? 6? [ q j p| 2 . x j s fk t 12 ______________________________________________________________________________________ t reh + x v th io pio most significant 2 bits of inverted pio output data byte least significant 2 bits of confirmation byte (aah) d 8 / ! q j p ! b d d f t t ! x s j u f ?d these transitions are permissible, but do not occur during normal operation. off power-on reset (por) chain done chain on chain on chain done chain off or por done on d 9 / ! ? 5?t d e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 13 bus master tx control function command ds28ea00 sets byte address = 2 4eh write scratchpad? n y y n n y n master tx reset? byte address = 4? master tx reset? master tx data byte to scratchpad ds28ea00 increments byte address from rom functions flowchart (figure 11) to rom functions flowchart (figure 11) y to figure 9b from figure 9b ds28ea00 sets byte address = 0 ds28ea00 starts copy to eeprom beh read scratchpad? n y master rx byte from scratchpad master activates strong pullup for t prog master deactivates strong pullup ds28ea00 copies scratchpad data to eeprom 48h copy scratchpad? master decision. the master needs to know whether v dd power is available. n y y n y v dd powered? copy completed? master rx "0"s master rx "1"s y n n master tx reset? byte address = 7? ds28ea00 increments byte address master rx 8-bit crc of data n y n master tx reset? y master rx "1"s n master tx reset? y d : b / ! <? ? d e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 14 ______________________________________________________________________________________ to figure 9c from figure 9c from figure 9a to figure 9a ds28ea00 starts temperature conversion master deactivates strong pullup for t conv master deactivates strong pullup ds28ea00 converts temperature 44h convert temperature n y y b4h read power mode? n y n n y n y v dd powered? v dd powered? conversion completed? master rx "0"s master rx "1"s master rx "0"s master rx "1"s n master tx reset? y n master tx reset? y master decision. the master needs to know whether v dd power is available. d : c / ! <? ? d e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 15 to figure 9d from figure 9d from figure 9b to figure 9b ds28ea00 starts recall eeprom to scratchpad ds28ea00 samples pio pin * *see the command description for the exact timing of the pio pin sampling and updating. ds28ea00 updates pio * * bus master tx new pio output data byte bus master tx inverted new pio output data byte bus master rx pio pin status b8h recall eeprom? n y f5h pio access read? a5h pio access write? n n y recall completed? y n n master rx "0"s master rx "1"s master rx "1"s n master tx reset? y n n y master tx reset? n master tx reset? y transmission ok? master tx reset? bus master rx confirmation aah bus master rx "1"s bus master rx pio pin status ds28ea00 samples pio pin y y y d : d / ! <? ? d e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 16 ______________________________________________________________________________________ from figure 9c to figure 9c 99h chain command? n y master rx "1"s n master tx reset? y n master tx chain control byte ds28ea00 updates chain state master rx confirmation code aah master tx inverted chain control byte transmission error? control byte valid? y n n y master tx reset? y n master rx inverted chain control byte master tx reset? y n master rx error code 00h master tx reset? y error defined as: repeated control byte not equal to inverted control byte valid chain control byte codes: 3ch off 5ah on 96h done d : e / ! <? ? d ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` 2 . x j s f#; 2 . x j s f#;? ]# ? [ t? - h ?? \= z e t 3 9 f b 1 15- h# ?0? 5 ? <? 2 . x j s f#;| y j? ] j? n h|?w+? [ 2 . x j s fg )g s o [ ? * 2 . x j s fog ? ?? |#|? ?+zk? *?# ? |4[ t| ]? ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` n h|? ?m?c 2 . x j s f#;?? k ?#p% ? h ??8i .q?# j??'?dw+ 5?##?| ? h? ?? ' ? 5 t? r > e t 3 9 f b 1 1| 2 . x j s f >5 ' ? 5r ]?i? 5?d 2 1?, ??;? 2 . x j s f ? [? - h ? e t 3 9 f b 1 1 j0} 2 6 / 4 l c q t )"m? *|*e0g h [ 2 3 6 l c q t )" m? *| 0g h??@|5; 2 . x j s f h? *et y+ [ y+|k ?rt j0? 2 7 / 4 l c q t [ 2 5 3 l c q t; 2 . x j s f h$ e t 3 9 f b 1 1rt ?? ]??p5? 2 . x j s f? { > |4? ? a ? .? o? | ?s ?? e y [ ??? \t y+ e t 3 9 f b 1 1?? 3 / 3 l )"m? *|? o? 2 . x j s f#| 9?? ?3? +?? ??p? + ?+? ? a ? ?+| ?? s#?? 9 ? e ? +#???3| . - 2 7 t ) y+ * t - 2 3 1 t )*e h * #?| t? - h s? ?? ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` w+? 0 - 2 . x j s f > 7 e t 3 9 f b 1 1|w+ ?? ? ?* ? ? s p n ? ? ? <? ? ? ? r 0k ? ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ?* ? 2 . x j s f#|??w+ ?-?* ? * ??* ? -? ? ?| ?? t [- h ?|?#bj t ? ?#bj t?0? ? e t 3 9 f b 1 1/ {?#? @/e? ?? z 1 a|.??l 2 . x j s fg ] j e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 17 rx r pup i l v pup bus master open-drain port pin 100 mosfet tx rx tx data ds28ea00 1-wire port rx = receive tx = transmit d 2 1 / ! n h|? e t 3 9 f b 1 1 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` 2 . x j s f ! s p n ? ? a ? 6?u?#bj t -2 e t 3 9 f b 1 1} | 9 s p n ? ? || ?? s p n ? ? |? t ?? 9? a5zk s p n ? | < ? )l d 2 2? , d * s f b e ! s p n ! \ 4 4 i ^ ? ? ? vs e t 3 9 f b 1 1| 9? i?| 5 9 ?? e s [ 9? d s d i ? ? 8?#??? - h|= z? +#? {?? - h| ? ? i??- hbd?4 0?k ? k ?c ) ' ? 5r s? # ? + *t? ? s| i [ 5 9?? e s d s dy?| n b u d i ! s p n ! \ 6 6 i ^ n b u d i s p n ? ?2 ? 7 5? s p n i' ? -2 7??;| ?| e t 3 9 f b 1 1?? 7 5? s p n ir]?|| e t 3 9 f b 1 1c 0b ?? <? ? ? ??- h s?w ?? t#?? t? - h -' ? ? t f b s d i ! s p n ! \ g 1 i ^ i;??* ? # ? -y?x 2 . x j s f#? {- h|k ?y?x - h|? e s ? #| # v# ? -] vi??? - h|? e s?{u? e s| ??-"??i ? *# ? ? ?? | ? l?|- hr? e s|? i?? | ? l?|- hr? e s| ( i ?? | ?v????|? i?? ? v??y?||- h syl??? + y( s ? +? 1 ?# ? s???@? y 2? |- h0 -? v??# ?| s p n i e ? j}r? - ?# ? {u] h|? e s?- h|? e s ? j|w+ 6? v ??.??l eb 2 9 8? 2 . x j s f?? | t j ? # ?0 - t f b s d i ! s p n ? y y?? e|| h??|? \g?? +? e t 3 9 f b 1 1 2#v? e ) ? 5 * 1+ { ?g d p o e j u j p o b m ! s f b e s p n ? ? ] d i b j o ? 6? h|?? d p o e j u j p o b m ! t f b s d i ! s p n ! \ f d i ^ ??? x k? h| h -2l??j 1 a d p o e j u j p o b m t f b s d i s p n ? t f b s d i ! s p n ? ???;| d p o e j u j p o b m t f b s d i s p n ? ? ??i 1 '{# ? ? 1#?$0k?? 0 h ?|- h ?(? ???u??;|| h| 7 5? s p n i ? -2]? 7 ? h n b u d i ! s p n ? p?- h??? -|? i?w ?? t|u vt g s | e t 3 9 f b 1 1 s 0b d p o e j u j p o b m t f b s d i s p n ? . g??l t @ ] j d p o e j u j p o b m ! s f b e ! s p n ! \ 1 g i ^ ? ? d i b j o ?| ]' ? 6?#v? e ) ? 5 * | h|? ?? + e t 3 9 f b 1 1 x2 y h? b * h ? ? 5 p o? c * en r? ) q j p c *? ] 1 ? e t 3 9 f b 1 1 s 0b d p o e j u j p o b m s f b e s p n ? ? 6? -| h u q x? ha { cu d p o e j u j p o b m s f b e s p n ? ?? h s ? 7 5?? e s? + h ? ? 5 p o? en ? ? ] 2 y 0b d p o e j u j p o b m s f b e s p n ? ? d p o e j u j p o b m s f b e s p n [ d i b j o ? '|.g??l ? 6? - ] j r? 6? [ q j p| 2 . x j s fk t 18 ______________________________________________________________________________________ t l j q ! s p n ! \ d d i ^ ]?;| ? -' ? ? ?y - h 7 5? s p n t i|= z? { 7 <? ? ? ? .c5? +#? {? - h t l j q s p n ? ? ? ? s t?#cp? ?? - h4 ?k ? ) ' ? 5 o s? # ? + * p w f s e s j w f . t l j q ! s p n ! \ 4 d i ^ ?]?;|# ? -0 - ? ? ?y?x- h 7 5? s p n i|= z 7 <? ?- ? . ?0 t l j q s p n ? y4|5 p w f s e s j w f . t l j q s p n ? s e t 3 9 f b 1 1??? y+ ) p e > 2 *?r% ? ?? ?0g s?r? y+?u ? ? ? ? 5 9 1 t| ?? t3#?|??- h?d??? *e h ) p e > 1 * ???; ? ? 3??} y+|- h ??? y+2 ?? ??u} y+| ? h?? y+ ?? tm ? n b u d i s p n t t f b s d i s p n ? z - p?? -? +#??? } y+|- h@&? p w f s e s j w f . t l j q ! s p n ? ? 2 s f b e ? ?i? - h4 ?g s #? k ?c ) ' ? 5 o? # ? + * p w f s e s j w f . n b u d i ! s p n ! \ 7 : i ^ ? p w f s e s j w f . n b u d i s p n ? ?2 y+ ? 7 5? s p n iz -'???#??u ?| e t 3 9 f b 1 1@4 s??? y+?? ? | 7 5? s p n ir]?|| e t 3 9 f b 1 1c 0b2 ?| < ? ? ? / 3? a| p w f s e s j w f . t l j q ! s p n ? t p w f s e s j w f . n b u d i ! s p n ? ?? y+|- h s? ? y+??} y+|- h?? .? 5 9 1 t| ?? t ? ) ??*e h p w f s e s j w f . n b u d i ! s p n ? 8?]? t??# e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 19 e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 20 ______________________________________________________________________________________ ds28ea00 tx presence pulse bus master tx reset pulse bus master tx rom function command ds28ea00 tx crc byte ds28ea00 tx family code (1 byte) ds28ea00 tx serial number (6 bytes) od = 0 master tx bit 0 y od reset pulse? y y y y y y n 33h read rom command? n 55h match rom command? bit 0 match? bit 0 match? n n n n n n n f0h search rom command? n ech conditional search command? n y master tx bit 1 master tx bit 63 bit 1 match? bit 63 match? y y from control functions flowchart (figure 9) to control functions flowchart (figure 9) ds28ea00 tx bit 0 ds28ea00 tx bit 0 master tx bit 0 bit 1 match? bit 63 match? ds28ea00 tx bit 1 ds28ea00 tx bit 1 master tx bit 1 ds28ea00 tx bit 63 ds28ea00 tx bit 63 master tx bit 63 y bit 0 match? n n n y y ds28ea00 tx bit 0 ds28ea00 tx bit 0 master tx bit 0 temperature alarm? n y bit 1 match? bit 63 match? ds28ea00 tx bit 1 ds28ea00 tx bit 1 master tx bit 1 ds28ea00 tx bit 63 ds28ea00 tx bit 63 master tx bit 63 y from figure 11b to figure 11b to figure 11b from figure 11b d 2 2 b / ! s p n ? d e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 21 master tx bit 0 od = 1 od = 1 od = 0 * *the od flag remains at 1 if the device was already at overdrive speed before the overdrive-match rom command was issued. * * chain = on? y n y cch skip rom command? n y 3ch overdrive- skip rom? n y en = low? y y 0fh conditional read rom? y 69h overdrive- match rom? n n n n od = 0 n od = 0 n master tx bit 1 master tx bit 63 y y y bit 0 match? master tx reset? bit 63 match? bit 1 match? n y master tx reset? n to figure 11a from figure 11a from figure 11a to figure 11a ds28ea00 tx family code (1 byte) ds28ea00 tx serial number (6 bytes) ds28ea00 tx crc byte d 2 2 c / ! s p n ? d e t 3 9 f b 1 1 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` 2 . x j s fg e t 3 9 f b 1 1?? ?|0gogi?k ?|rsv ?o g? ?#??c ??? o|g s?? ?? t [? #bj t ?| ??? ev 1v 2k ?? #bj t?j# ?t ?? ]?g s e t 3 9 f b 1 12*e h t y?y4| h ?r0g ? + ?? i??? y+ e t 3 9 f b 1 1 s2*e h ?r0g? y+??fp ?g p? | s h- 9?t??i?? s 2 . x j s f#| ?1- w q v q ]? ?"?1 w u m 2| s h-?i? t? 9??' 2 . x j s f#|?1- w j m n b y ? ? ?"?1 w u i 2?d 2 3|? |?1? . -,k?mc?? o? ) s q v q * [ 2 . x j s f? e| ? ? ?i?; ] ?3 e t 3 9 f b 1 1| w j m n b y ?1? c ??1y? ? \0 h e t 3 9 f b 1 10g |?* ? ??d 2 3?,? + ? ?ui| s p n ? [ <? ? ? ?? t? ?|b j t- e t 3 9 f b 1 1/ 3* q {ck ?|e?? + # ?? ]?g? h <? ? ?w? ? . ?? s# o?@? u s t u m , u g | .| u s t u m ? 5 9 1 t t ?? -' hs y+ ) ?u*e h y+| e t 3 9 f b 1 1 ? y+& u s t u m c? 9 1 t ? h? s? y+? + h ? y+& u s t u m . ?? 9 1 t [ 5 9 1 t? . ? h s ??0gt yi? # ?; 9k ?# ? ?? {c y+z 0 -? o? t ?e??? 5 ) e t 3 5 9 3 . y 1 1 t e t 3 5 9 1 cq? * s 2 . x j s f # o? w q v q - ?"?1 w u i ? e t 3 9 f b 1 1 s?w u q e i m ?0 - o?#@? u q e m | 1+ ? ?# bj t? ? 6??#bj t ?b ?? u n t q 0 6? 2 . x j s f# 5| ] ? u s t u i |? .?b? u q e i n b y u q e m n b y u s f d n j o ? [a u s t u i ?f e t 3 9 f b 1 1 a t* qk ?0ge? ?? - h ?|??? e|*et u s t u i | ? .?? 5 9 1 t ? y+ u s t u i |? .?? 5 9 tzc o ] 2 . x j s f h|? 0v e t 3 9 f b 1 1|k ?0g0 - ? ? ?? ?k ?0 -v sk ?- ???- h 0 - sk ??- h?? ? [v |?c?d 2 4?, ??0g? ? o?k ?# *i 2 . x j s f#?1 b? ?"?1 w u m 2 e t 3 9 f b 1 1?]? i??v e . \ k ?# ?rg2 ? e .k ?|?i . r? 6? [ q j p| 2 . x j s fk t 22 ______________________________________________________________________________________ resistor master ds28ea00 t rstl t pdl t rsth t pdh master tx "reset pulse" master rx "presence pulse" v pup v ihmaster v th v tl v ilmax 0v t f t rec t msp d 2 3 / ! ?* ? - ?? [?#bj t e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 23 resistor master resistor master resistor master ds28ea00 v pup v ihmaster v th v tl v ilmax 0v t f v pup v ihmaster v th v tl v ilmax 0v t f v pup v ihmaster v th v tl v ilmax 0v t f t slot t w1l t rec t slot t slot t w0l t rec master sampling window t rl t msr write-one time slot write-zero time slot read-data time slot d 2 4 / ! 0v d e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 24 ______________________________________________________________________________________ ?u- h ? v 2 v??v 2|??3 . u x 2 m n b y ?f? k ?#?|?1? ? ?" w u i ? v 1 v? ?v 1|? . u x 1 m n j o ?f2k ?#?|?1?? ? ?" w u i ? ?#" - #|0g?s u x 1 m ? u x 2 m ? .k ?#?|?1y - w j m n b y k ?# ?1 - w u i e t 3 9 f b 1 1? a ? . u s f d 2#? * qe? - hu ? k ? ? * v 2 $?k ?#?|?1? ??3 . u s m ?f??? w u m 2? u s m >|bj 1 #? e t 3 9 f b 1 1 ?3k ?# o? ]? ? \ ?f o [?1( bj 2 e t 3 9 f b 1 1@y?k ?#|??3 u s m ?f ??3 t *? ?|g > ) u n t s n j o ? u n t s n b y *? u s m , )? . * [ e t 3 9 f b 1 1|]? a4 ?? ? > ??-k ?#?k ??#" - #|0g u s m b??? *? -a& ?b? { c?yu? u n t s n b y | . ?rs-k ?#?uk ? ? ???w?u u t m p u ?fz' e t 3 9 f b 1 1?| a ? . u s f d 2#? a| * qe??@z | u s f d ?8? 2 . x j s f#?? { e t 3 9 f b 1 1 |= z?? - h||?b? u s f d |?2 8b | 2 . x j s f hr??? j -' ?? e t 3 5 9 3 . y 1 1 t e t 3 5 9 1 c| 2 . x j s f#q?? 2 . x j s f a ? . ?r??? o ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ??? ev )$ ? ? * ? 2 . x j s f;| ? ? ) 2 . x j s fq? *?g s~$e . ?r <?c -## 5??|p% 2 . x j s f? e j ?5ju |l0 ? ?? e|? y [` ? |y4-?u j}?| (? - ??t? $ ?? t??z? (?-? 2 . x j s f0g# 5?| ? & til-j]? ? ]u 2 . x j s f # 5?| ? g s ?& ? ? | ?& - [?- h ?y4[ ? + ? t f b s d i s p n ? ?i tt?? h| ? ? |?? ? ev e t 3 9 f b 1 1g ??do| 2 . x j s f | ?= ? ? -2 ]?- h[?| | mt e t 3 9 f b 1 1| 2 . x j s f w?;- h|?2? ?y4? 2 * ?#bj t| ]?s hj < ?k - ? q|r# ?| s v; h| ?ilt ? ?3 ?|??~$s h <??lk u g q e ??c*et [ y+ ??y4s? 3 * ?? 5| ? ?0 if ? 6? * | ]?z - ]? h ? | e tz | if? ?+ y?+ 4 * ??? |$ ?" w u i ?? ?? + ? ? &|?1?? w u i cy?? w u i . w i z y h ?? ? t )d 2 5||, ? b * ??? \ 2 . x j s f h ??+ 5 * ?;? ? ? ?w? . u s f i ?c| . >?z > t' ?&?1?? ?" w u i . ! w i z )d 2 5||, ? c u h m = u s f i * ?&?1? ? ? r ? + - u s f i . >&?1 ] t ?&?1?? w u i ?" if y izk s? ?? ?d | * )d 2 5||, ? d u h m u s f i * ?????v|lk w i z u s f i ?r?c|- hg z? ? ?| 2 . x j s f ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ? 6? - h? ? 5|? h| q j p c[ m ) en *? ] 1 ? 5|? h| q j p b[ m ) done *? h| q j p c $ ( {?d 2 6?, 2 . x j s f ? 6? ? 5 h |? ? -0 - e[?#? ?* h? ? ? t l j q ! s p n ? m ? ? d i b j o ! p o ? s?? h?? ? 5 p o? ? ? 5||? hj??? h -0 - q j p b[ m| s d p ? o? s q j p b 0 q j p c { | ] ?3$? 2? +y @?t? w e e ?? ??? (6 ? 5 <? ?? ? a t ? 2 . x j s f? o? .|? 0 5?u q j p b 0 q j p c ?1$??i| ] 2 ? 2e? ? ? d p o e j u j p o b m s f b e s p n ? ' ? 5||? h0b 7 5?? e s ?@? e s @i?? h|i/? ? 5| { v ? ? d i b j o ! e p o f ? z0 - 6?r| h| q j p b[ m -' ? 5||? h| q j p c[ m? ] 14 4? c? 6?u| h(0b ? 2e? ? ? d p o e j u j p o b m s f b e s p n ? ?? ? e t 3 9 f b 1 15 ? 5| q j p c???3|? hp % ? h ?? e s+?0b ? s? e i?@? ? e s 3? h ? ? 5 e p o f??2y * 0b { v ? ? d i b j o ! e p o f ? j |2e? |$0? h|? e s ? ? e ?? ? d p o e j u j p o b m s f b e s p n [ d i b j o e p o f ? ? + ?? h d p o e j u j p o b m s f b e s p n ? *0b? ? 5||?? h ?/$0 ?? h? ? 6? -|" ? ? 5||?? h ? ? 5 e p o f? ?b ? t l j q s p n ? ? { ? d i b j o p g g ? ??? e 6?z - s?? h ?? ? 5 p g g?@0 - q j p b d d f t t s f b e [ q j p b d d f t t x s j u f ? ? <? q j p c [ q j p b[ m e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 25 v pup v th v hy 0v t reh t gl t reh t gl case a case c case b d 2 5 / ! 4?,@d ds28ea00 io piob pioa gnd v dd v dd *capacitance of the cabling between adjacent devices in the chain. ** 1-wire master #1 ds28ea00 io piob px. y microcontroller pioa gnd v dd #2 ds28ea00 io piob pioa gnd v dd #3 d 2 6 / ! ? 6? | e t 3 9 f b 1 1 {d ) ? 5 ? * e t 3 9 f b 1 1 ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` 2 . x j s f0gog ? ?c o s- r? 6? [ q j p| 2 . x j s fk t 26 ______________________________________________________________________________________ symbol description rst 1-wire reset pulse generated by master pd 1-wire presence pulse generated by slave select command and data to satisfy the rom function protocol skipr rom function command: skip rom cdrr rom function command: conditional read rom wsp command: write scratchpad rsp command: read scratchpad cpsp command: copy scratchpad ctemp command: convert temperature rpm command: read power mode rcle command: recall eeprom pior command: pio access read piow command: pio access write chain command : chain ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` 2 . x j s f0g ? ? e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t ______________________________________________________________________________________ 27 rst wsp write scratchpad pd rst pd select <3 bytes> <8 bytes> ff loop rst rsp rpm crc read scratchpad pd select rst convert temperature (parasite powered) pd select ff loop rst convert temperature (local v dd powered) pd select ff loop during the wait, the master should activate a low-impedance bypass to the 1-wire pullup resistor. during the wait, the master should activate a low-impedance bypass to the 1-wire pullup resistor. see the command description for behavior if the device is in chain on or chain done state. rst copy scratchpad (parasite powered) pd cps select wait t progmax ff loop wait t convmax ff loop the master reads 00h bytes until the write cycle is completed. rst copy scratchpad (local v dd powered) pd cps <00h> <00h> <00h> rpm e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t 28 ______________________________________________________________________________________ ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` 2 . x j s f0g ? ? )? * rst pio access write (invalid data byte) pd select ff loop aa loop 00 loop xx loop rst change chain state (success) pd select chain chain chain chain chain rst change chain state (transmission error) pd select the pio access write command is ignored by the device while in chain on or chain done state. rst change chain state (invalid control byte) pd select rst pd <5ah> [ fdz ?? china.maxim-ic.com/packages v? o v? i am s 8 sop u8+1 21-0036 e t 3 9 f b 1 1 r? 6? [ q j p| 2 . x j s fk t n b y j ny n b y j n?-2j|? \? 5' ? y ?? - n b y j n? ?? \ . ??? \0| ? ??- t ? [ ?|z ? maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ______________________ 29 ? 2009 maxim integrated products n b y j n 5 n b y j n ! j o u f h s b u f e ! q s p e v d u t - ! j o d / |?* 0 1/07 1 6/07 2 2 4/09 n b y j n ? ?0 ? 9 4 3 9g( ?v i 2 1 1 1 9 4 ? e? ?? 9 1 1 ! 9 2 1 ! 1 4 2 1 ? ?? 1 2 1 . 7 3 2 2 6 2 : : ^? 1 2 1 . 7 3 2 2 6 3 : : ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ` ?? ?% ??(k ???e ? "?t s b c t p m v u f ! n b y j n v n ! s b u j o h t ] j||@t *?? . 5 1 d? , 9 6 d ? ?? . 6 6 d? , 2 3 6 d pd y?k ?t ? ? ? ?? |
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