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june 2002 ? 2002 fairchild semiconductor international FDS2070N7 rev c1(w) FDS2070N7 150v n-channel powertrench ? ? ? ? mosfet general description this n-channel mosfet has been designed specifically to improve the overall efficiency of dc/dc converters using either synchronous or conventional switching pwm controllers. it has been optimized for ?low side? synchronous rectifier operation, providing an extremely low r ds(on) in a small package. applications ? synchronous rectifier ? dc/dc converter features ? 4.1 a, 150 v. r ds(on) = 78 m ? @ v gs = 10 v r ds(on) = 88 m ? @ v gs = 6.0 v ? high performance trench technology for extremely low r ds(on) ? high power and current handling capability ? fast switching, low gate charge (38nc typical) ? bottomless so-8 package: enhanced thermal performance in industry-standard package size so-8 bottomless 4 3 2 1 5 6 7 8 bottom-side drain contact absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 150 v v gss gate-source voltage 20 v i d drain current ? continuous (note 1a) 4.1 a ? pulsed 30 p d power dissipation for single operation (note 1a) 3.0 w (note 1b) 1.8 t j , t stg operating and storage junction temperature range ?55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 40 c/w r jc thermal resistance, junction-to-case (note 1) 0.5 package marking and ordering information device marking device reel size tape width quantity FDS2070N7 FDS2070N7 13?? 12mm 2500 units FDS2070N7
FDS2070N7 rev c1(w) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units drain-source avalanche ratings (note 2) w dss drain-source avalanche energy single pulse, v dd = 75 v, i d = 4.1 a 370 mj i ar drain-source avalanche current 4.1 a off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = 250 a 150 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 154 mv/ c i dss zero gate voltage drain current v ds = 120 v, v gs = 0 v 1 a i gssf gate?body leakage, forward v gs = 20 v, v ds = 0 v 100 na i gssr gate?body leakage, reverse v gs = ?20 v, v ds = 0 v ?100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 2.6 4 v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c ?7 mv/ c r ds(on) static drain?source on?resistance v gs = 10 v, i d = 4.1 a v gs = 6.0v, i d = 3.8 a v gs = 10 v, i d = 4.1 a,t j = 125 c 57 60 111 78 88 160 m ? g fs forward transconductance v ds = 10 v, i d = 4.1 a 24 s dynamic characteristics c iss input capacitance 1884 pf c oss output capacitance 102 pf c rss reverse transfer capacitance v ds = 75 v, v gs = 0 v, f = 1.0 mhz 35 pf r g gate resistance v gs = 15 mv, f = 1.0 mhz 1.6 ? switching characteristics (note 2) t d(on) turn?on delay time 10 20 ns t r turn?on rise time 6 12 ns t d(off) turn?off delay time 40 64 ns t f turn?off fall time v dd = 75 v, i d = 1 a, v gs = 10 v, r gen = 6 ? 20 36 ns q g total gate charge 38 53 nc q gs gate?source charge 8 nc q gd gate?drain charge v ds = 75 v, i d = 4.1 a, v gs = 10 v 11 nc drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current 2.5 a v sd drain?source diode forward voltage v gs = 0 v, i s = 2.5 a (note 2) 0.75 1.2 v t rr diode reverse recovery time 75 ns q rr diode reverse recovery charge i f = 4.1a d if /d t = 100 a/s (note 2) 404 nc notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 40c/w when mounted on a 1in 2 pad of 2 oz copper b) 85c/w when mounted on a minimum pad of 2 oz copper scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0% FDS2070N7
FDS2070N7 rev c1(w) dimensional outline and pad layout FDS2070N7
FDS2070N7 rev c1(w) typical characteristics 0 10 20 30 40 0246810 v ds , drain-source voltage (v) i d , drain current (a) 6.0v 4.0v v gs = 10v 4.5v 0.8 1 1.2 1.4 1.6 0 5 10 15 20 25 30 i d , drain current (a) r ds(on) , normalized drain-source on-resistanc e v gs = 4.0v 6.0v 4.5v 10v figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. 0.2 0.6 1 1.4 1.8 2.2 2.6 -50-25 0 255075100125150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 4.1 a v gs = 10v 0.04 0.06 0.08 0.1 0.12 0.14 0.16 246810 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 2.1a t a = 125 o c t a = 25 o c figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0 10 20 30 40 50 2.533.544.55 v gs , gate to source voltage (v) i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = 20v 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 v sd , body diode forward voltage (v) i s , reverse drain current (a ) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. FDS2070N7
FDS2070N7 rev c1(w) typical characteristics 0 2 4 6 8 10 0 10203040 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 4.1a v ds = 25v 75v 50v 0 500 1000 1500 2000 2500 0 30 60 90 120 150 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.001 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain-source voltage (v) i d , drain current (a) dc 1s 100ms r ds(on) limit v gs = 10v single pulse r ja = 85 o c/w t a = 25 o c 10ms 1ms 100s 0 10 20 30 40 50 0.01 0.1 1 10 100 1000 t 1 , time (sec) p(pk), peak transient power (w) single pulse r ja = 85c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.01 0.1 1 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r(t), normalized effective transient thermal resistance r ja (t) = r(t) * r ja r ja = 85 c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p(pk) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1b. transient thermal response will change depending on the circuit board design. FDS2070N7

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