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preliminary data this is preliminary information on a new product now in development or undergoing evaluation. details are subject to change without notice. rev 2 july 2005 cd00061065 1/23 23 STA543SA 24w x 1 + 7w x 2 triple amplifier with dc volume control features output power capability 24w x 1 + 7w x 2 @ v cc = 15v, r l = 4 ? , thd = 10% linear dc volume control for each single channel minimum external components count: ? no bootstrap capacitors ? no boucherot cells ? internally fixed gain (20db se, 26db btl) st-by function (cmos compatible) no audible pop during st-by operations diagnostic facilities ?clip detector ?out to gnd short ? out to vs short ? soft short at turn-on ? thermal shutdown proximity protections ouput ac/dc short circuit soft short at turn-on overrating chip temperature with soft thermal limiter very inductive loads fortuitous open gnd esd description the device is a class ab audio amplifier assembled in the clipwatt19 package; it is designed for high quality sound application. the STA543SA is a 3-channels audio amplifier with dc volume control dedicated for each single channel. it is a device suitable for 2.1 solution thank to its output configuration with two single ended channels and one bridge. the short circuit protection, the thermal protection and the diagnostics functions are integrated in the device. order codes clipwatt 19 part number temp range, c package packing STA543SA 0 to 70 clipwatt 19 tube www.st.com .com .com .com 4 .com u datasheet
STA543SA 2/23 cd00061065 contents 1 block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test board and layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 test board parts list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 evaluation board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 crcuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 evaluation board functional description: . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2.1 input cut-off frequency: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2.2 output cut-off frequency: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2.3 crossover network for sw: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 general structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 gain internally fixed to 20db in single ended, 26db in bridge . . . . . . . . . . 15 5.2 silent turn on/off and muting/stand-by function . . . . . . . . . . . . . . . . . . . . 15 5.3 stand-by driving (pin9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.4 output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.5 rail-to-rail output voltage swing with no need of bootstrap capacitors. . 15 5.6 absolute stability without any external compensation. . . . . . . . . . . . . . . . . 16 5.7 built?in shortcircuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.7.1 diagnostic facilities (pin 12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.7.2 thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.8 handling of the diagnostic information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.9 pcb-layout grounding (general rules) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 .com .com .com .com 4 .com u datasheet
STA543SA cd00061065 3/23 6 thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6.1 example (a): 2 channels single ended + 1ch (btl) . . . . . . . . . . . . . . . . . . 20 7 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 .com .com .com .com 4 .com u datasheet
STA543SA 4/23 cd00061065 1 block diagram and pins description 1.1 block diagram figure 1. block diagram 1.2 pins description figure 2. pins connections (top view) vcc vcc diag out3+ out2 out3- out1 in1 in2 stby in3 vol3 vol2 vol1 vol_out svr pw_gnd s_gnd svr svr svr svr svr 4 6 5 17 3 1 2 19 18 12 10 8 16 14 11 13 15 9 7 amp_in 1 2 3 4 5 6 7 d04au1552 9 10 11 8 13 14 15 16 17 18 19 12 vcc in1 out1 out2 vol2 svr in2 vol1 s_gnd diag st_by p_gnd in3 amp_in vol3 vol_out out3- out3+ vcc2 .com .com .com .com 4 .com u datasheet
STA543SA 1 block diagram and pins description cd00061065 5/23 table 1. pin description n pin name pin type function 1 out1 output channel 1 output 2 out2 output channel 2 output 3 vcc power power supply 4 in1 input channel 1 input 5 in2 input channel 2 input 6 vol1 input channel 1 volume control 7 vol2 input channel 2 volume control 8 svr input supply voltage rejection 9 st-by input stand-by 10 p_gnd power power ground 11 s_gnd power signal ground 12 diag output diagnostics 13 vol3 input channel 3 volume control 14 vol_out output channel 3 volume control output 15 in3 input channel 3 input 16 amp_in input channel 3 amplifier input 17 vcc2 power power supply 18 out3- output channel 3 negative output 19 out3+ output channel 3 positive output .com .com .com .com 4 .com u datasheet
2 electrical specifications STA543SA 6/23 cd00061065 2 electrical specifications 2.1 absolute maximum ratings table 2. absolute maximum ratings 2.2 thermal data table 3. thermal data 2.3 electrical characteristics symbol parameter value unit v op operating supply voltage 18 v v s dc supply voltage 20 v p tot total power dissipation (t case = 70c) 35 w t stg , t j storage and junction temperature -40 to150 c v ctr volume control dc voltage 7 v t op operating temperature 0 to 70 c symbol parameter value unit r th j-case thermal resistance junction to case max. 2 c/w r th j-amb thermal resistance junction to ambient max. 45 c/w table 4. electrical characteristics (refer to the test circuit, v s = 15v; r l = 4 ? ; f = 1khz; t amb = 25c unless otherwise specified). symbol parameter test condition min. typ. max. unit v s supply voltage range 8 18 v i d total quiescent drain current 150 ma v os output offset voltage single ended bridge -250 -150 250 150 mv p o output power thd = 10%: r l = 4 ? bridge single ended 24 7 w w thd total harmonic distortion r l = 4 ? , single ended, po =0.1 to 4w bridge, po =0.1 to10w 0.4 0.4 % % c t cross talk f = 1 khz single ended f = 10 khz single ended 70 60 db db f = 1 khz bridge f = 10 khz bridge 55 60 db db r in input impedance single ended and bridge 20 30 k ? .com .com .com .com 4 .com u datasheet
STA543SA 2 electrical specifications cd00061065 7/23 note: (*) diag pulled-up to 5v with 10 k ? ; r l = 4 ? (**) for channel 3: if used the input pin 16 (with 100nf decoupling) instead of pin 15 the voltage gain is always max. and it is independent from volume control. g v maximum voltage gain internally fixed single ended, vol ctrl (pins 6 and 7) > 4.5v bridge, vol ctrl (pin 13) > 4.5v (**) 19 25 20 26 21 27 db db a min vol attenuation at minimum volume vol ctrl < 0.5v 80 db g v voltage gain match single ended 0.5 db e n total output noise f = 20 to 22 khz (play, max. volume) single ended bridge 500 600 v f = 20 to 22 khz (play, max. attenuation) single ended bridge 250 500 v svr supply voltage rejection rg = 0; f = 300hz 50 db a sb stand-by attenuation 80 90 db i sb st-by current consumption v st-by = 0 to 1.5v 100 a v sb st-by in threshold voltage 1.5 v v sb st-by out threshold voltage 3.5 v i stby st-by pin current play mode v stby = 5v 50 a max driving current under fault 5 ma i cd off clipping detector output average current d = 1% (*) 90 a i cd on clipping detector output average current d = 5% (*) 160 a v diag voltage saturation on diag sink current at diag = 1ma 0.7 v t w thermal warning 140 c t m thermal muting 150 c t s thermal shut-down 160 c table 4. electrical characteristics (continued) (refer to the test circuit, v s = 15v; r l = 4 ? ; f = 1khz; t amb = 25c unless otherwise specified). symbol parameter test condition min. typ. max. unit .com .com .com .com 4 .com u datasheet
3 test board and layout STA543SA 8/23 cd00061065 3 test board and layout figure 3. test board figure 4. pc boards and component layout component side solder side component layout .com .com .com .com 4 .com u datasheet
STA543SA 3 test board and layout cd00061065 9/23 figure 5. test circuit +5v +5v +5v +5v vol. contr.1 vol. contr.2 vol. contr.3 on off vs p3 50k ic1 sta540sa - STA543SA out1 1 vcc 3 in2 5 vol2 7 stby 9 s_gnd 11 vol3 13 in3 15 vcc 17 out3+ 19 out2 2 in1 4 vol1 6 svr 8 pw_gnd 10 diag 12 vol_out 14 amp_in 16 out3- 18 in1 + c8 47f 25v jp2 st-by 1 2 3 pgnd out4 (out3-) out1 r2 270k c5 0.22f p1 50k jp5 c7 0.22f + c11 1000f 25v jp3 pgnd + c15 2200f 25v c4 0.1f in3 + c9 10f 25v c3 0.22f r1 270k c10 0.1f p2 50k jp6 jp1 + c12 2200f 25v out2 r3 270k r4 10k in2 sgnd out3 (out3+) in4 c1 0.22f c6 0.1f + c13 2200f 25v c2 0.1f pgnd jp4 diag +5v + c14 2200f 25v .com .com .com .com 4 .com u datasheet
3 test board and layout STA543SA 10/23 cd00061065 3.1 test board parts list table 5. test board parts list components suggested value purpose r1, r2, r3 300k ? dc volume ctrl r4 10k ? st-by time constant p1, p2, p3 100k ? dc vol. -ctrl c2, c4, c6 0.1 f vol. -ctrl bypass c1,c3,c5,c7 0.22 f input dc decoupling c8 47 f ripple rejection c9 10 f st-by time constant c10 0.1 f supply voltage bypass c11 1000 f supply voltage bypass c12,c13 2200 f output dc decoupling table 6. jumper selection jumpers purpose connection jp1, jp2, jp3 dc volume ctrl closed jp4 volume ctrl out closed jp5, jp6 bypass dc out capacitors closed connect btl speaker between out 3+ and out 3- .com .com .com .com 4 .com u datasheet
STA543SA 4 evaluation board cd00061065 11/23 4 evaluation board in addition to the test board shown in figure 3. intended also to evaluate the sta540sa amplifier, it is possible to order the dedicated STA543SA evaluation board of figure 6. the pcb layout (single layer) is shown in figure 7. 4.1 crcuit description with this board it is possible to amplify three analog signals left, right, subwoofer coming from separated sources or to generate the bass part to be sent to the subwoofer via a passive crossover network. all the three channels have a linear dc volume control. figure 6. evaluation board schematic +5v +5v +5v +5v +5v 100k vol. contr. 1 vol. contr. 2 vol. contr. 3 p1 100k p1 100k c7 100nf c7 100nf r7 n.m. r7 n.m. r4 300k r4 300k outr outr sgnd sgnd out3+ out3+ c6 100nf c6 100nf r5 300k r5 300k r9 10k r9 10k vs vs + c14 47f 25v + c14 47f 25v c13 1f c13 1f r1 10k r1 10k c10 0.47f c10 0.47f pgnd pgnd + c3 1000f 25v + c3 1000f 25v c8 0.22f c8 0.22f + c5 1000f 25v + c5 1000f 25v r2 n.m. r2 n.m. c4 0.22f c4 0.22f c11 n.m. c11 n.m. outl outl sgnd sgnd gnd gnd r3 n.m. r3 n.m. +5v +5v out1 1 out2 2 vcc 3 in1 4 in2 5 vol1 6 vol2 7 svr 8 st_by 9 p_gnd 10 s_gnd 11 diag 12 vol3 13 vol_out 14 in3 15 amp_in 16 vcc2 17 out3- 18 out3+ 19 u1 STA543SA u1 STA543SA + c1 10f 25v + c1 10f 25v in1(l) in1(l) pgnd pgnd + c9 1000f 25v + c9 1000f 25v in2(r) in2(r) c12 100nf c12 100nf in3(sw) in3(sw) r6 n.m. r6 n.m. p2 100k p2 100k out3- out3- st-by st-by c2 100nf c2 100nf r8 300k r8 300k diag diag .com .com .com .com 4 .com u datasheet
4 evaluation board STA543SA 12/23 cd00061065 figure 7. evaluation board pcb and component layout table 7. part list component recommended value purpose larger than recommended value smaller then recommended value r1 10k st-by circuit larger on/off time smaller on/off time r2,r7 not mounted see notes r3,r6 not mounted see notes r4,r5,r8 300k dc-vol ctrl p1,p2 100k pot. dc-vol ctrl r10 10k open collector pull up c1 10uf st-by circuit larger on/off time smaller on/off time c2 100nf supply voltage bypass danger of oscillations c3 1000uf supply voltage bypass danger of oscillations c4,c8 220nf input dc decoupling l/r lower low freq cutoff higher low freq cutoff c10 470nf input dc decoupling bass lower low freq cutoff higher low freq cutoff c11 not mounted see notes c6,c7,c12 100nf dc vol. bypass c5,c9 1000uf output dc decoupling lower low freq cutoff higher low freq cutoff c13 1uf c14 47uf svr increase of svr , increase of switch on time degradation of svr component layout pcb .com .com .com .com 4 .com u datasheet
STA543SA 4 evaluation board cd00061065 13/23 4.2 evaluation board functional description: 4.2.1 input cut-off frequency: the input cut-off frequency is set by the external capacitor (c4,c8,c10) values and by the internal input impedance rin ( 30k ? typ) fi (cut-off) = 1 / 2 ( ri x ci) for the suggested values we have left/right f i = 1 / 2 (30k ? x 220nf) = 24hz sw fi = 1 / 2 (30k ? x 470nf) = 11hz 4.2.2 output cut-off frequency: the output cut-off frequency is set by the dc decoupling capacitor placed in series to the speaker (c5,c9) value and by the speaker impedance 4.2.3 crossover network for sw: with this board it's possible, when the bass audio signal to be sent to ch.3 is not available from the audioprocessor, to generate it with a simple low pass filter composed by an rc network. the components to be added are r3,r6,c11: fo = 1 / 2 r3 (r4) x c11 example: for r3 = r4 = 4k7 we have c11 = 100nf 340hz c11 = 220nf 150hz c11 = 330nf 100hz it is advisable at this point to modify the value of the dc decoupling capacitors in such a way to send to l and r speakers only the high frequencies. for example the frequency response shown in figure 8. was obtained with rl = 8ohm, c5=c9= 100uf, r3=r6= 4k7 and c11=220nf note: in order to give the input freq response less sensitive to the spread in the input impedance (rin parameter) , it is possible to add externally two resitors r2,r7 in parallel to rin. c5,c9 8ohm 6ohm 4ohm unit 100uf 199 265 398 hz 220uf 90 121 181 hz 470uf 42 56 85 hz 1000uf 20 27 40 hz 2200uf 9 12 18 hz .com .com .com .com 4 .com u datasheet
4 evaluation board STA543SA 14/23 cd00061065 figure 8. frequency response -50 +20 -45 -40 -35 -30 -25 -20 -15 -10 -5 +0 +5 +10 +15 d b r a 10 20k 20 50 100 200 500 1k 2k 5k 10k hz r3=r6= 4k7 c11= 220nf c5=c9= 100uf rl= 8ohm l / r sw .com .com .com .com 4 .com u datasheet
STA543SA 5 general structure cd00061065 15/23 5 general structure 5.1 gain internally fixed to 20db in single ended, 26db in bridge advantages of this design choice are in terms of: components and space saving output noise, supply voltage rejection and distortion optimization. 5.2 silent turn on/off and muting/stand-by function the stand-by can be easily activated by means of a cmos level applied to pin 9 through a rc filter. under stand-by condition the device is turned off completely (supply current = 1ma typ.; output attenuation= 80db min.). every on/off operation is virtually pop free. furthemore, at turn-on the device stays in muting condition for a time determined by the value assigned to the svr capacitor. while in muting the device outputs becomes insensitive to any kinds of signal that may be present at the input terminals. in other words every transient coming from previous stages produces no unplesantacoustic effect to the speakers. 5.3 stand-by driving (pin9) some precautions have to be taken in the definition of stand-by driving networks: pin 9 cannot be directly driven by a voltage source whose curent capability is higher than 5ma. in pratical cases a series resistance has always to be inserted, having it the double purpose of limiting the current at pin 9 and to smooth down the stand-by on/off transitions - in combination with a capacitor - for output pop prevention. in any case, a capacitor of at lest 100nf from pin 9 to s-gnd, with no resistance in between, is necessary to ensure correct turn-on. 5.4 output stage the fully complementary output stage was made possible by the development of a new component: the st exclusive power icv pnp. a novel design based upon the connection shown in figure 9. has then allowed the full exploitation of its possibilities. the clear advantages this new approach has over classical output stages are as follows: 5.5 rail-to-rail output voltage swing with no need of bootstrap capacitors. the output swing is limited only by the v cesat of the output transistors, which are in the range of 0.3 ? (r sat ) each. .com .com .com .com 4 .com u datasheet
5 general structure STA543SA 16/23 cd00061065 classical solutions adopting composite pnp-npn for the upper output stage have higher saturation loss on the top side of the waveform. this unbalanced saturation causes a significant power reduction. the only way to recover power consists of the addition of expensive bootstrap capacitors. 5.6 absolute stability without any external compensation. referring to the circuit of figure 9. the gain v out /v in is greater than unity, approximately 1+r2/ r1. the dc output (vcc/2) is fixed by an auxiliary amplifier common to all the channels. by controlling the amount of this local feedback it is possible to force the loop gain (a* ) to less than unity at frequency for which the phase shift is 180. this means that the output buffer is intrinsically stable and not prone to oscillation. most remarkably, the above feature has been achieved in spite of the very low closed loop gain of the amplifier. in contrast, with the classical pnp-npn stage, the solution adopted for reducing the gain at high frequencies makes use of external rc networks, namely the boucherot cells. figure 9. the new output stage 5.7 built?in shortcircuit protection reliable and safe operation, in presence of all kinds of short circuit involving the outputs is assured by built-in protectors. additionally to the ac/dc short circuit to gnd, to vs, across the speaker, a soft short condition is signalled out during the turn-on phase so assuring correct operation for the device it self and for the loudspeaker. this particular kind of protection acts in such a way to avoid the device is turned on (by st-by) when a resistive path (less than 16 ohms) is present between the output and gnd. as the involved circuitry is normally disabled when a current higher than 5ma is flowing into the st-by pin, it is important, in order not to disable it, to have the external current source driving the stby pin limited to 5ma. .com .com .com .com 4 .com u datasheet
STA543SA 5 general structure cd00061065 17/23 5.7.1 diagnostic facilities (pin 12) the STA543SA is equipped with a diagnostic circuitry able to detect the following events: clipping in the output signal thermal shutdown output fault: ? short to gnd ? short to vs ? soft short at turn on the information is available across an open collector output (pin 12) through a current sinking when the event is detected figure 10. clipping detection waveforms a current sinking at pin 12 is provided when a certain distortion level is reached at each output. this function allows gain compression facility whenever the amplifier is overdriven. 5.7.2 thermal shutdown in this case the output 12 will signal the proximity of the junction temperature to the shutdown threshold. typically current sinking at pin 12 will start ~10c before the shutdown threshold is reached. figure 11. output fault waveforms .com .com .com .com 4 .com u datasheet
5 general structure STA543SA 18/23 cd00061065 figure 12. fault waveforms 5.8 handling of the diagnostic information as different kinds of information is available at the same pin (clipping detection, output fault, thermal proximity), this signal must be handled properly in order to discriminate the event. this could be done taking into account the different timing of the diagnostic output during each case. normally the clip detector signalling produces a low level at out 12 that present under faulty conditions: based on this assumption an interface circuitry to differentiate the information is the represented in the schematic of figure 14. figure 13. waveforms soft short out to vs short fault detection correct turn-on out to gnd short t t t st-by pin voltage 2v output waveform vpin 12 check at turn-on (test phase) short to gnd or to vs d05au1603 t t t st-by pin voltage vs output waveform vpin 12 waveform short to gnd or to vs d05au1604 clipping thermal proximity .com .com .com .com 4 .com u datasheet
STA543SA 5 general structure cd00061065 19/23 figure 14. 5.9 pcb-layout grounding (general rules) the device has 2 distinct ground leads, p-gnd (power ground) and s-gnd (signal ground) which are practically disconnected from each other at chip level. proper operation requires that p-gnd and s-gnd leads be connected together on the pcb-layout by means of reasonably low-resistance tracks. as for the pcb-ground configuration, a star-like arrangement whose center is represented by the supply-filtering electrolytic capacitor ground is highly advisable. in such context, at least 2 separate paths have to be provided, one for p-gnd and one for s-gnd. the correct ground assignments are as follows: ? standby capacitor, pin 9 (or any other standby driving networks): on s-gnd ? svr capacitor (pin 8): on s-gnd and to be placed as close as possible to the device. ? input signal ground (from active/passive signal processor stages): on s-gnd. ? supply filtering capacitors (pins 3,17): on p-gnd. the (-) terminal of the electrolytic capacitor has to be directly tied to the battery (-) line and this should represent the starting point for all the ground paths. .com .com .com .com 4 .com u datasheet
6 thermal information STA543SA 20/23 cd00061065 6 thermal information in order to avoid the thermal protection intervention that is placed at t j =150c (thermal muting) or t j =160c (thermal shut-down), it is important the heat sinker r th (c/w) dimensioning. the parameters that influence the dimensioning are: maximum dissipated power for the device (p d max ) max.thermal resistance junction to case (r thj-c ) max. ambient temperature tamb. max there is also an additional term that depends on the iq (quiescent current). 6.1 example (a): 2 channels single ended + 1ch (btl) v cc = 14.4v, r load = 2x 4 ? (se) + 1x 4 ? (btl) pout = 2 x 7w + 1 x 24w (heat sink) r thc-a = c/w note: the values found gives an heatsinker that is dimensioned to sustain the max. dissipated power, but as explained in the application note (an1965) the heatsinker can be smaller when we consider the real application where a musical program is used. if we consider the so called "average listening dissipated power" concept we obtain a value that is about 40% less respect the pdmax (see an1965 for reference). so in the examples (a) and we will obtain the value for the average listening dissipated power that is respectively: -example (a) : 15.76 w - 40% = 9.45w that gives r thc-a = 8.5c/w in figure 15. is shown the power derating curve for the device figure 15. power derating curve p dmax 2 vcc 2 2 2 r1 ----------------- - 2vcc 2 2 r1 ---------------- - + ? 22.62 10.5 + ? 15.76w === 150 t ambmax ? p dmax ---------------------------------------- r thj c ? ? 150 50 ? 15.76 ---------------------- 2 ? 4.3 == 0 5 10 15 20 25 30 0 20 40 60 80 100 120 140 160 1) infinite 2) 3.5c/w 3) 5c/w 4) 7c/w 5) 10c/w 4 1 3 2 pd(w ) tamb (c) 5 .com .com .com .com 4 .com u datasheet
STA543SA 7 package information cd00061065 21/23 7 package information figure 16. clipwatt 19 mechanical data & package dimensions outline and mechanical data 7390917 a dim. mm inch min. typ. max. min. typ. max. a3.20.126 b 1.05 0.041 c 0.15 0.006 d 1.50 0.061 e 0.49 0.55 0.019 0.022 f 0.47 0.50 0.58 0.018 0.020 f1 0.1 0.004 g 0.87 1.00 1.13 0.034 0.039 0.044 g1 17.87 18.0 18.13 0.703 0.708 0.713 h1 12.0 0.480 h2 18.6 0.732 h3 19.85 0.781 l 17.9 0.704 l1 14.55 0.572 l2 10.7 11.0 11.2 0.421 0.433 0.441 l3 5.50 0.217 m 2.54 0.100 m1 2.54 0.100 clipwatt19 .com .com .com .com 4 .com u datasheet
8 revision history STA543SA 22/23 cd00061065 8 revision history date revision changes 12-july-2005 1 initial release. 28-july-2005 2 modified figgs 6 and 7. .com .com .com .com 4 .com u datasheet
STA543SA cd00061065 23/23 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com .com .com .com 4 .com u datasheet

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