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[AK4204] rev. 0.1 2012/02 - 1 - general description the AK4204 is an audio stereo cap-less line driver with 1-channel video driver. it eliminates the need for large dc-blocking capacitors with a built-in charge -pump circuit. the AK4204 achieves 2vrms outputs with excellent linearity by single 3.3v power supply. it is well suitable for blu-ray player and set-top box systems. the AK4204 is available in small 16- pin tssop, saving the system space and cost. feature 1. audio line-amp ? single-ended input ? stereo cap-less amplifier (no dc-blocking capacitors required) ? line-out level: 2.0vrms ? thd+n: -90db ? s/n: 102db ? output gain: 6db ? low-pass filter: fc= 130khz ? pop noise free ground-referenced output ? audio mute function 2. video amp ? 1ch stereo cap-less amplifier (no dc-blocking capacitors required) ? integrated video amplifier (+6db) ? input level: 1.5vpp (max) ? sn: 75db(typ), bandwidth: 100khz 6mhz ? lpf: -0.5db@ 6.75mhz (typ), -43db@27mhz (typ) ? video mute function ? power supply: 3.0v ~ 3.6v ? ta: ? 20 85 c ? package: 16pintssop stereo cap-less line-amp and video-amp =preliminary = AK4204
[AK4204] rev. 0.1 2012/02 - 2 - block diagram charge pump linp vdd1 vss1 vdd2 vss2 vee cp cn rinp vin - + + - lout rout clamp lpf + - vout r1 r2 r1 r2 r1 r2 r1 r2 r3 v pdn a pdn sgnd sgnd sgnd r3 figure 1. AK4204 block diagram
[AK4204] rev. 0.1 2012/02 - 3 - ordering guide AK4204et ? 20 +85 c 16 pin tssop (0.65mm pitch) akd4204 evaluation board for AK4204 pin layout 6 5 4 3 2 1 vin vpdn cp cn apdn linp 7 sgnd 8 vdd2 vss2 vout vee vss1 vdd1 lout rout AK4204 top view 11 12 13 14 15 16 10 9 rinp
[AK4204] rev. 0.1 2012/02 - 4 - pin/function no. pin name i/o function 1 vin i video signal input pin 2 vpdn i video block power down pin 3 cn i negative charge pump capacitor terminal pin 4 cp o positive charge pump capacitor terminal pin 5 apdn i audio block power down pin 6 linp i lch audio positive input pin 7 rinp i rch audio positive input pin 8 sgnd i reference voltage input pin for audio signal (0v) 9 rout o audio output pin (r channel) 10 lout o audio output pin (l channel) 11 vdd1 - power supply 1 pin; 3.0v 3.6v connect a 0.1 f ceramic capacitor in parallel with a 10 f 3.3v electrolytic capacitor between this pin and vss1. 12 vss1 - ground 1 pin 13 vee o negative voltage output pin connect to vss1 via a 10 f 3.3v electrolytic capacitor. 14 vout o video signal output pin 15 vss2 - ground 2 pin 16 vdd2 - power supply 2 pin; 3.0v 3.6v connect a 0.1 f ceramic capacitor in parallel with a 10 f 3.3v electrolytic capacitor between this pin and vss2.
[AK4204] rev. 0.1 2012/02 - 5 - absolute maximum ratings (vss1=vss2 = 0v; note 1, note 2 ) parameter symbol min max unit power supply vdd1 vdd2 -0.3 4.0 v input current (any pins except for supplies) iin - 10 ma audio input voltage vina vee-0.3 vdd1 +0.3 v video input voltage vinv -0.3 vdd2+0.3 v ambient operating temperature ta -20 85 c storage temperature tstg -65 150 c note 1. all voltages are respect to ground. note 2. vss1 and vss2 must be co nnected to the same analog plane. note 3. vdd1 and vdd2 must have the same voltage. warning: operation at or beyond these limits may result in permanent damage to the device. normal operation is not guaranteed at these extremes. recommend operating conditions (vss1 = vss2 = 0v) parameter symbol min typ max unit power supply vdd1 vdd2 3.0 3.0 3.3 3.3 3.6 3.6 v v note 3. vdd1 and vdd2 must have the same voltage. note: akm assumes no responsibility for the usage beyond the conditions in this datasheet. electical characteristics (ta=25 c; vdd1= vdd2 = 3.3v; vss1= vss2 = 0v) power supplies parameter min typ max unit power supply (vdd1+vdd2) normal operation ( note 4 ) 18 tbd ma note 4. no input and no load.
[AK4204] rev. 0.1 2012/02 - 6 - analog characteristics (audio) (ta=25 c; vdd1=vdd2= 3.3v; vss1=vss2=0v; input signal frequency =1khz; measurement band width=10hz 20khz; r l =5k , unless otherwise specified) parameter min typ max unit output level ( note 5 ) - 2 - vrms gain - 6 - db thd+n (at 2vrms output, vdd1 3.135v) -90 - db dynamic range (-60dbfs with a-weighted) - 102 db s/n (a-weighted) - 102 db inter channel isolation - 100 db output offset voltage 0 5 mv lpf frequency response -3db - 130 - khz note 5. vdd1= 3.135v, thd+n=-90db. analog characteristics (video) (ta=25 c; vdd1=vdd2= 3.3v; vss1=vss2=0v; unless otherwise specified, note 6 , note 7 ) parameter conditions min typ max unit input signal 1.5 vpp output gain input=0.2vp-p, 100khz - 6 - db output signal f=100khz, thd=-30db. 2.52 vpp response at 6.75mhz - -0.5 - db response at 27mhz - -43 - db frequency response input=0.2vpp, sin wave (0db at 100khz) group delay distortion |gd3mhz gd6mhz| - 10 - nsec s/n bw= 100khz to 6mhz. - 75 db load resistance r1+r2 ( note 8 ) 140 150 - load capacitance c1 ( note 8 ) c2 ( note 8 ) 400 15 pf pf note 6. the analog characteristics are specified at the pin of each output. note 7. input sync tip level=-0.43v -0.14v(the sync chip level based on the pedestal level) horizontal line sync pulse=4.0 s 5.4 s, equalizing pulse=2.0 s 2.7 s, serration pulse=4.0 s 5.4 s note 8. refer to figure 2 . *ccir 567 weighting. figure 2. load resistance r1+r2 and load capacitance c1/c2. vout 75 75 max: 400pf (c1) c1 r1 r2 max: 15pf (c2) c2
[AK4204] rev. 0.1 2012/02 - 7 - operation overview charge pump circuit internal negative power supply circuit ( figure 3 ) supplies the negative voltage to the video amp, and the video amp 0v output is used for a pedestal level ( figure 4 and figure 5 ). therefore, the output coup ling capacitor can be removed. vdd1 charge pump cp cn vss1 vee 10uf 1uf negative power a k4204 (+) c2 c1 (+) figure 3. charge pump circuit note 9. c1 and c2 should be low esr (equivalent series resistance) capacitors. when th ese capacitors are polarized, the positive polarity pins should be connected to the cp or vss1 pin. rout a k4204 ( lout ) 0v 2vrms figure 4. audio signal output vout 7 5 a k4204 0v 75 figure 5. video signal output
[AK4204] rev. 0.1 2012/02 - 8 - audio circuit power-up sequence the audio circuit of the AK4204 is powered-up when the apdn pin becomes ?h?. (note) the charge pump starts operation when the apdn pin or vpdn pin is ?h?. the figure below shows an example of when the vpdn pin becoes ?h? before the apdn pin. vpdn: ?l? ? ?h? (note) power up vee=negative voltage time a (2) (a) (b) lout/rout 3.0v power supply vdd1, vdd2 a udio time r circuit charge pump vee (1) power down vee=0v linp/rinp -1.85v a pdn a udio input signal mute=0v hi-z mute=0v figure 6. system reset diagram (1) when vdd1 and vdd2 are powered-up, audio analog output is connected to vss internally via a mute switch. the charge pump is powered-up in slow start m ode, and the vee voltage reachs -1.85v in 0.4ms. (2) when the vee reachs -1.85v, the audio timer circuit star ts counting the ?timea? period (max. 15ms). if the apdn pin becomes ?h? before the ?timea? period starts (a), the mute switch is released after the ?timea? period and the audio output is enabled. if the apdn pin becomes ?h? afte r the ?timea? period (b), mute is released immediately. (3) no audible click noise occurs by inputting 0v to the linp/rinp pin until th e end of ?timea? period.
[AK4204] rev. 0.1 2012/02 - 9 - video circuit power-up sequence the video circuit of the AK4204 is powered-up when the vpdn pin becomes ?h?. (note) the charge pump starts operation when the vpdn pin or apdn pin is ?h?. the figure below shows an example of when the apdn pin becoes ?h? before the vpdn pin. vout 3.0v power supply vdd1,vdd2 video timer circuit charge pump vee time b power down vee=0v power up vee = negative voltage vin (1) vpdn video circuit power down power up vss2=0v video output signal vss2=0v video input signal apdn: ?l? ?h? (note) (2) figure 7. system reset diagram (1) when the vpdn pin goes to ?h?, the video timer circuit starts counting ?timeb? period (max. 100ms). (2) after the ?timeb? period, the video ou tput becomes ebable exiting 0v state.
[AK4204] rev. 0.1 2012/02 - 10 - system design (tbd) figure 8 shows the system connection diagram for the AK4204. an evaluation board [akd4204] demonstrates the optimum layout, power supply arrangements and measurement results. analog 3.3 v 1 u (1) 10 f AK4204 sgnd linp a pdn cp cn vpdn vin rinp aoutr aoutl vdd1 vss1 vee vout vss2 vdd2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 + + 10 + 0.1 lch out rch out 0.1 10 video out + 0.1u video in 75 75 220 220 audio in l audio in r 1u 1u 220 220 p figure 8. typical connection diagram
[AK4204] rev. 0.1 2012/02 - 11 - 1. grounding and power supply decoupling the AK4204 requires careful attention to power supply and grounding arrangements. vdd1 and vdd2 are usually supplied from the analog supply in the system. if vdd1 and vdd2 are supplied separately, they must be powered-up at the same time. vss1 and vss2 pins must be connected to the analog ground plane. system analog ground and digital ground should be wired separately and connected together as close as possible to where the supplies are brought onto the printed circuit board. decoupling capac itors for high frequency should be pl aced as near as possible to the supply pin. 2. notes for drawing a board analog input and output pins should be as near as possible in order to avoid unwanted coupling into the AK4204. unused pins should be open. 3. analog input 3-1. audio signal input the audio signal inputs are single-ended input. connect a capacitor about 1uf to each input pin for ac coupling. 3-2. video signal input tip sync level is fixed by an internal clamp circuit. connect a capacitor about 0.1uf to the vin pin for ac coupling. 4. analog output 4-1. audio signal output the audio signal outputs are single-ended output. the output rages to 2.0vrms (typ) centered vss (0v, typ) via lpf. the dc offset is less than 5mv. 4-2. video signal output the integrated 1-channel video amplifier ha s drivability for a load resistance of 150 ? . the output gain is +6db (typ) via lpf. dc offset is less than 100mv.
[AK4204] rev. 0.1 2012/02 - 12 - package (tbd) 0-10 detail a seating plane 0.10 0.17 0.05 0.22 0.1 0.65 *5.0 0.1 1.1 (max) a 1 8 9 16 16pin tssop (unit: mm) *4.4 0.1 6.4 0.2 0.5 0.2 0.1 0.1 note: dimension "*" does not include mold flash. 0.13 m package & lead frame material package molding compound: epoxy resign, halogen (br, cl) free lead frame material: cu alloy lead frame surface treatment: solder (pb free) plate
[AK4204] rev. 0.1 2012/02 - 13 - marking 4204et xxxyy 1) pin #1 indication 2) date code: xxxyy (5 digits) xxx: lot# yy: date code 3) marketing code: 4204et important notice z these products and their specifications ar e subject to change without notice. when you consider any use or application of these produc ts, please make inquiries the sales office of asahi kasei microdevices corporation (akm) or authorized distri butors as to current status of the products. z descriptions of external ci rcuits, application circuits, software and ot her related information contained in this document are provided only to illustra te the operation and application exam ples of the semiconductor products. you are fully responsible for the incorporation of these ex ternal circuits, application circuits, software and other related information in the design of your equipments. akm assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. akm a ssumes no liability for infringement of any patent, intellectual property, or other rights in the ap plication or use of such information contained herein. z any export of these products, or devices or systems containi ng them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z akm products are neither intended nor au thorized for use as critical components note1 ) in any safety, life support, or other hazard related device or system note2 ) , and akm assumes no responsibility fo r such use, except for the use approved with the express written consent by representative director of akm. as used here: note1 ) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectivenes s of the device or system containing it, and which must therefore meet ve ry high standards of performance and reliability. note2 ) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nucl ear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z it is the responsibility of the buyer or distributor of akm prod ucts, who distributes, di sposes of, or otherwise places the product with a third party, to notify such third party in advance of the above conten t and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification.

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