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specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 40407 ms pc b8-4907 no.a0789-1/11 LA75501 overview the LA75501 is an adjustment free vif/ sif signal processing ic for pal tv/vcr. it supports 38mhz, 38.9mhz, and 39.5mhz as the if frequencies, as well as pal sound multi- system (m/n,b/g, i, d/k), and contains an on-chip sound carrier trap and sound carrier bpf. to adjust the vco circu it, aft circuit, and sound filte r, 4mhz external crystal or 4mhz external signal is needed. function ? vif block: vif amplifier, pll detector, if agc, rf agc, equalizer, amplifier, buzz canceller, sif trap, digital aft, fll, 4mhz x?tal oscillation ? 1st sif block: 1st sif amplifier, 1st sif detector, 1st sif agc ? sif block: limiter amplifier down converter, pll fm detector sif pll sif vco, sif bpf ? others: if sw (38.9mhz, 38mhz), sif4 syst em sw (b/g, i, d/k, m/n), ifagc 2nd filter specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc 7v v 13 v cc v circuit voltage v 15 v cc v i 24 -1 ma i 14 +0.5 ma i 4 -10 ma circuit current i 3 -3 ma allowable power dissipation pd max ta 50 c 470 mw operating temperature topr -20 to +70 c storage temperature tstg -55 to +150 c ordering number : ena0789 monolithic linear ic for use in tv/vcr applications vif/sif signal processing ic
LA75501 no.a0789-2/11 operating ranges at ta = 25 c parameter symbol conditions ratings unit recommended supply voltage v cc 5.0 v operating supply voltage v cc op 4.5 to 6.0 v electrical characteristics at ta = 25c, v cc = 5v, fp = 38.0mhz vif block ratings parameter symbol conditions min typ max unit circuit current i 17 64.0 73.6 ma maximum rf agc voltage v 14 h 8.5 9 v minimum rf agc voltage v 14 l collector load 30k ? vc2 = 9v 0.3 0.7 v input sensitivity vi 33 39 45 db v agc range gr 58 db maximum allowable input vi max 92 97 db v no-signal video output voltage v 4 3.3 3.6 3.9 v sync. signal tip voltage v 4 tip 1.0 1.3 1.6 v video output amplitude v o 1.7 2.0 2.3 vp-p video s/n s/n b/g 48 52 db c-s best ic-s p/s = 10db 26 32 38 db differential gain dg v in = 0db , 87.5% mod 3 6 % differential phase dp 2 10 deg black noise threshold voltage v bth 0.7 v black noise clamp voltage v bcl 1.8 v vif input resistance r i 2.5 3.0 k ? vif input capacitance c i 3 6 pf maximum aft voltage v 16 h 4.3 4.7 5.0 v minimum aft voltage v 16 l 0 0.2 0.7 v aft tolerance 1 dfa1 f = 38.9mhz 15 25 khz aft tolerance 2 dfa2 f = 38.0mhz 15 25 khz atf detection sensitivity sf r l = 100k//100k ? 30 55 80 mv/khz aft dead zone fda 30 60 mhz aft leak current aftl 4.0 a apc pull-in range (u) fpu 1.5 2.0 mhz apc pull-in range (l) fpl 1.5 2.0 mhz vco maximum variable range (u) dfu 1.5 2.0 mhz vco maximum variable range (l) dfl 1.5 2.0 mhz vco control sensitivity 2.0 4.0 8.0 khz/mv n trap 1 (4.5m) nt1 -30 -35 db n trap 2 (4.8m) nt1-1 -19 -24 db b/g trap 1 (5.5m) bt1 -27 -32 db b/g trap 2 (5.85m) bt1-1 -20 -25 db i trap 1 (6.0m) it1 -25 -30 db i trap 2 (6.55m) it1-1 -15 -20 db d/k trap1 (6.5m) dt1 -25 -30 db group delay 1 ntsc (3.0m) ngd1 30 60 90 ns group delay 1-1 ntsc (3.5m) ngd1-1 160 230 300 ns group delay 2 b/g (4m) bgd2 70 100 130 ns group delay 2-1 b/g (4.4m) bgd2-1 160 230 300 ns group delay 3 i (4m) bgd3 20 50 80 ns group delay 3-1 i (4.4m) bgd3-1 60 90 120 ns group delay 4 d/k (4m) bgd4 0 30 60 ns group delay 4-1 d/k (4.4m) bgd4-1 10 40 70 ns continued on next page.
LA75501 no.a0789-3/11 continued from preceding page. ratings parameter symbol conditions min typ max unit video f-characteristics mn1 vfmn1 m/n 1 to 2mhz -1.0 0.0 1.0 db video f-characteristics mn2 vfmn2 m/n 2 to 3mhz 0.0 1.0 2.0 db video f-characteristics mn3 vfmn 3 m/n 3.58mhz 0.5 2.0 3.5 db video f-characteristics bg1 vfbg1 b/g 1 to 3mhz -1.0 0.0 1.5 db video f-characteristics bg2 vfbg2 b/g 3 to 4mhz 0.0 1.5 3.0 db video f-characteristics bg3 vfbg 3 b/g 4.43mhz 1.0 2.5 4.0 db video f-characteristics i1 vfi1 i 1 to 3mhz -1.0 0.0 1.5 db video f-characteristics i2 vfi2 i 3 to 4mhz 0.0 1.0 2.0 db video f-characteristics i3 vfi3 i 4.43hz 0.5 2.0 3.5 db video f-characteristics dk1 vfdk1 d/k 1 to 3mhz -1.0 0.0 1.5 db video f-characteristics dk2 vfdk2 d/k 3 to 4mhz 0.0 1.0 2.0 db video f-characteristics dk3 vfdk 3 d/k 4.43mhz 0.0 1.5 3.0 db 1st sif block ratings parameter symbol conditions min typ max unit conversion gain v g fp-5.5mhz,vi = 500 v 26 32 36 db sif carrier output level s o vi = 10mv 100 mvrms 1st sif maximum input si max s o 2db 106 db v 1st sif input resistance r i s 2.0 2.4 k ? 1st sif input capacitance c i s 3 6 pf sif block ratings parameter symbol conditions min typ max unit limiting sensitivity vi (lim) 46 52 58 db v fm detector output voltage v o (fm) f = 5.5mhz ? f = 30khz at 400hz 480 600 750 mvrms am rejection ratio amr am = 30% at 400hz 50 60 db distortion thd f = 5.5mhz ? f = 30khz 0.3 1.0 % fm detector output s/n s/n (fm) din. audio 55 60 db bpf 3db band width bw 100 khz pal de-emphasis pdeem fm = 3khz -3 db ntsc de-emphasis ndeem fm = 2khz -3 db pal/nt audio voltage gain difference gd 6 db others ratings parameter symbol conditions min typ max unit minimum 4mhz level (at external input) x 4 min terminal value 80 86 92 db sif system sw threshold voltage v 10 v 11 1.4 v if system sw threshold voltage v 12 270 k ? split/inter sw v 16 0.5 v
LA75501 no.a0789-4/11 system changeover sw/sif system sw the sif system can be changed over by setting a (pin 13) and b (pin 14) to gnd and the open state respectively. a b b/g i d/k m/n fm det level de-emphasis gnd gnd o 6db 75 s gnd open o 0db 50 s open gnd o 0db 50 s open open o 0db 50 s note: ?o? indicates that the system is selected. if system sw the if frequency is selected 38.9mhz mode with the pin 12 (crystal oscillation) open. the if frequency is selected 38mhz mode by adding 220k ? between the pin 12 and gnd. inter carrier sw inter-carrier is selected by setting the 1st sif input (pin 16) to gnd.
LA75501 no.a0789-5/11 1 12 24 13 21.0 3.9 max 0.51min 3.3 0.95 6.4 7.62 0.25 1.78 0.48 0.9 (0.71) (3.25) sanyo : dip24s(300mil) package dimensions unit : mm 3067b pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 sif input fm filter 1 st sif out video det out sif agc filter apc filter fll filter vco coil vco coil system sw (a) system sw (b) 4mhz osc 24 23 22 21 20 19 18 17 16 15 14 13 aft out rf agc out if agc filter 1 st sif input v cc gnd vif input vif input filter control capacitor sif pll filter rf agc vr fm det out LA75501
LA75501 no.a0789-6/11 block diagram and ac charac teristics test circuit input impedance test circuit 1 2 3 4 5 6 7 8 9 10 11 12 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 1k ? 24 23 22 21 20 19 18 17 16 15 14 13 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 0.01 f 10k ? 10k ? 0.01 f 0.01 f 100 f + v cc vif in 1 st sif in LA75501 impedance analyser 1 0.01 f 51 ? 2 3k ? 1 f + 2nd sif in 3 carrier out test oint c 4 2k ? 100k ? video out twst point a sw1 5 0.01 f 6 330 ? 0.47 f + 7 0.1 f + 8 9 10 11 12 system sw b 200k ? pal sw off:38.9mhz on:38mhz 4mhz pll eq amp lpf vco amp sw bpf bpf fm det lim amp deempha 24 23 22 21 20 19 18 17 16 15 14 13 s pll fil cont vif amp 1 st amp rf agc agc if agc trap video det apc det 1 st sif det a aft amp 100k ? 0.1 f 100k ? aft out test point b rf agc out test point e 120k ? 0.01 f 30k ? v cc (9v) 0.02 f (m) 0.01 f 51 ? 1 st sif in 0.01 f 100 f + v cc (5v) 0.01 f 0.01 f 0.01 f 51 ? vif in 0.01 f 1000pf 3k ? 0.01 f a udio out test point d 10k ? -b a b system sw 00 01 10 11 bg idkmn gain 6db 0db 0db 0db
LA75501 no.a0789-7/11 test conditions v1. circuit current [i 17 ] (1) external agc (v 17 = 1.5v) (2) rf agc vr max (3) connect an ammeter to the v cc and measure the incoming current to pin 17. v2. v3. maximum rf agc voltage, minimum rf agc voltage [v 14 h, v 14 l] (1) internal agc (2) input a 38.0mhz, 10mvrms, continuous wave to the vif input pin. (3) adjust the rf agc vr (resistance max. ) and measure the maximum rf agc voltage. (4) adjust the rf agc vr (resistance min. ) and measure the minimum rf agc voltage. (3), (4) measuring point f v4. input sensitivity [vi] (1) internal agc (2) fp = 38.0mhz 400hz 40% am (vif input) (3) turn off the sw1 and put 100k ? through. (4) measure the vif input level at which the 400hz detection output level at test point a becomes 0.7vp-p. v5. agc range [gr] (1) apply the v cc voltage to the external agc, if agc (pin 15). (2) in the same manner under the same conditions as for v4 (input sensitivity), measure the vif input level at which the detection output level becomes 0.7vp-p. vil (3) gr = 20log db *vi: input sensitivity v6. maximum allowable input [vi max] (1) internal agc (2) fp = 38.0mhz 15khz 78% am (vif input) (3) vif input level at which the detection output level at test point a becomes video output (v o ) 1db. v7. no-signal video output voltage [v 4 ] (1) apply the v cc voltage to the external agc, if agc (pin 15). (2) measure the dc voltage of video output (a). v8. sync. signal tip voltage [v 6 tip] (1) internal agc (2) input a 38.0mhz, 10mvrms, continuous wave to the vif input pin. (3) measure the dc voltage of video output (a). v9. video output level [v o ] (1) internal agc (2) fp = 38.0mhz 15khz 78% am vi = 10mvrms (vif input) (3) measure the peak value of the detection output level at test point a. (vp-p) vil vi
LA75501 no.a0789-8/11 v10.v11. black noise threshold and clamp voltage [v bth , v bcl ] (1) apply dc voltage (1 to 3v) to the external agc, if agc (pin 15) and adjust the voltage. (2) fp = 38.0mhz 400hz 40% am 10mvrms (vif input) (3) adjust the if agc (pin 15) voltage to operate the noise canceller. measure the v bth , v bcl at test point a. v12. video s/n [s/n] (1) internal agc (2) fp = 38.0mhz cw = 10mvrms (vif input) (3) measure the noise voltage at test point a in rm s volts through a hpf: 100khz, lpf: 5mhz filter. noise voltage (n) (4) s/n = 20log = 20log (db) v13. c/s beat [ics] (1) internal agc. (2) fp = 38.0mhz apl50% 87.5% modulation video signal. (3) measure the difference between the levels for 4.43mhz and 1.07mhz components at test point a. v14.v15. differential gain, differential phase [dg, dp] (1) internal agc (2) fp = 38.0mhz apl50% 87.5% modulation video signal vi = 10mvrms (3) measure the dg and dp at test point a. video voltage (vp-p) n (vrms) 1.3vp-p n(vrms)
LA75501 no.a0789-9/11 v16. v17.v18 maximum, minimum aft voltage [v 13 h, v 13 l] (1) internal agc (2) fp = 38.0mhz 1.5mhz vi = 10mvrms (vif input) (3) measure maximum and minimum aft output voltage by changing the input frequency. (4) maximum voltage: v 13 h, minimum voltage: v 13 l. v19.v20.v21. aft detector sens itivity, aft dead zone, a ft tolerance [dfa, sf, fda] (1) measure the frequency deviation when the voltage at the measuring point b changes from v1 to v2. ? f sf (mv/khz) = (2) measure the width in which the voltage at the measuring point b does not change. (3) calculate as follows: fda (khz) = f2 ? f1 (4) calculate as follows: if center frequency: 38.9mhz, 38mhz dfa (khz) = fc ? v23. v24. vif input resist ance, input capacitance [r i , c i ] (1) external agc (v 15 = 2v) (2) referring to the input impedance test circuit, measure r i and c i with an impedance analyzer. v25.v26. apc pull-in range [fpu, fpl] (1) internal agc (2) fp = 33mhz to 44mhz cw;10mvrms (3) adjust the sg signal frequency to be higher than fp = 38.0mhz to bring the pll to unlocked state. note; the pll is taken as in unlocked state when a beat signal appears at test point a. (4) when the sg signal frequency is lowered, the pll is brought to locked state again. f1 (5) lower the sg signal frequency to bring the pll to unlock state. (6) when the sg signal frequency is raised, the pl l is brought to locked state again. f2 (7) calculate as follows: fpu = f1 ? 38.0mhz fpl = f2 ? 38.0mhz v27.v28. vco maximum variable range (u, l) [dfu, dfl] (1) apply the v cc voltage to the external agc, if agc (pin 15). (2) fl is taken as the frequency when 1v is app lied to the apc pin (pin 7). in the same manner, fu is taken as the frequency when 5v is applied to the apc pin (pin 7). dpu = fu ? 38.0mhz dfl = fl ? 38.0mhz v1 ? v2 ? f f1 + f2 2 v 13 h v 13 l v1 ; 4.0v v2 ; 3.0v f1 f2 aft output (v) if frequency (mhz) fda ; aft dead zone
LA75501 no.a0789-10/11 v29. vco control sensitivity [ ] (1) apply the v cc voltage to the external agc, if agc (pin 15). (2) apply the 3v to the external fll, fll (pin 10). (3) pick up the vco oscillation frequency from the video output (a), gnd, etc. and adjust the vco coil so that the frequency becomes 38.0mhz. (4) f1 is taken as the frequency when 2.8v is applied to the apc pin (pin 7). in the same manner, f2 is taken as the frequency when 3.2v is applied to the apc pin (pin 7). = f2 ? (khz/mv) f1. 1st sif conversion gain [v g ] (1) internal agc (2) fp = 38.0mhz cw;10mv (vif input) fs = 32.5mhz cw;500 v (1st sif input) v1 (3) measure the detection output level at test point c (5.5mhz) v2 (4) v g = 20log db f2. 5.5mhz output level [s o ] (1) internal agc (2) fp = 38.0mhz cw; 10mv (vif input) fs = 32.5mhz cw; 10mv (1st sif input) v1 (3) measure the detection output le vel at test point c (5.5mhz). s o (mvrms) f3. 1st maximum input [si max] (1) internal agc (2) fp = 38.0mhz cw; 10mv (vif input) fs = 32.5mhz cw; variable (1st sif input) (3) input level at which the detection output (5.5mhz) at test point c becomes s o 2db. si max f4.f5. 1st sif input resistance, input capacitance [r i (sif1), c i (sif1)] (1) referring to the input impedance test circuit, measure r i and c i with an impedance analyzer. s1. sif limiting sensitivity [v i (lim)] (1) apply the v cc voltage to the external agc, if agc (pin 15). (2) fs = 5.5mhz fm = 400hz ? f = 300khz (sif input) (3) set the sif input level to 31.6mvrms and measure the level at test point d. v1 (4) lower the sif input level and measure the input level which becomes v1. 3db. s2.s4. fm detection output voltage, total harmonics distortion [v o (fm), thd] (1) apply the v cc voltage to the external agc, if agc (pin 15). (2) fs = 5.5mhz fm = 400hz ? f = 30khz (sif input vi = 31.6mvrms) (3) measure the fm detection output voltage, total harmonics distortion at test point d. s3. am rejection ratio [amr] (1) external agc (v 15 =v cc ) (2) fs = 5.5mhz fm = 400hz am = 30% (sif input vi = 31.6mvrms) (3) measure the output level at test point d. vam (4) amr = 20log db s5. sif s/n [s/n (fm)] (1) external agc (v 15 = v cc ) (2) fs = 5.5mhz no mod vi = 31.6mvrms (3) measure the output leve l at test point d. vn (4) s/n = 20log db v2 v1 f1 ? f2 400 v o (det) vam v o (det) vn
LA75501 ps no.a0789-11/11 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. s6. pal/nt audio voltage gain difference [gd] (1) external agc (v 15 =v cc ) (2) fs = 4.5mhz fm = 400hz ? f = 30khz (sif input vi = 31.6mvrms) (3) set system switches [a (pin 10) and b (pin 11)] to gnd. (4) measure the fm det ector output voltage at test point d. vnt (5) calculate as follows: gd (db) = vnt ? v o (fm) s7.s8. pal, nt de-emphasis [pdeem, ndeem] (1) external agc (v 15 = v cc ) (2) fs = 5.5mhz fm = 3khz ? f = 30khz (sif input vi = 31.6mvrms) (3) open system switches (a (pin 10) and b (pin 11)). (bg mode) (4) measure the fm det ector output voltage at test point d. vp (5) calculate as follows: pdeem (db) = vp ? v o (fm) (6) fs = 4.5mhz fm = 2khz ? f = 30khz (sif input vi = 31.6mvrms) (7) set system switches [a (pin 10) and b (pin 11)] to gnd. (nt mode) (8) measure the fm det ector output voltage at test point d. vp (9) calculate as follows: ndeem (db) = vnt ? v o (fm) this catalog provides information as of april, 2007. specifications and information herein are subject to change without notice.

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