View MAX260BENG_5471414.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the max260/max261/max262 cmos dual second- order universal switched-capacitor active filters allow microprocessor control of precise filter functions. no external components are required for a variety of band- pass, lowpass, highpass, notch, and allpass configura- tions. each device contains two second-order filter sections that place center frequency, q, and filter oper- ating mode under programmed control. an input clock, along with a 6-bit f 0 program input, determine the filter's center or corner frequency without affecting other filter parameters. the filter q is also pro- grammed independently. separate clock inputs for each filter section operate with either a crystal, rc net- work, or external clock generator. the max260 has offset and dc specifications superior to the max261 and max262 and a center frequency (f 0 ) range of 7.5khz. the max261 handles center fre- quencies to 57khz, while the max262 extends the cen- ter frequency range to 140khz by employing lower clock-to-f 0 ratios. all devices are available in 24-pin dip and small outline packages in commercial, extended, and military temperature ranges. applications ?-tuned filters anti-aliasing filters digital signal processing adaptive filters signal analysis phase-locked loops features filter design software available microprocessor interface 64-step center frequency control 128-step q control independent q and f 0 programming guaranteed clock to f 0 ratio-1% (a grade) 75khz f 0 range (max262) single +5v and 5v operation max260/max261/max262 microprocessor programmable universal active filters ________________________________________________________________ maxim integrated products 1 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 lp a in b lp b bp b n.c. hp a n.c. bp a top view d0 osc out gnd v - clk out a3 d1 in a 16 15 14 13 9 10 11 12 wr a0 hp b a1 clk b clk a a2 v + max260 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 lp a in b lp b bp b op in hp a op out bp a hp b d0 osc out v - clk out a3 d1 in a 16 15 14 13 9 10 11 12 wr gnd a0 a1 clk b clk a a2 v + max261 max262 pin configurations ordering information output bp hp lp in bp hp lp in input +5v v + gnd -5v v - clk a osc clkout clk b program inputs crystal fourth-order bandpass filter max260 max261 max262 filter a filter b functional diagram 19-0352; rev 2; 7/02 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range package a c c u r a c y max260 acng 0? to +70? plastic dip 1% max260bcng 0? to +70? plastic dip 2% max260aeng -40? to +85? plastic dip 1% MAX260BENG -40? to +85? plastic dip 2% max260acwg 0? to +70? wide so 1% max260bcwg 0? to +70? wide so 2% max260amrg -55? to +125? cerdip 1% max260bmrg -55? to +125? cerdip 2% * all devices?4-pin packages 0.3in-wide packages ordering information continued at end of data sheet.
max260/max261/max262 microprocessor programmable universal active filters 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. total supply voltage (v + to v - ) .............................................15v input voltage, any pin ..........................(v - - 0.3v) to (v + + 0.3v) input current, any pin ......................................................?0ma power dissipation plastic dip (derate 8.33mw/? above 70?) ...............660mw cerdip (derate 12.5mw/? above 70?) .................1000mw wide so (derate 11.8mw/? above 70?) ..................944mw operating temperature ranges max260/max261/max262xcxg .......................0? to +70? max260/max261/max262xexg .....................-40? to +85? max260/max261/max262xmxg ..................-55? to +125? storage temperature range .............................-65? to +160? lead temperature (soldering, 10s) ................................+300? electrical characteristics (v + = +5v, v - = -5v, clk a = clk b = ?v 350khz for the max260 and 1.5mhz for the max261/max262, f clk /f 0 = 199.49 for max260/max261 and 139.80 for max262, filter mode 1, t a = +25?, unless otherwise noted.) parameter conditions min typ max units f 0 center frequency range see table 1 maximum clock frequency see table 1 max260a 0.2 1.0 max260b 0.2 2.0 max261/max262a 0.2 1.0 f clk /f 0 ratio error (note 1) t a = t min to t max max261/max262b 0.2 2.0 % f 0 temperature coefficient -5 ppm/ c q = 8 max260a 1 6 q = 8 max260b 1 10 q = 32 max260a 2 10 q = 32 max260b 2 15 q = 64 max260a 4 20 q = 64 max260b 4 25 q = 8 max261/max262a 1 6 q = 8 max261/max262b 1 10 q = 32 max261/max262a 2 10 q = 32 max261/max262b 2 15 q = 64 max261/max262a 4 20 q accuracy (deviation from ideal continuous filter) (note 2) t a = t min to t max q = 64 max261/max262b 4 25 % q temperature coefficient 20 ppm/ c max260 0.1 0.3 dc lowpass gain accuracy max261/max262 0.1 0.5 db max260 -5 max261/max262 -5 gain temperature coefficient lowpass (at d.c.) bandpass (at f 0 ) max260/max261/max262 +20 ppm/ c
max260/max261/max262 microprocessor programmable universal active filters _______________________________________________________________________________________ 3 electrical characteristics (continued) (v + = +5v, v - = -5v, clk a = clk b = 5v 350khz for the max260 and 1.5mhz for the max261/max262, f clk /f 0 = 199.49 for max260/max261 and 139.80 for max262, filter mode 1, t a = +25 c, unless otherwise noted.) parameter conditions min typ max units max260a 0.05 0.25 max260b 0.15 0.45 max261a 0.40 1.00 max261b 0.80 1.60 max262a 0.40 1.20 t a = t min to t max , q = 4 mode 1 max262b 0.80 1.60 max260a 0.075 0.30 max260b 0.075 0.50 max261a 0.50 1.10 max261b 0.90 1.60 max262a 0.50 1.30 offset voltage at filter outputs lp, bp, hp (note 3) mode 3 max262b 0.90 1.60 v offset voltage temperature coefficient f clk /f 0 = 100.53, q = 4 t a = t min to t max 0.75 mv/ c clock feedthrough 4 mv crosstalk -70 db q = 1, 2nd-order, lp/bp see typ. oper. char. 4th-order lp (figure 26) 90 wideband noise 4th-order bp (figure 24) (note 4) 100 v rms harmonic distortion at f 0 q = 4, v in = 1.5v p-p -67 db supply voltage range t a = t min to t max 2.37 5 6.3 v max260 15 20 max261 16 20 power supply current (note 5) t a = t min to t max cmos level logic inputs max262 16 20 ma shutdown supply current q0 a - q6 a = all 0, cmos level logic inputs (note 5) 1.5 ma internal amplifiers output signal swing t a = t min to t max , 10k ? load (note 6) 4.75 v source 50 output signal circuit current sink 2 ma power supply rejection ratio 0hz to 10khz -70 db gain bandwidth product 2.5 mhz slew rate 6v/ s
max260/max261/max262 microprocessor programmable universal active filters 4 _______________________________________________________________________________________ electrical characteristics (for v = 2.5v 5%) (v + = +2.37v, v - = -2.37v, clk a = clk b = 2.5v 250khz for the max260 and 1mhz for the max261/max262, f clk /f 0 = 199.49 for max260/max261 and 139.80 for max262, filter mode 1, t a = +25 c, unless otherwise noted.) parameter conditions min typ max units f 0 center frequency range (note 7) maximum clock frequency (note 7) max26xa 0.1 1 f clk /f 0 ratio error (notes 1, 8) q = 8 max26xb 0.1 2 % max260a 2 6 q = 8 f clk /f 0 = 199.49 max260b 2 10 max261a 2 6 f clk /f 0 = 199.49 max261b 2 10 max262a 2 6 q accuracy (deviation from ideal continuous filter) (notes 2, 8) f clk /f 0 = 139.80 max262b 2 10 % output signal swing all outputs (note 6) 2 v power supply current cmos level logic inputs (note 5) 7 ma shutdown current cmos level logic inputs (note 5) 0.35 ma note 1: f clk /f 0 accuracy is tested at 199.49 on the max260/max261, and at 139.8 on the max262. note 2: q accuracy tested at q = 8, 32, and 64. q of 32 and 64 tested at 1/2 stated clock frequency. note 3: the offset voltage is specified for the entire filter. offset is virtually independent of q and f clk /f 0 ratio setting. the test clock frequency for mode 3 is 175khz for the max260 and 750khz for the max261/max262. note 4: output noise is measured with an rc output smoothing filter at 4 ? f 0 to remove clock feedthrough. note 5: ttl logic levels are: high = 2.4v, low = 0.8v. cmos logic levels are: high = 5v, low = 0v. power supply current is typi- cally 4ma higher with ttl logic and clock input levels. note 6: on the max260 only, the hp output signal swing is typically 0.75v less than the lp or bp outputs. note 7: at 2.5v supplies, the f 0 range and maximum clock frequency are typically 75% of values listed in table 1. note 8: f clk /f 0 and q accuracy are a function of the accuracy of internal capacitor ratios. no increase in error is expected at 2.5v as compared to 5v; however, these parameters are only tested to the extent indicated by the min or max limits. interface specifications (note 9) (v + = +5v, v + = -5v, t a = +25 c, unless otherwise noted.) parameter symbol conditions min typ max units wr pulse width t wr 250 150 ns address setup t as 25 ns address hold t ah 0ns data setup t ds 100 50 ns data hold t dh 10 0 ns logic input high v ih wr , d0, d1, a0 a3, clk a , clk b t a =t min to t max 2.4 v logic input low v il wr , d0, d1, a0 a3, clk a , clk b t a =t min to t max 0.8 v 10 60 input leakage current i in wr , d0, d1, a0 a3, clk b clk a t a =t min to t max 6a input capacitance c in wr , d0, d1, a0 a3, clk a , clk b 15 pf note 9: interface timing specifications are guaranteed by design and are not subject to test.
max260/max261/max262 microprocessor programmable universal active filters _______________________________________________________________________________________ 5 pin description pin max260 max261/ max262 name function 99v + positive supply voltage 17 16 v - negative supply voltage 18 17 gnd analog ground. connect to the system ground for dual supply operation or mid-supply for single sup- ply operation. gnd should be well bypassed in single supply applications. 11 11 clk a input to the oscillator and clock input to section a. this clock is internally divided by 2. 12 12 clk b clock input to filter b. this clock is internally divided by 2. 8 8 clk out c l ock outp ut for cr ystal and r- c osci l l ator op er ati on 19 18 osc out connects to crystal or r-c for self-clocked operation pin max260 max261/ max262 name function 5, 23 5, 23 in a , in b filter inputs 1, 21 1, 21 bp a , bp b bandpass outputs 24, 22 24, 22 lp a , lp b lowpass outputs 3, 14 3, 20 hp a , hp b highpass/notch/allpass outputs 16 15 wr write enable input 15, 13, 10, 7 14, 13, 10, 7 a0, a1, a2, a3 address inputs for f 0 and q input data locations 20, 6 19, 6 d0, d1 data inputs for f 0 and q programming 2 op out outp ut of uncom m i tted op am p on m ax 261/ m ax 262 onl y. p i n 2 i s a no- connect on the m ax 260. 4 op in inver ti ng i np ut of uncom - m i tted op am p on m ax 261/ m ax 262 onl y ( noni nver ti ng i np ut i s i nter nal l y connected to g r ound ) . p i n 4 i s a no- connect on the m ax 260.
max260/max261/max262 microprocessor programmable universal active filters 6 _______________________________________________________________________________________ typical operating characteristics (t a = +25 c, unless otherwise noted.) -20 -10 10 0 20 30 0.2 0.6 0.4 0.8 1.0 1.2 1.4 q error vs. clock frequency max260 max260/61/62 toc01 clock frequency (mhz) q error (%) mode 4 5v 25 c q = 8 f clk /f 0 n = 0 modes 2 & 3 mode 1 5 10 15 20 25 i dd vs. power supply voltage max260/61/62 toc02 v+ to v- (v) i dd (ma) 589 6 7 10 11 12 clk freq = 500khz 25 c control pins (5v, 0v) clocks (5v, 0v) clocks (5v, -5v) 13 15 14 17 16 19 18 20 0.5 1.5 2.5 3.5 i dd vs. clock frequency max260/61/62 toc03 clock frequency (mhz) i dd (ma) clock (2.4v, 0.8v) clock (5v, 0v) 5v control pins (5v, 0v) 25 c clock (5v, -5v) -4 0 4 8 12 16 20 0.5 1.5 1.0 2.0 2.5 3.0 3.5 q error vs. clock frequency max261/max262 max260/61/62 toc04 clock frequency (mhz) q error (%) mode 3 mode 2 modes 1, 4 5v q = 8 t a = 25 c n = 0 f clk f 0 -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 1.0 1.5 2.0 2.5 3.0 3.5 f clk /f 0 error vs. clock frequency max261/max262 max260/61/62 toc05 clock frequency (mhz) f clk /f 0 error (%) modes 2, 3 modes 1, 4 5v q = 8 t a = 25 c f clk f 0 n = 0 0 2 1 4 3 7 6 5 8 0.2 1.0 0.6 1.4 1.8 2.2 2.8 3.0 output signal swing vs. clock frequency max260/61/62 toc06 clock frequency (mhz) peak to peak, output swing (v) max261/max262 all modes max260 mode 4 5v 25 c q = 8 f clk /f 0 n = 0 max260 modes 1, 2, 3 q = 1 q = 8 q = 64 mode lp bp hp/ap/n lp bp hp/ap/n lp bp hp/ap/n 1 -84 -90 -84 -80 -82 -85 -72 -73 -85 2 -88 -90 -88 -84 -82 -84 -77 -73 -76 3 -84 -90 -88 -80 -82 -82 -73 -73 -74 max261/ max262 4 -83 -89 -84 -79 -81 -85 -71 -73 -85 1 -87 -89 -86 -81 -81 -86 -73 -73 -86 2 -89 -88 -85 -83 -80 -82 -75 -72 -74 3 -87 -88 -85 -80 -82 -80 -71 -72 -72 max260 4 -87 -88 -86 -81 -81 -86 -71 -72 -86 measurement bandwidth q = 1 q = 8 q = 64 wideband -84 -80 -72 3khz -87 -87 -86 c message weighted -93 -93 -93 wideband rms noise (db ref. to 2.47v rms , 7v p-p ) 5v supplies note 1: f clk = 1mhz for max261/max262, f clk = 350khz for max260 note 2: f clk /f 0 ratio programmed at n = 63 (see table 2) note 3: clock feedthrough is removed with an rc lowpass ar 4f 0 , ie., r = 3.9k ? , c = 2000pf for max261. noise spectral distribution (max261, f clk = 1mhz, db ref. to 2.47v rms , 7v p-p )
max260/max261/max262 microprocessor programmable universal active filters _______________________________________________________________________________________ 7 introduction each max260/max261/max262 contains two second- order switched-capacitor active filters. figure 1 shows the filter's state variable topology, employed with two cascaded integrators and one summing amplifier. the max261 and max262 also contain an uncommitted amplifier. on-chip switches and capacitors provide feedback to-control each filter section's f 0 and q. internal capacitor ratios are primarily responsible for the accuracy of these parameters. although these switched-capacitor networks (scn) are in fact sampled systems, their behavior very closely matches that of continuous filters, such as rc active filters. the ratio of the clock frequency to the filter center frequency (f clk /f 0 ) is kept large so that ideal second-order state- variable response is maintained. the max262 uses a lower range of sampling (f clk /f 0 ) ratios than the max260 or max261 to allow higher operating f 0 frequencies and signal bandwidths. these reduced sample rates result in somewhat more devia- tion from ideal continuous filter parameters than with the max260/max261. however, these differences can be compensated using figure 20 (see application hints ) or maxim's filter design software. the max260 employs auto-zero circuitry not included in the max261 or max262. this provides improved dc characteristics, and improved low-frequency perform- ance at the expense of high-end f 0 and signal band- width. the n/hp/ap outputs of the max260 are internal- ly sample-and-held as a result of its auto-zero operation. signal swing at this output is somewhat reduced as a result (max260 only). see table 1 for bandwidth comparisons of the three filters. maxim also provides design programs that aid in con- verting filter response specifications into the f 0 and q program codes used by the max260 series devices. this software also precompensates f 0 and q when low sample rates are used. it is important to note that, in all max260 series filters, the filter's internal sample rate is one half the input clock rate (clk a or clk b ) due to an internal division by two. all clock-related data, tables, and other dis- cussions in this data sheet refer to the frequency at the clk a or clk b input, i.e., twice the internal sample rate, unless specifically stated otherwise. quick look design procedure the max260, max261, and max262, with maxim's filter design software, greatly simplify the design procedures for many active filters. most designs can be realized using a three-step process described in this section. if the design software is not used, or if the filter complexi- ty is beyond the scope of this section, refer to the remainder of this data sheet for more detailed applica- tions and design information. m1 m0 s2 scn in s3 s1 mode select scn q0?6 (table 3) f0?5 (table 2) s1 sample-hold max260 only n/hp/ap bp lp s2 s3 + - - scn = switch-capacitor network + - scn scn s-h figure 1. filter block diagram (one second-order section)
max260/max261/max262 microprocessor programmable universal active filters 8 _______________________________________________________________________________________ step 1?ilter design start with the program pz to determine what type of filter is needed. this helps determine the type (butterworth, chebyshev, etc.) and the number of poles for the optimum choice. the program also plots the fre- quency response and calculates the pole/zero (f 0 ) and q values for each second-order section. each max260/max261/max262 contains two second-order sections, and devices can be cascaded for higher order filters. max260 max261* max262* in a out in 5 24 3 1 23 22 (20)14 21 lp a hp a bp a lp b hp b bp b in b wr d0 d1 a0 a2 a3 clk a clk b a1 16(15) 20(19) 6 1 2 3 4 5 6 7 11 24 25 23 22 21 20 19 18 db-25 male plug (back view) 12 15(14) 10 7 11 12 9 18(17) 17(16) clk in ttl (see figure 4) 0.1 f 0.1 f -5v +5v 13 v + v - gnd *pin numbers in ( ) are for max261/max262 100 ab$ = "filter a" : gosub 150 : rem get data for section a 110 add = 0 : gosub 220 : rem write data to the printer port 120 ab$ = "filter b" : gosub 150 : rem get data for b 130 add = 32 : gosub 220 : rem write data to printer port 140 goto 100 150 print "mode (1 to 4, see table 5) "; ab$; : input m 160 if m<1 or m>4 then goto 150 170 print "clock ratio (0 to 63, n of table 2) "; ab$; : input f 180 if f<0 or f>63 then goto 170 190 print "q (0 to 127, n of table 3) "; ab$; : input q 200 if q<0 or q>127 then goto 190 else : print 210 return 220 lprint chr$(add+m-1); : add = add+4 230 for i = 1 to 3 240 x = (add + (f - 4*int(f/4))) : lprint chr$(x); 250 f=int(f/4) : add = add + 4 260 next i 270 for i = 1 to 4 280 x=(add + (q - 4*int(q/4))) : lprint chr$(x); 290 q=i (q/4) :: add = add + 4 300 next i 310 return figure 2. basic program and hardware connections to parallel printer port for ?uick look?using a pc
max260/max261/max262 microprocessor programmable universal active filters _______________________________________________________________________________________ 9 step 2?enerate programming coefficients starting with the f 0 and q values obtained in step 1, use the program mpp to generate the digital coefficients that program each second-order section's f 0 and q. the program displays values for n ( n = _ for f 0 and n = _ for q ). n is the decimal equivalent of the binary code that sets the filter section s f 0 or q. these are the same n s that are listed in tables 2 and 3. an input clock frequency and filter mode must also be selected in this step; however, if a specific-clock rate is not selected, gen picks one. with regard to mode selection, mode 1 is the most convenient choice for most bandpass and lowpass filters. exceptions are elliptic bandpass and lowpass filters, which require mode 3. highpass filters also use mode 3, while allpass filters use mode 4. for further information regarding these filter modes, see the filter operating modes sec- tion. step 3?oading the filter when the n values for the f 0 and q of each second- order filter section are determined, the filter can then be programmed and operated. what follows is a con- venient method of programming the filter and evalu- ating a design if a pc is available. a short basic program loads data into the max260/ max261/max262 through the pc's parallel printer port. the program asks for the filter mode, as well as the n values for the f 0 and q of each section. these coeffi- cients are then loaded into the filter in the form of ascii characters. this program can be used with or without maxim's other filter design software. the program and the appropriate hardware connections for a centronics- type printer port are shown in figure 2. filter design software maxim provides software programs to help speed the transition from frequency response design require- ments to working hardware. a series of programs are available, including: program pz. given the requirements, such as center frequency, q, passband ripple, and stopband attenua- tion, pz calculates the pole frequencies, q's, zeros, and the number of stages needed. program mpp. for programmed filters, mpp computes the input codes to use and describes the expected performance of the design. program fr. when a design of one or more stages is completed, fr checks the final cascaded assembly. the output frequency response can be compared with that expected from pz. program pr.bas allows a max260/max261/max262 to be programmed through a personal computer. the mode, f 0 , and q of each section are typed in, and the proper codes are sent to the filter through the comput- er s parallel printer port. this program is also provided in figure 2. other design programs are also included for use with other maxim filter products. other filter products maxim has developed a number of other filter products in addition to the max260, max261, and max262. pin-programmable active filters a dual sec- ond-order universal filter that needs no external compo- nents. a microprocessor interface is not required. max263 0.4hz to 30khz f 0 range max264 1hz to 75khz f 0 range resistor and pin-programmable filters a dual second-order universal filter where f 0 adjustment beyond pin-programmable resolution employs external resistors. max265 0.4hz to 30khz f 0 range. includes two uncommitted op amps. max266 1hz to 75khz f 0 range. includes two un- committed op amps. mf10 industry standard, resistor programmed only pin-programmable bandpass filters a dual second-order bandpass that needs no external components. a microprocessor interface is not required. max267 0.4hz to 30khz f 0 range max268 1hz to 75khz f 0 range programmable anti-alias filter a program- mable dual second-order continuous (not switched) lowpass filter. no clock noise is generated. designed for use as an anti-alias filter in front of, or as a smooth- ing filter following, any sampled filter or system. max270 1khz to 25khz cutoff frequency range 5th-order low pass filter features zero offset and drift errors for designs requiring high dc accuracy. max280, lt1062 0.1hz to 20khz cutoff frequency range
max260/max261/max262 microprocessor programmable universal active filters 10 ______________________________________________________________________________________ part q mode f clk f 0 1 1 1hz 400khz 0.01hz 4.0khz 1 2 1hz 425khz 0.01hz 6.0khz 1 3 1hz 500khz 0.01hz 5.0khz 1 4 1hz 400khz 0.01hz 4.0khz 8 1 1hz 500khz 0.01hz 5.0khz 8 2 1hz 700khz 0.01hz 10.0kh 8 3 1hz 700khz 0.01hz 5.0khz 8 4 1hz 600khz 0.01hz 4.0khz 64 1 1hz 750khz 0.01hz 7.5khz 90 2 1hz 500khz 0.01hz 7.0khz 64 3 1hz 400khz 0.01hz 4.0khz max260 64 4 1hz 750khz 0.01hz 7.5khz 1 1 40hz 4.0mhz 0.4hz 40khz 1 2 40hz 4.0mhz 0.5hz 57khz 1 3 40hz 4.0mhz 0.4hz 40khz 1 4 40hz 4.0mhz 0.4hz 40khz 8 1 40hz 2.7mhz 0.4hz 27khz 8 2 40hz 2.1mhz 0.5hz 30khz max261 part q mode f clk f 0 8 3 40hz 1.7mhz 0.4hz 17khz 8 4 40hz 2.7mhz 0.4hz 27khz 64 1 40hz 2.0mhz 0.4hz 20khz 90 2 40hz 1.2mhz 0.4hz 18khz 64 3 40hz 1.2mhz 0.4hz 12khz max261 64 4 40hz 2.0mhz 0.4hz 20khz 1 1 40hz 4.0mhz 1.0hz 100khz 1 2 40hz 4.0mhz 1.4hz 140khz 1 3 40hz 4.0mhz 1.0hz 100khz 1 4 40hz 4.0mhz 1.0hz 100khz 8 1 40hz 2.5mhz 1.0hz 60khz 6 2 40hz 1.4mhz 1.4hz 50khz 8 3 40hz 1.4mhz 1.0hz 35khz 8 4 40hz 2.5mhz 1.0hz 60khz 64 1 40hz 1.5mhz 1.0hz 37khz 90 2 40hz 0.9mhz 1.4hz 32khz 64 3 40hz 0.9mhz 1.0hz 22khz max262 64 4 40hz 1.5mhz 1.0hz 37khz table 1. typical clock and center frequency limits in a lp a n/hp/ap a bp a 2 6 7 2 4 a0 a3 wr clk a clk b osc out clk out op out op in d0, d1 mode a program memory mode, f 0 , q interface logic 2 f 0 15 qck in b lp b n/hp/ap b bp b 2 6 7 mode b program memory mode, f 0 , q 2 f 0 v + 15 qck v - gnd + - max261/max262 only ? ? figure 3. max260/max261/max262 block diagram
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 11 f clk /f 0 ratio max260/max261 max262 program code modes 1,3,4 mode 2 modes 1,3,4 mode 2 n f5 f4 f3 f2 f1 f0 100.53 71.09 40.84 28.88 0000000 102.10 72.20 42.41 29.99 1000001 103.67 73.31 43.98 31.10 2000010 105.24 74.42 45.55 32.21 3000011 106.81 75.53 47.12 33.32 4000100 108.38 76.64 48.69 34.43 5000101 109.96 77.75 50.27 35.54 6000110 111.53 78.86 51.84 36.65 7000111 113.10 79.97 53.41 37.76 8001000 114.67 81.08 54.98 38.87 9001001 116.24 82.19 56.55 39.99 10 001010 117.81 83.30 58.12 41.10 11 001011 119.38 84.42 59.69 42.21 12 001100 120.95 85.53 61.26 43.32 13 001101 122.52 86.64 62.83 44.43 14 001110 124.09 87.75 64.40 45.54 15 001111 125.66 88.86 65.97 46.65 16 010000 127.23 89.97 67.54 47.76 17 010001 128.81 91.80 69.12 48.87 18 010010 130.38 92.19 70.69 49.98 19 010011 131.95 93.30 72.26 51.10 20 010100 133.52 94.41 73.83 52.20 21 010101 135.08 95.52 75.40 53.31 22 010110 136.66 96.63 76.97 54.43 23 010111 138.23 97.74 78.53 55.54 24 011000 139.80 98.86 80.11 56.65 25 011001 141.37 99.97 81.68 57.76 26 011010 142.94 101.08 83.25 58.87 27 011011 14.4.51 102.89 84.82 59.98 28 011100 146.08 103.30 86.39 61.09 29 011101 147.65 104.41 87.96 62.20 30 011110 149.23 105.52 89.54 63.31 31 011111 150.80 106.63 91.11 64.42 32 100000 152.37 107.74 92.68 65.53 33 100001 153.98 108.85 94.25 66.64 34 100010 155.51 109.96 95.82 67.75 35 100011 157.08 111.07 97.39 68.86 36 100100 158.65 112.18 98.96 69.98 37 100101 160.22 113.29 100.53 71.09 38 100110 161.79 114.41 102.10 72.20 39 100111 163.36 115.52 102.67 73.31 40 101000 164.93 116.63 105.24 74.42 41 101001 166.50 117.74 106.81 75.53 42 101010 168.08 118.85 108.38 76.64 43 101011 169.65 119.96 109.96 77.75 44 101100 171.22 121.07 111.53 78.86 45 101101 table 2. f clk /f 0 program selection table
max260/max261/max262 microprocessor programmable universal active filters 12 ______________________________________________________________________________________ detailed description f 0 and q programming figure 3 shows a block diagram of the max260. each second-order filter section has its own clock input and independent f 0 and q control. the actual center fre- quency is a function of the filter's clock rate, 6-bit f 0 control word (see table 2), and operating mode. the q of each section is also set by a separate programmed input (see table 3). this way, each half of a max260/ max261/max262 is tuned independently so that com- plex filter polynomials can be realized. equations that convert program code numbers to f clk /f 0 and q values are listed in the notes beneath tables 2 and 3. oscillator and clock inputs the clock circuitry of the max260/max261/max262 can operate with a crystal, resistor-capacitor (rc) net- work, or an external clock generator as shown in figure 4. if an rc oscillator is used, the clock rate, f clk , nomi- nally equals 0.45/rc. the duty cycle of the clock at clk a and clk b is unim- portant because the input is internally divided by 2 to generate the sampling clock for each filter section. it is important to note that this internal division also halves the sample rate when considering aliasing and other sampled system phenomenon. microprocessor interface f 0 , q, and mode-selection data are stored in internal program memory. the memory contents are updated by writing to addresses selected by a0 a3. d0, and d1 are the data inputs. a map of the memory locations is shown in table 4. data is stored in the selected address on the rising edge of wr . address and data inputs are ttl and cmos compatible when the filter is powered from 5v. with other power supply voltages, cmos logic levels should be used. interface timing is shown in figure 5. note: clock inputs clk a and clk b have no relation to the digital interface. they control the switched-capacitor filter sample rate only. some noise may be generated on the filter outputs by transitions at the logic inputs. if this is objectionable, f clk /f 0 ratio max260/max261 max262 program code modes 1,3,4 mode 2 modes 1,3,4 mode 2 n f5 f4 f3 f2 f1 f0 172.79 122.18 113.10 79.97 46 101110 174.36 123.29 114.66 81.08 47 101111 175.93 124.40 11624 82.19 48 110000 177.50 125.51 117.81 83.30 49 110001 179.07 126.62 119.38 84.41 50 110010 180.64 127.73 120.95 85.53 51 110011 182.21 128.84 122.52 86.64 52 110100 183.78 129.96 124.09 87.75 53 110101 185.35 131.07 125.66 88.86 54 110110 186.92 132.18 127.23 89.97 55 110111 188.49 133.29 128.81 91.08 56 111000 190.07 134.40 130.38 92.19 57 111001 191.64 135.51 131.95 93.30 58 111010 193.21 136.62 133.52 94.41 59 111011 194.78 137.73 135.09 95.52 60 111100 196.35 138.84 136.66 96.63 61 111101 197.92 139.95 138.23 97.74 62 111110 199.49 141.06 139.80 98.85 63 111111 table 2. f clk /f 0 program selection table (continued) note 1: for the max260/max261, f clk /f 0 = (64 + n) / 2 in modes 1, 3, and 4, where n varies from 0 to 63. note 2: for the max262, f clk /f 0 = (26 s n) / 2 in modes 1, 3, and 4, where n varies 0 to 63. note 3: in mode 2, all f clk /f 0 ratios are divided by 2 . the functions are then: max260/max261 f clk /f 0 = 1.11072 (64 + n), max262 f clk /f 0 = 1.11072 (26 + n)
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 13 programmed q program code modes 1,3,4 mode 2 n q6q5q4q3 q2q1q0 0.500* 0.707* 0* 0 0 0 0 0 0 0 0.504 0.713 1 0 0 0 0 0 0 1 0.508 0.718 2 0 0 0 0 0 1 0 0.512 0.724 3 0 0 0 0 0 1 1 0.516 0.730 4 0 0 0 0 1 0 0 0.520 0.736 5 0 0 0 0 1 0 1 0.525 0.742 6 0 0 0 0 1 1 0 0.529 0.748 7 0 0 0 0 1 1 1 0.533 0.754 8 0 0 0 1 0 0 0 0.538 0.761 9 0 0 0 1 0 0 1 0.542 0.767 10 0 0 0 1 0 1 0 0.547 0.774 11 0 0 0 1 0 1 1 0.552 0.780 12 0 0 0 1 1 0 0 0.556 0.787 13 0 0 0 1 1 0 1 0.561 0.794 14 0 0 0 1 1 1 0 0.566 0.801 15 0 0 0 1 1 1 1 0.571 0.808 16 0 0 1 0 0 0 0 0.577 0.815 17 0 0 1 0 0 0 1 0.582 0.823 18 0 0 1 0 0 1 0 0.587 0.830 19 0 0 1 0 0 1 1 0.593 0.838 20 0 0 1 0 1 0 0 0.598 0.646 21 0 0 1 0 1 0 1 0.604 0.854 22 0 0 1 0 1 1 0 0.609 0.862 23 0 0 1 0 1 1 1 programmed q program code modes 1,3,4 mode 2 n q6q5q4q3q2q1q0 0.615 0.870 24 0 0 1 1 0 0 0 0.621 0.879 25 0 0 1 1 0 0 1 0.627 0.887 26 0 0 1 1 0 1 0 0.634 0.896 27 0 0 1 1 0 1 1 0.640 0.905 28 0 0 1 1 1 0 0 0.646 0.914 29 0 0 1 1 1 0 1 0.653 0.924 30 0 0 1 1 1 1 0 0.660 0.933 3100 11 11 1 0.667 0.943 3201 00 00 0 0.674 0.953 3301 00 00 1 0.681 0.963 3401 00 01 0 0.688 0.973 3501 00 01 1 0.696 0.984 3601 00 10 0 0.703 0.995 3701 00 10 1 0.711 1.01 3801 00 11 0 0.719 1.02 3901 00 11 1 0.727 1.03 4001 01 00 0 0.736 1.04 4101 01 00 1 0.744 1.05 4201 01 01 0 0.753 1.06 43 0 1 0 1 0 1 1 0.762 1.08 44 0 1 0 1 1 0 0 0.771 1.09 45 0 1 0 1 1 0 1 0.780 1.10 46 0 1 0 1 1 1 0 0.790 1.12 47 0 1 0 1 1 1 1 table 3. q program selection table note 4: * writing all 0s into q0a q6a on filter a activates a low-power shutdown mode. both filter sections are deactivated. therefore, this q value is only achievable in filter b.
max260/max261/max262 microprocessor programmable universal active filters 14 ______________________________________________________________________________________ programmed q program code modes 1,3,4 mode 2 n q6q5q4q3q2q1q0 0.800 1.13 48 0110000 0.810 1.15 49 0110001 0.821 1.16 50 0110010 0.831 1.18 51 0110011 0.842 1.19 52 0110100 0.853 1.21 53 0110101 0.865 1.22 54 0110110 0.877 1.24 55 0110111 0.889 1.26 56 0111000 0.901 1.27 57 0111001 0.914 1.29 58 0111010 0.928 1.31 59 0111011 0.941 1.33 60 0111100 0.955 1.35 61 0111101 0.969 1.37 62 0111110 0.985 1.39 63 0111111 1.00 1.41 64 1000000 1.02 1.44 65 1000001 1.03 1.46 66 1000010 1.05 1.48 67 1000011 1.07 1.51 68 1000100 1.08 1.53 69 1000101 1.10 1.56 70 1000110 1.12 1.59 71 1000111 1.14 1.62 72 1001000 1.16 1.65 73 1001001 1.19 1.68 74 1001010 1.21 1.71 75 1001011 1.23 1.74 76 1001100 1.25 1.77 77 1001101 1.28 1.81 78 1001110 1.31 1.85 79 1001111 1.33 1.89 80 1010000 1.36 1.93 81 1010001 1.39 1.97 82 1010010 1.42 2.01 83 1010011 1.45 2.06 84 1010100 1.49 2.10 85 1010101 1.52 2.16 86 1010110 1.56 2.21 87 1010111 programmed q program code modes 1,3,4 mode 2 n q6 q5q4q3q2q1q0 1.60 2.26 88 1 0 1 1 0 0 0 1.64 2.32 89 1 0 1 1 0 0 1 1.68 2.40 90 1 0 1 1 0 1 0 1.73 2.45 91 1 0 1 1 0 1 1 1.78 2.51 92 1 0 1 1 1 0 0 1.83 2.59 93 1 0 1 1 1 0 1 1.88 2.66 94 1 0 1 1 1 1 0 1.94 2.74 95 1 0 1 1 1 1 1 2.00 2.83 96 1 1 0 0 0 0 0 2.06 2.92 97 1 1 0 0 0 0 1 2.13 3.02 98 1 1 0 0 0 1 0 2.21 3.12 99 1 1 0 0 0 1 1 2.29 3.23 100 1 1 0 0 1 0 0 2.37 3.35 101 1 1 0 0 1 0 1 2.46 3.48 102 1 1 0 0 1 1 0 2.56 3.62 103 1 1 0 0 1 1 1 2.67 3.77 104 1 1 0 1 0 0 0 2.78 3.96 105 1 1 0 1 0 0 1 2.91 4.11 106 1 1 0 1 0 1 0 3.05 4.31 107 1 1 0 1 0 1 1 3.20 4.53 108 1 1 0 1 1 0 0 3.37 4.76 109 1 1 0 1 1 0 1 3.56 5.03 110 1 1 0 1 1 1 0 3.76 5.32 111 1 1 0 1 1 1 1 4.00 5.66 112 1 1 1 0 0 0 0 4.27 6.03 113 1 1 1 0 0 0 1 4.57 6.46 114 1 1 1 0 0 1 0 4.92 6.96 115 1 1 1 0 0 1 1 5.33 7.54 116 1 1 1 0 1 0 0 5.82 8.23 117 1 1 1 0 1 0 1 6.40 9.05 118 1 1 1 0 1 1 0 7.11 10.1 119 1 1 1 0 1 1 1 8.00 11.3 120 1 1 1 1 0 0 0 9.14 12.9 121 1 1 1 1 0 0 1 10.7 15.1 122 1 1 1 1 0 1 0 12.8 18.1 123 1 1 1 1 0 1 1 16.0 22.6 124 1 1 1 1 1 0 0 21.3 30.2 125 1 1 1 1 1 0 1 32.0 45.3 126 1 1 1 1 1 1 0 64.0 90.5 127 1 1 1 1 1 1 1 table 3. q program selection table (continued) notes 5) in modes 1, 3, and 4: q = 64 / (128 - n) 6) in mode 2, the listed q values are those of mode 1 multiplied by 2 . then q = 90.51 / (128 - n)
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 15 the digital lines should be buffered from the device by logic gates as shown in figure 6. shutdown mode the max260/max261/max262 enters a shutdown/ standby mode when all zeroes are written to the q addresses of filter a (q0 a q6 a ). when shut down, power consumption with 5v supplies typically drops to 10mw. when reactivating the filter after shutdown, allow 2ms to return to full operation. filter operating modes there are several ways in which the summing amplifier and integrators in each max260/max261/max262 filter section can be configured. the four most versatile interconnections (modes) are selected by writing to inputs m0 and m1 (see tables 4 and 5). these modes use no external components. a fifth mode, 3a, makes use of an additional op amp (included in the max261 and max262) and external resistors, but uses the same internal configuration and is selected with the same programming code, as mode 3. filter b clk out 12 clk b f clk = 0.45 rc 8 osc out 19(18)* c r 11 clk a filter a filter b clk out clk b osc out clk a filter a 12 8 19(18)* 11 crystal *osc out is pin 18 on max261/max262 filter b clk out 12 clk b osc out n.c. 11 clk a filter a n.c. external clock in (any duty cycle) figure 4. clock input connections data bit address d0 d1 a3 a2 a1 a0 location filter a m0 a m1 a 0000 0 f0 a f1 a 0001 1 f2 a f3 a 0010 2 f4 a f5 a 0011 3 q0 a q1 a 0100 4 q2 a q3 a 0101 5 q4 a q5 a 0110 6 q6 a 0111 7 filter b m0 b m1 b 1000 8 f0 b f1 b 1001 9 f2 b f3 b 1010 10 f4 b f5 b 1011 11 q0 b q1 b 1100 12 q2 b q3 b 1101 13 q4 b q5 b 1110 14 q6 b 1111 15 table 4. program address locations note: writing 0 into q0a?6a (address locations 4?) on filter a activates shutdown mode. both filter sections deactivate. d0, d1 wr valid data t ds t dh t wr valid address t as a0 a3 see interface specifications for timing limits t ah figure 5. interface timing
max260/max261/max262 microprocessor programmable universal active filters 16 ______________________________________________________________________________________ figures 7 through 11 show symbolic representations of the max260 filter modes. only one second-order sec- tion is shown in each case. the a and b sections of one max260/max261/max262 can be programmed for different modes if desired. the f 0 , f n (notch), q, and various output gains in each case are shown in table 5. filter mode selection mode 1 (figure 7) is useful when implementing allpole lowpass and bandpass filters such as butterworth, chebyshev, basset, etc. it can also be used for notch filters, but only second-order notches because the rela- tive pole and zero locations are fixed. higher order notch filters require more latitude in f 0 and 1 n , which is why they are more easily implemented with mode 3a. 1d 3 4 7 8 13 14 2d 3d 4d 6d wr 5d 1q 2q 3q 20 octal d flip-flop 74hc374 v cc 5q 6q 4q a0 a1 a2 d1 d2 a3 2 5 6 12 15 11011 -5v 9 oc ck gnd max260 max261 max262 a0 a1 a2 a3 d2 d1 +5v v + -5v v - gnd wr figure 6. buffering/latching logic inputs scn in scn n bp lp + - - mode 1 + - scn scn = switched-capacitor network figure 7. filter mode 1: second-order bandpass, lowpass, and notch mode m1, m0 filter functions f 0 qf n h olp h obp h on1 (f ? 0) h on2 (f ? f clk /4) other 1 0, 0 lp, bp, n f 0 -1 -q -1 -1 2 0, 1 lp, bp, n f 0 2 -0.5 -q/ 2 -0.5 -1 3 1, 0 lp, bp, hp -1 -q h ohp = -1 -1 -q h ohp = -1 4 1, 1 lp, bp, ap see table 2 see table 3 -2 -2q h oap = -1 f z = f 0 , q z = q table 5. filter modes for second-order functions notes: f 0 = center frequency f n = notch frequency h olp = lowpass gain at dc h obp = bandpass gain at f 0 h ohp = highpass gain as f approaches f clk /4 h on1 = notch gain as f approaches dc h on2 = notch gain as f approaches f clk /4 h oap = allpass gain f z , q z = f and q of complex pole pair + r r g h + r r g l f r r h l 0
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 17 mode 1, along with mode 4, supports the highest clock frequencies (see table 1) because the input summing amplifier is outside the filter s resonant loop (figure 7). the gain of the lowpass and notch outputs is 1, while the bandpass gain at the center frequency is q. for bandpass gains other than q, the filter input or output can be scaled by a resistive divider or op amp. mode 2 (figure 8) is used for all-pole lowpass and bandpass filters. key advantages compared to mode 1 are higher available qs (see table 3) and lower output noise. mode 2 s available f clk /f 0 ratios are 2 less than with mode 1 (see table 2), so a wider overall range of f 0 s can be selected from a single clock when both modes are used together. this is demonstrated in the wide passband chebyshev bandpass design example. mode 3 (figure 9) is the only mode that produces high-pass filters. the maximum clock frequency is somewhat less than with mode 1 (see table 1). mode 3a (figure 10) uses a separate op amp to sum the highpass and lowpass outputs of mode 3, creating a separate notch output. this output allows the notch to be set independently of f 0 by adjusting the op amp s feedback resistor ratio (r h , r l ). r h , r l , and r g are external resistors. because the notch can be indepen- dently set, mode 3a is also useful when designing pole-zero filters such as elliptics. mode 4 (figure 11) is the only mode that provides an allpass output. this is useful when implementing group delay equalization. in addition to this, mode 4 can also be used in all pole lowpass and bandpass filters. along with mode 1, it is the fastest operating mode for the fil- ter, although the gains are different than in mode 1. when the allpass function is used, note that some amplitude peaking occurs (approximately 0.3db when q = 8) at f 0 . also note that f 0 and q sampling errors are highest in mode 4 (see figure 20). scn in scn n bp lp + - - mode 2 + - scn scn figure 8. filter mode 2: second-order bandpass, lowpass, and notch scn in scn hp bp lp + - - mode 3 + - scn scn scn = switched-capacitor network figure 9. filter mode 3: second-order bandpass, lowpass, and highpass scn in scn hp r g r h r l bp lp + - - mode 3a n + - + - scn scn scn = switched-capacitor network figure 10. filter mode 3a: second-order bandpass, lowpass, highpass, and notch. for elliptic lp, bp, hp, and notch, the n output is used.
max260/max261/max262 microprocessor programmable universal active filters 18 ______________________________________________________________________________________ description of filter functions bandpass (figure 12) for all pole bandpass and lowpass filters (butterworth, bessel, chebyshev) use mode 1 if possible. if appropri- ate f clk /f 0 or q values are not available in mode 1, mode 2 provides a selection that is closer to the required values. mode 1, however, has the highest bandwidth (see table 1). for pole-zero filters, such as elliptics, see mode 3a. h obp = bandpass output gain at = o f 0 = 0 / 2 = the center frequency of the complex pole pair. input-output phase shift is -180 at f 0 . q = the quality factor of the complex pole pair. also the ratio of f 0 to -3db bandwidth of the second-order bandpass response. lowpass see bandpass text. (figure 13) h olp = lowpass output gain at dc f 0 = 0 / 2 highpass (figure 14) mode 3 is the only mode with a highpass output. it works for all pole filter types such as butterworth, bessel and chebyshev. use mode 3a for filters employing both poles and zeros, such as elliptics. h ohp = highpass output gain as f approaches f clk /4 f 0 = 0 / 2 notch (figure 15) mode 3a is recommended for multi-pole notch filters. in second-order filters, mode 1 can also be used. the advantages of mode 1 are higher bandwidth, com- pared to mode 3 (higher f n can be implemented), and no need for external components as required in mode 3a. h on2 = notch output gain as f approaches f clk /4 h on1 = notch output gain as f approaches dc f n = n / 2 allpass mode 4 is the only configuration in which an allpass function can be realized. gs h s ss q on n oo () ( / ) = + ++ 2 2 2 2 2 ? gs h s ss q ohp oo () ( / ) = ++ 2 2 2 ? gs h ss q olp o oo () ( / ) = ++ ? 2 2 2 gs h sq ss q obp o oo () ( / ) ( / ) = ++ ? 2 2 scn in scn ap lp + - - mode 4 bp + - scn scn = switched-capacitor network figure 11. filter mode 4: second-order bandpass, lowpass, and allpass f l f o f h h obp 0.707 h obp bandpass output f(log scale) gain (v/v) figure 12. second-order bandpass characteristics q f ff f ff qq ff qq o hl off lo ho lh , = ? = ? + ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? ? =+ ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? ? = 1 2 1 2 1 1 2 1 2 1 2 2
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 19 h oap = allpass output gain for dc < f < f clk / 4 f 0 = 0 / 2 filter design procedure the procedure for most filter designs is to first convert the required frequency response specifications to f 0 s and qs for the appropriate number of second-order sections that implement the filter. this can be done by using design equations or tables in available liter- ature, or can be conveniently calculated using maxim's filter design software. once the f 0 s and qs have been found, the next step is to turn them into the digital pro- gram coefficients required by the max260/max261/ max262. an operating mode and clock frequency (or clock/center frequency ratio) must also be selected. next, if the sample rate (f clk /2) is low enough to cause significant errors, the selected f 0 s and qs should be corrected to account for sampling effects by using figure 20 or maxim's design software. in most cases, the sampling errors are small enough to require no cor- rection, i.e., less than 1%. in any case, with or without correction, the required f 0 s and qs can then be select- ed from tables 2 and 3. maxim's filter design software gs h s sq ss q oap oo oo () ( / ) ( / ) = ?+ ++ 2 2 2 2 ? ? f p f c h op 0.707 h olp h olp lowpass output f(log scale) gain (v/v) figure 13. second-order lowpass characteristics ffx qq fp f q hhx q q co o op olp = ? ? ? ? ? ? + ? ? ? ? ? ? + = = ?? ? ? 1 1 2 1 1 2 1 1 1 2 1 1 1 1 4 22 2 2 2 f c f p h op 0.707 h ohp h ohp highpass output f(log scale) gain (v/v) figure 14. second-order highpass characteristics ffx qq fp f q hhx q q co o op ohp = ? ? ? ? ? ? + ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? ? = = ?? ? ? 1 1 2 1 1 2 1 1 1 2 1 1 1 1 4 22 2 2 2 f(log scale) gain (v/v) f n h on1 h on h on2 figure 15. second-order notch characteristics total sections total b.w. total q 1 1.000 b 1.00 q 2 0.644 b 1.55 q 3 0.510 b 1.96 q 4 0.435 b 2.30 q 5 0.386 b 2.60 q table 6. cascading identical bandpass filter sections note: b = individual stage bandwidth, q = individual stage q.
max260/max261/max262 microprocessor programmable universal active filters 20 ______________________________________________________________________________________ can also perform this last step. the desired f 0 s and qs are stated, and the appropriate digital coefficients are supplied. cascading filters in some designs, such as very narrow band filters, sev- eral second-order sections with identical center fre- quency can be cascaded. the total q of the resultant filter is: q is the q of each individual filter section, and n is the number of sections. in table 6, the total q and band- width are listed for up to five identical second-order sections. b is the bandwidth of each section. in high-order bandpass filters, stages with different f 0 s and qs are also often cascaded. when this happens, the overall filter gain at the bandpass center frequency is not simply the product of the individual gains because f 0 , the frequency where each sections gain is specified, is different for each second-order section. the gain of each section at the cascaded filter's center frequency must be determined to obtain the total gain. for all-pole filters the gain, h(f 0 ), as each second-order section's f 0 is divided by an adjustment factor, g, to obtain that section's gain, h(f 0bp ), at the overall center frequency: h 1 (f 0bp ) = h(f 01 ) / g 1 = section 1 s gain at f 0bp where f 1 = f 01 / f obp g 1 , q 1 , and f 01 are the gain adjustment factor, q, and f 0 for the first of the cascaded second-order sections. the gain of the other sections (2, 3, etc.) at f 0bp is determined the same way. the overall gain is: h(f 0bp ) = h 1 (f 0bp ) x h 2 (f 0bp ) x etc. for cascaded filters with zeros (f z ) such as elliptics, the gain adjustment factor for each stage is: where f 1z = f z1 / f 0bp , and f 1 is the same as above. application hints power supplies the max260/max261/max262 can be operated with a variety of power supply configurations, including +5v to +12v single supply or 2.5v to 5v dual supplies. when a single supply is used, v - is connected to sys- tem ground and the filter's gnd pin should be biased at v + /2. the input signal is then either capacitively cou- pled to the filter input or biased to v + /2. figure 16 shows circuit connections for single-supply operation. when power supplies other than 5v are used, cmos input logic levels (high = v + , low = gnd or v - ) are required for wr , d0, d1, a0 a3, olk a , and clk b . with 5v supplies, either ttl or cmos levels can be used. note, however, that power consumption at 5v is reduced if clk a and clk b are driven with 5v, rather than ttl or 0 to 5v levels. operation with +5v or 2.5v power lowers power consumption, but also reduces bandwidth by approximately 25% compared to +12v or 5v supplies. best performance is achieved if v + and v - are bypassed to ground with 4.7f electrolytic (tantalum is preferred.) and 0.1f ceramic capacitors. these should be located as close to the supply pins as possible. the lead length of the bypass capacitors should be shortest at the v + and v - pins. when using a single supply, v + and gnd should be bypassed to v - as shown in figure 16. output swing and clipping max260/max261/max262 outputs are designed to drive 10k ? loads. for the max261 and max262, all fil- ter outputs swing to within 0.15v of each supply rail with a 10k ? load. in the max260 only, an internal sam- ple-hold circuit reduces voltage swing at the n/hp/ap output compared to lp and br. n/hp/ap, therefore, swings to within 1v (10k ? load) of either rail on the max260. to ensure that the outputs are not driven beyond their maximum range (output clipping), the peak amplitude response, individual section gains (h obp , h olp , h ohp ), input signal level, and filter offset voltages must be carefully considered. it is especially important to check unused outputs for clipping (i.e., the lowpass output in a bandpass hookup), because overload at any filter stage severely distorts the overall response. the maximum signal swing with 4.75v supplies and a 1.0v filter offset is approximately 3.5v. for example, lets assume a fourth-order lowpass filter is being implemented with a q of 2 using mode 1. with a single 5v supply (i.e., 2.5v with respect to chip gnd) the maximum output signal is 2v (w.r.t. gnd). since in g qf f f f q ff z z 1 11 2 1 2 1 2 2 11 2 12 1 2 1 2 1 1 ( ) ( / ) / = ? ? ? ? ? ? ? ?+ ? ? ? ? ? ? ? ? ? ? ? g qf f q f 1 11 2 2 11 2 12 1 1 ( ) ( / ) / = ?+ ? ? ? ? ? ? total q q t n / = ? () 21 1
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 21 mode 1 the maximum signal is 0 times the input signal, the input should not exceed (2/q)v, or 1v in this case. clock feedthrough and noise typical wideband noise for max260 series devices is 0.5mv p-p from dc to 100khz. the noise is virtually independent of clock frequency. in multistage filters, the section with the highest q should be placed first for lower output noise. the output waveform of the max260 series and other switched capacitor filters appears as a sampled signal with stepping or staircasing of the output waveform occurring at the internal sample rate (f clk /2). this step- ping, if objectionable, can be removed by adding a sin- gle-pole ac filter. with no input signal, clock-related feedthrough is approximately 8mv p-p . this can also be attenuated with an rc-smoothing filter as shown with the max261 in figure 17. some noise also can be generated at the filter outputs by transitions at the logic inputs. if this is objectionable, the digital lines should be buffered from the device by logic gates as shown in figure 6. input impedance the input to each filter is the switched capacitor circuit shown in figure 18. in the max260, the input capacitor charges to the input voltage v in during the first half clock cycle. during the second half-cycle, its charge is transferred to the feedback capacitor. the resultant input impedance can be approximated by: r in = 1 / (c in f clk / 2) = 2 / (c in f clk ). c in is around 12pf, hence, for a clock frequency of 500khz, r in = 333k ? . the input also has about 5pf of fixed capacitance to ground. the max261/max262 input structure is shown in figure 19. here c a = 12pf and c b = 0.016pf and only c b is switched, so the input resistance is 750 times larger compared to the max260 (r in = 250m ? ). the max261/max262 have a fixed capacitance of approxi- mately 5pf to ground. f 0 and q at low sample rates when low f clk /f 0 ratios and low q settings are select- ed, deviation from ideal continuous filter response can be noticeable in some designs. this is due to interac- tion between q and f 0 at low f clk /f 0 ratios and qs. the data in figure 20 quantifies these differences. since the max260 max261 max262 wr a0 a3 d0, d1 in a or in b cmos logic levels v + v - gnd 0.1 f 0.1 f +5v 4.7 f 4.7k ? 4.7k ? note: op-amp level shift circuit has a gain of 0.5 from v*. v in v in to v+ to gnd pin 2.5k ? 7.5k ? 10k ? 10k ? + - see note v in 4.7 f 5v 0v 5v 0v any dc 0v figure 16. power supply and input connections for single supply operation
max260/max261/max262 microprocessor programmable universal active filters 22 ______________________________________________________________________________________ errors are predictable, the graphs can be used to cor- rect the selected f 0 and q so that the actual realized parameters are on target. these predicted errors are not unique to max260 series devices and, in fact, occur with all types of sampled filters. consequently, these corrections can be applied to other switched capacitor filters. in the majority of cases, the errors are not significant, i.e., less than 1%, and correction is not needed. however, the max262 does employ a lower range of f clk /f 0 ratios than the max260 or max261 and is more prone to sampling errors, as the tables show. maxim's filter design software applies the previous cor- rections automatically as a function of desired f clk /f 0 , and q. therefore, figure 20 should not be used when maxim's software determines f 0 and q. this results in overcompensation of the sampling errors since the cor- rection factors are then counted twice. the data plotted in figure 20 applies for modes 1 and 3. when using figure 20 for mode 4, the f 0 error obtained from the graph should be multiplied by 1.5 and the q error should be multiplied by 3.0. in mode 2, the value of f clk /f 0 should be multiplied by 2 and the programmed q should be divided by 2 before using the graphs. as with all sampled systems, frequency components of the input signal above one half the sampling rate are aliased. in particular, input signal components near the sampling rate generate difference frequencies that often fall within the passband of the filter. such aliased signals, when they appear at the output, are indistin- guishable from real input information. for example, the aliased output signal generated when a 99khz wave- form is applied to a filter sampling at 100khz (f clk = 200khz) is 1khz. this waveform is an attenuated ver- sion of the output that would result from a true 1khz input. remember that, with the max260 series filters, the nyquist rate (one half the sample rate) is in fact f clk /4, because f clk is internally divided by two. a simple, passive rc lowpass input filter is usually suf- ficient to remove input frequencies that can cause aliasing. in many cases, the input signal itself may be band limited and require no special anti-alias filtering. the wideband max262 uses lower f clk /f 0 ratios than the max260/max261 and, for this reason, is more likely to require input filtering than the max260 or max281. trimming dc offset the dc offset voltage at the lp or notch output can be adjusted with the circuit in figure 21. this circuit also uses the input op amp to implement a single-pole anti- alias filter. note that the total offset is generally less in multistage filters than when only one section is used, max261 in a bpa trace a 500khz ttl trace b ov ov ov a 1v/div b 5mv/div c mv/div 1 s/div trace c c, 1000pf r, 10k ? clk a figure 17. max261 bandpass output clock noise v in c fb c in 12pf ~5pf + - f clk 2 2 c in f clk r in = figure 18. max260 input model v in c fb c a 12pf c b 0.016pf ~5pf + - f clk 2 2 750 c a f clk r in = figure 19. max261/max262 input model
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 23 since each offset is typical negative and each section inverts. when the hp or bp outputs are used, the offset can be removed with capacitor coupling. design examples fourth-order chebyshev bandpass filter figure 22 shows both halves of a max260 cascaded to form a fourth-order chebyshev bandpass filter. the desired parameters are: center frequency (f 0 ) = 1khz pass bandwidth = 200hz stop bandwidth = 600hz max passband ripple = 0.5db min stopband attenuation = 15db from the previous parameters, the order (number of poles) and the f 0 and q of each section can be deter- mined. such a derivation is beyond the scope of this data sheet; however, there are a number of sources that provide design data for this procedure. these include look-up tables, design texts, and computer pro- grams. design software is available from maxim to pro- vide comprehensive solutions for most popular filter configurations. the a and b section parameters for the above filter are: f 0a = 904hz f 0b = 1106hz q a = 7.05 q b = 7.05 to implement this filter, both halves operate in mode 1 and use the same clock. see tables 2 and 3. the pro- grammed parameters are: clk a = clk b = 150khz f clk /f 0a = 166.50 (mode 1, n = 42), actual f 0a = 902.4hz f clk /f 0b = 136.66 (mode 1, n = 23), actual f 0b = 1099.7hz q a = q b = 7.11 (mode 1, n = 119) sampling errors are very small at this f clk /f 0 ratio, so the actual realized q is very close to 7.05 (see figure 20 or program mpp in the filter design software sec- tion). often the realized q is not exactly the target value at high qs because programming resolution lowers as q increases. this does not affect most filter designs, since three-digit q accuracy is practically never required, and a q resolution of 1 is provided up to qs of 10. the overall filter gain at f 0 is 16.4v/v or 24.3db (see the cascading filters section). if another gain is required, amplification or attenuation must be added at the input, output, or between stages. 0 4 2 8 6 12 10 14 18 16 20 40 80 100 60 120 140 160 180 200 f o error vs. f clk /f o ratio (mode 1, 3) f clk /f o ratio f o error (%) q = 0.512 f 0 error is plotted for modes 1 and 3 mode 2: multiply i clk i o by 2 and divide q by 2 before using graph mode 4: mutiply f o error by 1.5 q = 0.512 q = 0.512 q = 0.512 q = 0.512 q = 0.512 0 -2 -1 -4 -3 -5 -6 -7 40 80 100 60 120 140 160 180 200 q error vs. f clk /f o ratio f clk /f o ratio q error (%) q = 0.5 q error is plotted for modes 1 and 3 mode 2: multiply f clk/ f o by 2 and divide q by 2 before using graph mode 4: mutiply q error by 1.5 q = 0.83 q = 7.11 q = 3.05 q = 0.6 q = 1.21 figure 20. sampling errors in f clk /f 0 and q at low f clk /f 0 and q settings r 2 100k ? r 3 270k ? v in +5v -5v offset trim to filter input 100k ? + - r 1 100k ? c 1 note: op amp included with max261/max262 gain = -r 1 /r 2 f lp = 1 2 r 1 c 2 figure 21. circuit for dc offset adjustment
max260/max261/max262 microprocessor programmable universal active filters 24 ______________________________________________________________________________________ in figure 23, a series of response curves are shown for the previous configuration using a max261 with clock frequencies ranging from 750khz to 4mhz (f 0 from 500hz to 30khz). note that the rightmost curve shows about 2db of gain peaking compared to the lower fre- quency curves, indicating the upper limit of usable filter accuracy at this q (see table 1). wide passband chebyshev bandpass in this example (figure 24), the desired parameters are: center frequency (f 0 ) = 1khz pass bandwidth = 1khz stop bandwidth = 3khz max passband ripple = 1db min stopband attenuation = 20db from the previous parameters, we use either lookup tables, design texts, or maxim's filter design programs to generate the order (number of poles), and the f 0 and q of each second-order section. the a and b parame- ters are: f 0a = 639hz f 0b = 1564hz q a = 2.01 q b = 2.01 to implement this filter, section a operates in mode 1 and section b uses mode 2 to provide a wider overall range of f clk /f 0 ratios. this way, one clock frequency can drive both sections a and b. see tables 2 and 3. clk a = clk b = 120khz f clk /f 0a = 188.49 (mode 1, n = 56), actual f 0a = 636.6hz f clk /f 0b = 76.64 (mode 2, n = 5), actual f 0b = 156.5hz q a = 2.000 (mode 1, n = 96), q b = 2.01 (mode 2, n = 83) the overall passband gain at f 0 is 0.64v/v or -3.9db. high-frequency chebyshev bandpass the same chebyshev response shape shown in figure 24 is implemented at higher frequencies with a max262 in figure 25. the curves show plots for center frequencies of 15.6khz, 31.3khz, and 47khz. not only is this faster than the max260 implementation, but mode 1 can be used in both halves of the max262 for this filter because the range of available f clk /f 0 ratios is wider with the max262 than the max260. 51 11 12 23 21 max260 v in in a bp a clk a clk program clk b in b bp b wr, ax, dx v out 40 -60 200 2k 1k 500 20k 10k 5k -35 frequency (hz) gain (db) phase (degrees) -10 15 -180 180 90 0 -90 gain phase figure 22. fourth-order chebyshev bandpass filter clk a,b mode f oa f ob q a q b 150khz 1 n = 42 n = 23 n = 119 n = 119 30 -30 1k 10k 5k 2k 100k 50k 20k -15 frequency (hz) gain (db) 0 15 figure 23. max261 fourth-order chebyshev bandpass using coefficients of figure 22
max260/max261/max262 microprocessor programmable universal active filters ______________________________________________________________________________________ 25 fourth-order butterworth lowpass figure 26 shows a fourth-order butterworth lowpass with a cutoff frequency of 3khz. sections a and b of a max260 are cascaded. the f 0 and q parameters for each section are: f 0a = 3khz f 0b = 3khz q a = 1.307 q b = 0.541 mode 1 and a 400khz clock are used. because of low q values, the sampling errors of figure 20 begin to look significant in this case. from the graphs, using f clk /f 0 ratio near 133, f 0 a is about 4% high, f 0 b is 1.5% high, q a is -1.2% low, and q b is -0.5% low. if these errors are not a problem, the corrections can be ignored. they are included here for best possible accuracy: clk a = clk b = 400khz f clk /f 0a = 135.08 (n = 22), f 0b = 2961hz (-1.3% correction) f clk /f 0b = 139.80 (n = 25), f 0a = 2861hz (-4.6% correction) q a = 1.306 (n = 79, q resolution prevents +0.5% correction) q b = 0.547 (n = 11 +1.1% correction) measured wideband noise for this filter is 123v rms. if mode 2 were used, the noise would be 87v rms. for lower noise with either mode, the first section should have the highest q (section a in this example). 51 11 12 23 21 max260 v in in a bp a clk a clk program clk b in b bp b wr, ax, dx v out 10 -70 100 1k 500 200 10k 5k 2k -50 frequency (hz) gain (db) -30 -10 -180 180 90 phase (degrees) 0 -90 gain phase figure 24. wide passband chebyshev bandpass filter clk a,b mode a mode b f oa f ob q a q b 120khz 1 2 n = 56 n = 5 n = 96 n = 83 51 11 12 23 21 max262 v in in a bp a clk a clk program clk b in b bp b wr, ax, dx v out 0 -50 1k 10k 5k 2k 100k 50k 20k -40 -30 frequency (hz) gain (db) -20 -10 f o = 15.6khz f clk = 1mhz f o = 31.3khz f clk = 2mhz f o = 47khz f clk = 3mhz figure 25. high-frequency chebyshev bandpass filter clk a,b mode f oa f ob q a q b 1 to 3mhz 1 n = 38 n = 0 n = 96 n = 96
max260/max261/max262 microprocessor programmable universal active filters maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 26 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2002 maxim integrated products printed usa is a registered trademark of maxim integrated products. ordering information (continued) part temp range package a c c u r a c y max261 acng 0 c to +70 c plastic dip 1% max261bcng 0 c to +70 c plastic dip 2% max261aeng -40 c to +85 c plastic dip 1% max261beng -40 c to +85 c plastic dip 2% max261acwg 0 c to +70 c wide so 1% max261bcwg 0 c to +70 c wide so 2% max261amrg -55 c to +125 c cerdip 1% max261bmrg -55 c to +125 c cerdip 2% max262 acng 0 c to +70 c plastic dip 1% max262bcng 0 c to +70 c plastic dip 2% max262aeng -40 c to +85 c plastic dip 1% max2g2beng -40 c to +85 c plastic dip 2% max262acwg 0 c to +70 c wide so 1% max262bcwg 0 c to +70 c wide so 2% max262amrg -55 c to +125 c cerdip 1% max262bmrg -55 c to +125 c cerdip 2% * all devices?4-pin packages 0.3in-wide packages v + a1 0.199in (5.055mm) a2 clk a clk b d0 clk out n.c.(op in) v - a0 wr hp b (n.c.) n.c.(hp a ) hp a (op out) n.c.(hp b ) bp a lp a in b lp b bp b 0.128in 3.251mm in a d1 osc out gnd a3 note: labels in parentheses ( ) are for max261/max262 only chip topography
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs max260 part number table notes: see the max260 quickview data sheet for further information on this product family or download the max260 full data sheet (pdf, 952kb). 1. other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 2. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 3. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 4. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 5. part number free sample buy direct package: type pins size drawing code/var * temp rohs/lead-free? materials analysis max260soft rohs/lead-free: no max260bmrg -55c to +125c rohs/lead-free: no max260amrg -55c to +125c rohs/lead-free: no max260bc ng+ pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24+4 * 0c to +70c rohs/lead-free: yes materials analysis max260ac ng+ pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24+4 * 0c to +70c rohs/lead-free: yes materials analysis max260ac ng pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24-4 * 0c to +70c rohs/lead-free: no materials analysis max260bc ng pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24-4 * 0c to +70c rohs/lead-free: no materials analysis
max260aeng+ pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24+4 * -40c to +85c rohs/lead-free: yes materials analysis MAX260BENG pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24-4 * -40c to +85c rohs/lead-free: no materials analysis MAX260BENG+ pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24+4 * -40c to +85c rohs/lead-free: yes materials analysis max260aeng pdip;24 pin;.300" dwg: 21-0043d (pdf) use pkgcode/variation: n24-4 * -40c to +85c rohs/lead-free: no materials analysis max260ac wg+t 0c to +70c rohs/lead-free: yes max260bc wg+ soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24+3 * 0c to +70c rohs/lead-free: yes materials analysis max260ac wg+ soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24+3 * 0c to +70c rohs/lead-free: yes materials analysis max260ac wg-t 0c to +70c rohs/lead-free: no max260bc wg+t soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24+3 * 0c to +70c rohs/lead-free: yes materials analysis max260bc wg-t soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24-3 * 0c to +70c rohs/lead-free: no materials analysis max260bc wg soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24-3 * 0c to +70c rohs/lead-free: no materials analysis max260ac wg soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24-3 * 0c to +70c rohs/lead-free: no materials analysis max260bewg+ soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24+3 * -40c to +85c rohs/lead-free: yes materials analysis max260aewg+t -40c to +85c rohs/lead-free: yes max260aewg+ soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24+3 * -40c to +85c rohs/lead-free: yes materials analysis max260aewg-t -40c to +85c rohs/lead-free: no
max260aewg soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24-3 * -40c to +85c rohs/lead-free: no materials analysis max260bewg-t -40c to +85c rohs/lead-free: no max260bewg soic ;24 pin;.300" dwg: 21-0042b (pdf) use pkgcode/variation: w24-3 * -40c to +85c rohs/lead-free: no materials analysis max260bewg+t -40c to +85c rohs/lead-free: yes didn't find what you need? c ontac t us: send us an email c opyright 2 0 0 7 by m axim i ntegrated p roduc ts , dallas semic onduc tor ? legal n otic es ? p rivac y p olic y

▲Up To Search▲

Price & Availability of MAX260BENG

	To Download MAX260BENG Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .