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color tft lcd driver 1 publication date: june 2002 sdf00033aem MN863440 tft lcd gate driver with 200, 240, 256, or 263 outputs overview the MN863440 is a tft lcd gate driver with 200, 240, 256, or 263 2-value outputs. the number of outputs can be selected to be any one of these by the user. this ic implements 2-value (pseudo 3-value) drive, and provides a cascade-connection pin to support large-screen displays. it is provided in a tcp package. features ? adopts a bidirectional shift register system ? provides an expansion pin so that the number of output pins can be increased. ? pulse width modulation function (oe1 to oe3) ? driver operating frequency: 500 khz (maximum) ? lcd drive voltage: v ee + 40 v (maximum) ? driver output levels: 2 levels (the low level can be modified.) ? supports tcp mounting. applications ? lcd tv sets block diagram v gg v off v ee v dd v ss fx dio1 mode1 mode2 xdon oe1 oe2 oe3 rl dio2 x1 x263 output circuit control circuit shift register
MN863440 2 sdf00033aem functional descriptions 1. lcd drive voltages the MN863440 can provide lcd drive voltages that are negative relative to logic ground. 2. operation the MN863440 outputs either the display level (v gg ) or the off level (v off ) from the lcd driver outputs (x1 to x263) under control of the shift data and the oe input signal. the data shift direction can be controlled with the shift direction switching pin (rl). the dio input signal is acquired on the rising edge of fx. the shift register operates and the drive voltages are output with this timing as well. the dio output is synchronized with the falling edge of fx. start data transfer carry pulse rl pulse input direction output rl = high dio1 x1 x263 dio2 rl = low dio2 x263 x1 dio1 v off v ss v dd v gg logic inputs logic outputs x1 to x263
MN863440 3 sdf00033aem functional descriptions (continued) 3. oe function the outputs can be forced to the display off level regardless of the data in the shift register in sets consisting of every third output pin by setting the oe1, oe2, and oe3 pins to the high level. this function operates asynchronously with the fx pin. 200 output tcp mode1 = low mode2 = low x1 (oe1) x2 (oe2) x3 (oe3) x98 (oe2) x99 (oe3) x100 (oe1) 240 output tcp mode1 = low mode2 = high x1 (oe1) x2 (oe2) x3 (oe3) x118 (oe1) x119 (oe2) x120 (oe3) x144 (oe1) x145 (oe2) x146 (oe3) 256 output tcp mode1 = high mode2 = low x1 (oe1) x2 (oe2) x3 (oe3) x126 (oe3) x127 (oe1) x128 (oe2) x136 (oe3) x137 (oe1) x138 (oe2) 263 output tcp mode1 = high mode2 = high x1 (oe1) x2 (oe2) x3 (oe3) x98 (oe2) x99 (oe3) x100 (oe1) x118 (oe1) x119 (oe2) x120 (oe3) x126 (oe3) x127 (oe1) x128 (oe2) x129 (oe3) x130 (oe1) x131 (oe2) x132 (oe3) x133 (oe1) x134 (oe2) x135 (oe3) x136 (oe1) x137 (oe2) x138 (oe3) x144 (oe3) x145 (oe1) x146 (oe2)
MN863440 4 sdf00033aem functional descriptions (continued) 3. oe function (continued) 200 output tcp x164 (oe2) x165 (oe3) x166 (oe1) x261 (oe3) x262 (oe1) x263 (oe2) here, (oen) indicates which of oe1, oe2, and oe3 is the related signal. 240 output tcp x261 (oe1) x262 (oe2) x263 (oe3) 256 output tcp x261 (oe2) x262 (oe3) x263 (oe1) 263 output tcp x164 (oe2) x165 (oe3) x166 (oe1) x261 (oe3) x262 (oe1) x263 (oe2) 4. xdon function the outputs can be set to the output the display on potential (v gg ) regardless of the states of the oen pins and the shift register data by setting the xdon pin to the low level. this function operates asynchronously with the fx pin. this pin is pulled up. 5. carry input (dio1, dio2) the waveform input to the carry input must meet the following conditions. 123 fx 4 5 260 261 262 263 1) single pulse width input dio1 dio2 2) input with a width of 2 pulses or longer dio1 dio2 3) double pulse input pulse spacing: an odd number dio1 dio2 4) double pulse input pulse spacing: an even number dio1 dio2 allowable input illegal input allowable input illegal input
MN863440 5 sdf00033aem pin name i/o function description fx i shift register clock input the start pulse is acquired and the shift register shifted on the fx rising edge. the carry pulse is output on the fx falling edge. rl i right shift/left shift selection rl = high: x1 x263 (left shift) input rl = low: x263 x1 (right shift) dio1 i/o start pulse input and carry dio2 pulse output mode1 i output pin count switching mode2 inputs oe1 to oe3 i display signal enable/disable when oen is high, the corresponding lcd drive output pins inputs are set to the display off potential (v off ) asynchronously with the fx pin, regardless of the states of the shift register and other input data. see 3. oe function in the functional descriptions section. x1 to x263 o lcd drive outputs these pins output, in synchronization with the fx rising edge, either the v gg or the v off voltage level according to the shift register data and the states of the oe1 to oe3, dio1, and dio2 pins. v gg power lcd drive output block power su'pply for the level shifters and output buffers. power supply this supply is also used for the lcd drive voltage. lcd drive supply 1 v off power lcd drive supply 2 supplies an lcd drive voltage. v ee power v gg system ground v dd power 3 v system logic power supply power supply used for the 3 v system logic circuits. v ss power v dd system ground pin descriptions dio1 dio2 rl = high i o rl = low o i mode1 mode2 lcd outputs high high 263 high low 256 low high 240 low low 200
MN863440 6 sdf00033aem basic waveforms 1. rl = high, left shift, mode1, mode2 = high fx 1 2 3 4 5 261 262 263 264 dio1 oe1 oe2 oe3 x1 x2 x3 x4 x263 dio2 2. rl = low, right shift, mode1, mode2 = high fx 1 2 3 4 5 261 262 263 264 dio2 oe1 oe2 oe3 x263 x262 x261 x260 x1 dio1
MN863440 7 sdf00033aem xdon usage example ? rl = high, left shift, mode1, mode2 = high fx 1 2 3 4 5 261 262 263 264 dio1 oe1 oe2 oe3 xdon x1 x2 x3 x4 x263 dio2
MN863440 8 sdf00033aem electrical characteristics 1. absolute maximum ratings at v ss = 0 v item symbol rating unit supply voltage 1 v dd ? 0.3 to + 4.5 v supply voltage 2 v gg v ee to v ee + 44 v drive voltage v off v ee ? 0.3 to v gg + 0.3 v supply voltage 3 v ee ? 24 to + 0.3 v digital input voltage v i ? 0.3 to v dd + 0.3 v operating and storage temperature range t a ? 30 to + 85 c operating ambient temperature t opr ? 20 to + 75 c storage temperature t stg ? 55 to + 120 c note) 1. the absolute maximum ratings are limit values for stresses applied to the chip so that the chip will not be destroyed. operation is not guaranteed within these ranges. 2. the operating and storage temperature range is the temperature range over which the chip will not be damaged even if operated. note that performance is not guaranteed throughout this range. 3. these ratings are guaranteed values when the standard panasonic package is used. 4. the power supply voltages must meet the condition v ee v gg at all times, including when power is being applied, during operation, and when power is being turned off. 5. when power is applied, certain sequences of power application can cause large currents to flow and permanently damage the ic. to avoid this problem, first apply v dd , and then, after v dd has reached 90% of its set voltage, apply v ee , v gg , and v off . 2. operating conditions at v ss = 0 v, t opr = -20c to +75c item symbol condition min typ max unit operating supply voltage 1 v dd 2.3 ? 3.6 v operating supply voltage 2 v gg 10 ? v ee + 40 v operating supply voltage 3 v ee ? 21 ?? 5v operating supply voltage 3 v off ? 21 v ee ? 15 v ee ? v ee + 10 v ? 15 < v ee < ? 5v ee ?? 5 v off ? v ee ? 5 v off ? 11 ? 21 ? 21 ? 15 ? 5 v ee usage range note) these ratings are guaranteed values when the standard panasonic package is used.
MN863440 9 sdf00033aem electrical characteristics (continued) 3. dc characteristics at v ss = 0 v, t opr = -20c to +75c item symbol condition min typ max unit operating supply current (v dd )i dd f fx = 15.7 khz ?? 800 a f dio = 60 hz v dd = 3.0 v operating supply current (v gg )i gg v off = ? 15 v ?? 300 a v gg = 15 v with no output load standby mode current i ds in standby mode ?? 600 a consumption (v dd )v dd = 3.0 v standby mode current i gs v off = ? 15 v ?? 100 a consumption (v gg )v gg = 15 v 1) input pins rl, fx, oe1 to oe3, mode1, mode2 high-level input voltage v ih1 0.8 v dd ? v dd v low-level input voltage v il1 0 ? 0.2 v dd v input leakage current i li1 ? 10 ? 10 a 2) pulled up input pins xdon high-level input voltage v ih2 0.8 v dd ? v dd v low-level input voltage v il2 0 ? 0.2 v dd v pull-up resistance r pu v dd = 3.0 v 10 ? 100 k ? 3) i/o pins dio1, dio2 high-level input voltage v ih3 0.8 v dd ? v dd v low-level input voltage v il3 0 ? 0.2 v dd v high-level output voltage v oh ? 100 av dd ? 0.4 ?? v low-level output voltage v ol 100 a ?? 0.4 v 4) lcd drive voltage input pin v off input leakage current v li1 ? 50 ? 50 a 5) lcd drive output pins x1 x263 output leakage current i lo1 ? 50 ? 50 a output on resistance ron-v gg v gg = 15 v 200 400 800 ? v off = ? 15 v v om = v gg ? 0.5 v v om is the x1 to x263 applied voltage. ron-v off v gg = 15 v 200 400 800 v ee = ? 15 v v off = ? 15 v v om = v off + 0.5 v v om is the x1 to x263 applied voltage. note) these ratings are guaranteed values when the standard panasonic package is used.
MN863440 10 sdf00033aem electrical characteristics (continued) 4. ac characteristics at v ss = 0 v, t opr = -20c to +75c item symbol condition min typ max unit clock period t fx 2.0 ?? s clock high-level pulse width t wh 700 ?? ns clock low-level pulse width t wl 700 ?? ns dio data setup time t su 300 ?? ns dio data hold time t h 300 ?? ns dio output delay time t pd1 cl = 50 pf ?? 600 ns xn output delay time t pd2 cl = 300 pf ?? 800 ns note) these ratings are guaranteed values when the standard panasonic package is used. ? ac characteristics timing charts fx 20% 20% 50% 50% 80% 80% 20% t wl v dd v ss v dd v ss v dd v ss v dd v ss v gg v off v gg v off t pd1 t pd1 t su t h t wh t fx dio input 80% 80% 60% 40% dio output xn n = 1 to 263 oem m = 1 to 3 20% 80% xn n = 1 to 263 40% t pd2 t pd2 60% t pd2 60% 40%
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) an export permit needs to be obtained from the competent authorities of the japanese govern- ment if any of the products or technologies described in this book and controlled under the "foreign exchange and foreign trade law" is to be exported or taken out of japan. (2) the technical information described in this book is limited to showing representative characteristics and applied circuits examples of the products. it neither warrants non-infringement of intellectual property right or any other rights owned by our company or a third party, nor grants any license. (3) we are not liable for the infringement of rights owned by a third party arising out of the use of the product or technologies as described in this book. (4) the products described in this book are intended to be used for standard applications or general electronic equipment (such as office equipment, communications equipment, measuring instru- ments and household appliances). consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. ? any applications other than the standard applications intended. (5) the products and product specifications described in this book are subject to change without no- tice for modification and/or improvement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (6) when designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage, and heat radiation characteristics. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (7) when using products for which damp-proof packing is required, observe the conditions (including shelf life and amount of time let standing of unsealed items) agreed upon when specification sheets are individually exchanged. (8) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of matsushita electric industrial co., ltd. 2002 may

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