october 2000 ? 2000 fairchild semiconductor corporation fdn5618p rev c(w) fdn5618p 60v p-channel logic level powertrench ? ? ? ? mosfet general description this 60v p-channel mosfet uses fairchild?s high voltage powertrench process. it has been optimized for power management applications. applications ? dc-dc converters ? load switch ? power management features ? ?1.25 a, ?60 v. r ds(on) = 0.170 ? @ v gs = ?10 v r ds(on) = 0.230 ? @ v gs = ?4.5 v ? fast switching speed ? high performance trench technology for extremely low r ds(on) g d s supersot -3 tm d s g absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage ?60 v v gss gate-source voltage 20 v i d drain current ? continuous (note 1a) ?1.25 a ? pulsed ?10 maximum power dissipation (note 1a) 0.5 p d (note 1b) 0.46 w t j , t stg operating and storage junction temperature range ?55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 250 c/w r jc thermal resistance, junction-to-case (note 1) 75 c/w package marking and ordering information device marking device reel size tape width quantity 618 fdn5618p 7?? 8mm 3000 units fdn5618p
fdn5618p rev c(w) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = ?250 a ?60 v ? bv dss === ? t j breakdown voltage temperature coefficient i d = ?250 a,referenced to 25 c ?58 mv/ c i dss zero gate voltage drain current v ds = ?48 v, v gs = 0 v ?1 a i gssf gate?body leakage, forward v gs = 20v, v ds = 0 v 100 na i gssr gate?body leakage, reverse v gs = ?20 v v ds = 0 v ?100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = ?250 a ?1 ?1.6 ?3 v ? v gs(th) === ? t j gate threshold voltage temperature coefficient i d = ?250 a,referenced to 25 c 4 mv/ c r ds(on) static drain?source on?resistance v gs = ?10 v, i d = ?1.25 a v gs = ?4.5 v, i d = ?1.0 a v gs = ?10 v, i d = ?3 a t j =125 c 0.148 0.185 0.245 0.170 0.230 0.315 ? i d(on) on?state drain current v gs = ?10 v, v ds = ?5 v ?5 a g fs forward transconductance v ds = ?5 v, i d = ?1.25 a 4.3 s dynamic characteristics c iss input capacitance 430 pf c oss output capacitance 52 pf c rss reverse transfer capacitance v ds = ?30 v, v gs = 0 v, f = 1.0 mhz 19 pf switching characteristics (note 2) t d(on) turn?on delay time 6.5 13 ns t r turn?on rise time 8 16 ns t d(off) turn?off delay time 16.5 30 ns t f turn?off fall time v dd = ?30 v, i d = ?1 a, v gs = ?10 v, r gen = 6 ? 48ns q g total gate charge 8.6 13.8 nc q gs gate?source charge 1.5 nc q gd gate?drain charge v ds = ?30 v, i d = ?1.25 a, v gs = ?10 v 1.3 nc drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current ?0.42 a v sd drain?source diode forward voltage v gs = 0 v, i s = ?0.42 (note 2) ?0.7 ?1.2 v notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 250 c/w when mounted on a 0.02 in 2 pad of 2 oz. copper. b) 270c/w when mounted on a minimum pad. scale 1 : 1 on letter size paper 2. pulse test: pulse width = 300 s, duty cycle = 2.0 fdn5618p
fdn5618p rev c(w) typical characteristics 0 1 2 3 4 5 01234 -v ds , drain-source voltage (v) -4.5v - 6.0v -2.5v -4.0v -3.5v v gs = -10v -3.0v 0.8 1 1.2 1.4 1.6 1.8 2 2.2 012345 -i d , drain current (a) v gs = -3.0v -4.0v -1 0 v -4.5v -6.0v -3.5v figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. 0.8 0.9 1 1.1 1.2 1.3 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) i d = -1.25a v gs = -10v 0.1 0.2 0.3 0.4 0.5 0.6 246810 -v gs , gate to source voltage (v) i d = -0.65 a t a = 125 o c t a = 25 o c figure 3. on-resistance variation withtemperature. figure 4. on-resistance variation with gate-to-source voltage. 0 1 2 3 4 5 6 11.522.533.54 -v gs , gate to source voltage (v) t a = 125 o c 25 o c v ds = - 5v -55 o c 0.0001 0.001 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -v sd , body diode forward voltage (v) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. fdn5618p
fdn5618p rev c(w) typical characteristics 0 2 4 6 8 10 0246810 q g , gate charge (nc) i d = -1.25a v ds = -20v -40v -30v 0 100 200 300 400 500 600 700 024681012 -v ds , drain to source voltage (v) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.001 0.01 0.1 1 10 100 0.1 1 10 100 -v ds , drain-source voltage (v) -i d , drain current (a ) dc 10s 1s 100ms r ds(on) limit v gs =-10v single pulse r ja = 270 o c/w t a = 25 o c 10ms 1ms 0 5 10 15 20 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) single pulse r ja = 270c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r ja (t) = r(t) + r ja r ja = 270 c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p(pk) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1b. transient thermal response will change depending on the circuit board design. fdn5618p
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