symbol v ds v gs i dm i ar e ar t j , t stg symbol typ ma x 14.2 17 42 50 r jc 1.2 1.5 a t a =70c -12 continuous drain current t a =25c i dsm -15 a repetitive avalanche energy l=0.1mh c 146 mj maximum junction-to-case steady-state c/w thermal characteristics parameter units maximum junction-to-ambient a t 10s r ja c/w c/w absolute maximum ratings t a =25c unless otherwise noted v v 20 pulsed drain current c power dissipation b t c =25c gate-source voltage drain-source voltage maximum junction-to-ambient a d steady-state -30 -23 -160 avalanche current c -54 power dissipation a t a =25c p dsm continuous drain current g maximum units parameter t c =25c t c =100c -30 w junction and storage temperature range a p d c 83 33 -55 to 150 t c =100c i d 2.5 w t a =70c 1.6 AON6405L features v ds (v) = -30v i d = -30a (v gs = -10v) r ds(on) < 7m ? (v gs = -10v) r ds(on) < 8m ? (v gs = -4.5v) the AON6405L combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) .this device is ideal for load switch and battery protection applications. top view g s s s d d d d dfn5x6 fits soic8 footprint ! g d s rg www.freescale.net.cn 1/5 p-channel enhancement mode field general description effect transistor symbol v ds v gs i dm i ar e ar t j , t stg symbol typ ma x 14.2 17 42 50 r t jc 1.2 1.5 a t a =70c -12 continuous drain current t a =25c i dsm -15 a repetitive avalanche energy l=0.1mh c 146 mj maximum junction-to-case steady-state c/w thermal characteristics parameter units maximum junction-to-ambient a t ? 10s r t ja c/w c/w absolute maximum ratings t a =25c unless otherwise noted v v 20 pulsed drain current c power dissipation b t c =25c gate-source voltage drain-source voltage maximum junction-to-ambient a d steady-state -30 -23 -160 avalanche current c -54 power dissipation a t a =25c p dsm continuous drain current g maximum units parameter t c =25c t c =100c -30 w junction and storage temperature range a p d c 83 33 -55 to 150 t c =100c i d 2.5 w t a =70c 1.6 AON6405L p-channel enhancement mode field effect transistor features v ds (v) = -30v i d = -30a (v gs = -10v) r ds(on) < 7m : (v gs = -10v) r ds(on) < 8m : (v gs = -4.5v) esd protected! 100% uis tested! general description the AON6405L combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) .this device is ideal for load switch and battery protection applications. -rohs compliant -halogen free top view g s s s d d d d dfn5x6 fits soic8 footprint ! g d s rg alpha & omega semiconductor, ltd. www.aosmd.com
symbol min typ max units bv dss -30 v -1 t j =55c -5 i gss 10 a v gs(th) gate threshold voltage -0.8 -1.2 -1.6 v i d(on) -160 a 5.5 7 t j =125c 7 8.5 6.1 8 m ? g fs 70 s v sd -0.65 -1 v i s -50 a c iss 4580 5500 pf c oss 755 pf c rss 564 pf r g 160 210 ? q g (-10v) 87 105 nc q g (-4.5v) 41 nc q gs 12.8 nc q gd 17 nc t d(on) 180 ns t r 260 ns t d(off) 1.2 s t f 9.7 s t rr 32 40 ns q rr 77 nc components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. total gate charge v gs =-10v, v ds =-15v, i d =-20a gate drain charge v gs =0v, v ds =-15v, f=1mhz switching parameters total gate charge gate source charge gate resistance v gs =0v, v ds =0v, f=1mhz output capacitance turn-on rise time turn-off delaytime v gs =-10v, v ds =-15v, r l =0.75 ? , r gen =3 ? turn-off fall time turn-on delaytime r ds(on) static drain-source on-resistance forward transconductance diode forward voltage v gs =-4.5v, i d =-20a i s =-1a,v gs =0v v ds =-5v, i d =-20a i dss zero gate voltage drain current a v ds =0v, v gs = 16v gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage on state drain current i d =-250 a, v gs =0v v gs =-10v, v ds =-5v v ds =v gs i d =-250 a v ds =-30v, v gs =0v body diode reverse recovery time body diode reverse recovery charge i f =-20a, di/dt=300a/ s v gs =-10v, i d =-20a reverse transfer capacitance i f =-20a, di/dt=300a/ s maximum body-diode continuous current input capacitance dynamic parameters m ? a: the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c. repetitive rating, pulse width limited by junction temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =150c. the soa curve provides a single pulse rating. g. the maximum current rating is limited by bond-wires. h. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. rev 0: july 2008 www.freescale.net.cn 2/5 AON6405L p-channel enhancement mode field effect transistor AON6405L symbol min typ max units bv dss -30 v -1 t j =55c -5 i gss 10 p a v gs(th) gate threshold voltage -0.8 -1.2 -1.6 v i d(on) -160 a 5.5 7 t j =125c 7 8.5 6.1 8 m : g fs 70 s v sd -0.65 -1 v i s -50 a c iss 4580 5500 pf c oss 755 pf c rss 564 pf r g 160 210 : q g (-10v) 87 105 nc q g (-4.5v) 41 nc q gs 12.8 nc q gd 17 nc t d(on) 180 ns t r 260 ns t d(off) 1.2 p s t f 9.7 p s t rr 32 40 ns q rr 77 nc components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. total gate charge v gs =-10v, v ds =-15v, i d =-20a gate drain charge v gs =0v, v ds =-15v, f=1mhz switching parameters total gate charge gate source charge gate resistance v gs =0v, v ds =0v, f=1mhz output capacitance turn-on rise time turn-off delaytime v gs =-10v, v ds =-15v, r l =0.75 : , r gen =3 : turn-off fall time turn-on delaytime r ds(on) static drain-source on-resistance forward transconductance diode forward voltage v gs =-4.5v, i d =-20a i s =-1a,v gs =0v v ds =-5v, i d =-20a i dss zero gate voltage drain current p a v ds =0v, v gs = 16v gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage on state drain current i d =-250 p a, v gs =0v v gs =-10v, v ds =-5v v ds =v gs i d =-250 p a v ds =-30v, v gs =0v body diode reverse recovery time body diode reverse recovery charge i f =-20a, di/dt=300a/ p s v gs =-10v, i d =-20a reverse transfer capacitance i f =-20a, di/dt=300a/ p s maximum body-diode continuous current input capacitance dynamic parameters m : a: the value of r t ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the power dissipation p dsm is based on r t ja and the maximum allowed junction temperature of 150c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c. repetitive rating, pulse width limited by junction temperature t j(max) =150c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r t ja is the sum of the thermal impedence from junction to case r t jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 p s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =150c. the soa curve provides a single pulse rating. g. the maximum current rating is limited by bond-wires. h. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. rev 0: july 2008 alpha & omega semiconductor, ltd. www.aosmd.com
typical electrical and thermal characteristic s 3 4 5 6 7 8 0 5 10 15 20 25 30 -i d (a) figure 3: on-resistance vs. drain current and gate voltage(note e) r ds(on) (m ? ) 0 20 40 60 80 100 01234 -v gs (volts) figure 2: transfer characteristics(note e) -i d (a) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 -v sd (volts) figure 6: body-diode characteristics(note e) -i s (a) 25c 125 c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance i d =-20a v gs =-4.5v v gs =-10v 0 4 8 12 16 20 246810 -v gs (volts) figure 5: on-resistance vs. gate-sourc e voltage(note e) r ds(on) (m ? ) 25c 125 c v ds =-5v v gs =-4.5v v gs =-10 v i d =-20a 25 c 125c 0 20 40 60 80 100 120 140 160 012345 -v ds (volts) figure 1: on-region characteristics(note e) -i d (a) -10v -3v v gs =-2.5v -3.5v -4v -5v www.freescale.net.cn 3/5 AON6405L p-channel enhancement mode field effect transistor AON6405L typical electrical and thermal characteristic s 3 4 5 6 7 8 0 5 10 15 20 25 30 -i d (a) figure 3: on-resistance vs. drain current and gate voltage(note e) r ds(on) (m : ) 0 20 40 60 80 100 01234 -v gs (volts) figure 2: transfer characteristics(note e) -i d (a) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 -v sd (volts) figure 6: body-diode characteristics(note e) -i s (a) 25c 125 c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance i d =-20a v gs =-4.5v v gs =-10v 0 4 8 12 16 20 246810 -v gs (volts) figure 5: on-resistance vs. gate-sourc e voltage(note e) r ds(on) (m : ) 25c 125 c v ds =-5v v gs =-4.5v v gs =-10 v i d =-20a 25 c 125c 0 20 40 60 80 100 120 140 160 012345 -v ds (volts) figure 1: on-region characteristics(note e) -i d (a) -10v -3v v gs =-2.5v -3.5v -4v -5v alpha & omega semiconductor, ltd. www.aosmd.com
typical electrical and thermal characteristics 0 2 4 6 8 10 0 20406080100 q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 25 30 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) z jc normalized transient thermal resistance c oss c r ss v ds =-15v i d =-20a single pulse d=t on /t t j,pk =t c +p dm .z jc .r jc r jc =1.5c/w t o n t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t c =25c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 -v ds (volts) -i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 s 10ms 1ms r ds(on) limited t j(max) =150c t c =25c 10 0 s 10s d c www.freescale.net.cn 4/5 AON6405L p-channel enhancement mode field effect transistor AON6405L typical electrical and thermal characteristics 0 2 4 6 8 10 0 20406080100 q g (nc) figure 7: gate-charge characteristics -v gs (volts) 0 1000 2000 3000 4000 5000 6000 7000 0 5 10 15 20 25 30 -v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) z t jc normalized transient thermal resistance c oss c r ss v ds =-15v i d =-20a single pulse d=t on /t t j,pk =t c +p dm .z t jc .r t jc r t jc =1.5c/w t o n t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150c t c =25c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 -v ds (volts) -i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 p s 10ms 1ms r ds(on) limited t j(max) =150c t c =25c 10 0 p s 10s d c alpha & omega semiconductor, ltd. www.aosmd.com
vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd vgs id vgs rg dut vdc vgs vds id vgs unclamped inductive switching (uis) test circuit & waveforms vds l - + 2 e = 1/2 li ar ar bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds tt t t t t 90% 10% r on d(off) f off d(on) www.freescale.net.cn 5/5 AON6405L p-channel enhancement mode field effect transistor AON6405L vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd vgs id vgs rg dut vdc vgs vds id vgs unclamped inductive switching (uis) test circuit & waveforms vds l - + 2 e = 1/2 li ar ar bv dss i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds tt t t t t 90% 10% r on d(off) f off d(on) alpha & omega semiconductor, ltd. www.aosmd.com
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