em microelectronic ? marin sa theseus? gold 256 3g EMTCG256-3G copyright ? 2004, rev a, em microelectronic-marin sa 1 www.emmicroelectronic.com 256kb flash smart card ic + crypto environment voltage class a, b and c : 1.8v, 3-5v supply 10% -25c to +85c operating temperature max supply current 10 ma at 5.5 v and 30 mhz max supply current 6 ma at 3.3 v and 30 mhz max supply current 4 ma at 1.8 v and 10 mhz > 4 kv esd protection hbm cpu software compatible cmos 80x51 industry standard ?far? addressing support extending ?xdata? up to 8mb accelerated architecture with 16 bit cpu performance level linear code / data addressing (no bank switching) up to 30 mhz internal cpu clock idle modes idle and stop mode selectable modes nvm operation possible with cpu in idle mode io transmission and reception with cpu in idle mode max idle current 200 a cryptography resources des / tdes hardware accelerator cbc mode hardware acceleration hardware random number generator fips140-2 memory control memory management unit (mmu) + hw firewall memory physical access rights management extended addressing capability with java mode eeprom erase write control eeprom fast program in flash mode 40 s / byte eeprom multiple page erase up to 128 bytes eeprom fast write in flash mode otprom bank erase (32kb) flash block erase (2kb) i/o iso 7816-3 compliant electrical interface iso 7816-3 compliant reset and response t=0 t=1 protocols security otprom / flash block physical access rights crc16 module hardware accelerator iso3309 unique chip identification number notification of tampering out of frequency, voltage, temperature detection internal clock and voltage generation dpa/spa resistance mechanisms security target eal4+ memory 4kb xram +256b internal ram 128kb otprom 4 blocks of 32kb 64kb flash block 32 blocks of 2kb 64kb eeprom 10 year data retention >300k read write cycles delivery form backlapped and distressed 8? wafers to 180 m options: sawn wafers on frame, modules development kit emulation platform (eme4652) fully integrated in keil uvision2 debugger with all debugging facilities starter kit emsk4600 with uvision2 integration: otp, flash blocks, eeprom code download eeprom data download (personalization) applications mobile communication : gsm: phase 2, 2+ wib, ota, wlan gprs, umts, cdma, java card platform banking, health, loyalty, membership cards block diagram a, b, c on-chip voltage regulator reset control and power-on reset iso 7816-3 interface 3g mmu (memory management unit interface) 4096 bytes ram 128k bytes otprom 64k bytes eeprom 64k bytes flash blocks security module uvd / ovd utd / otd ufd / ofd dpa / spa protections random number generator des / tdes cbc / ebc charge pump: internal v pp generation crc16 iso 3309 power management system 30mhz on-chip oscillator controlled clock divider 256 bytes ram fast architecture 80x51 core internal v dd internal rst
em microelectronic ? marin sa theseus? gold 256 3g EMTCG256-3G copyright ? 2004, rev a, em microelectronic-marin sa 2 www.emmicroelectronic.com introduction EMTCG256-3G is a member of the theseus family of devices designed specifically for smart card applications. it is software compatible with the industry standard 8051 micro-controller, to guarantee the maximum availability of qualified software. the hardware implementation of the core is a modern design not relying on microcode, with an increase of up to 4 times on a standard 8051's clocks per instruction. security of the family of devices makes them particularly suitable in electronic commerce and sensitive data areas. this is accomplished in hardware, with not only protection against out of parameter operation of the device, but hardware memory management to protect against software security attacks. the cpu clock is derived from its own internal oscillator, so preventing attacks by clock manipulation, or extrapolating program execution by monitoring current variations on clock edges. the need to support the emerging multifunction cards requires that the device under software control can download an application and run it when the device is in the field embedded in a plastic card. this application can be in the form of a script to be executed by an interpreter or as a raw binary directly executed by the processor. the device has to be protected against the downloading of attack software designed to corrupt or uncover the working or data contained in the device. traditionally this has been a software function, which relies on the total integrity of the embedded software. the EMTCG256-3G implements the first level of protection in hardware. this maximizes the security of the device, and allows the reusability of developed certified code, by isolating it from the actual hardware implementation of the device. this protection mechanism allows for a secure operating system to be embedded into the device at manufacture, which has access rights to features of the device that are denied to applications that can be loaded into the device at manufacture or in the field. the secure operating system allocates to each application programme, areas of the memory resources of the device. the hardware then ensures that when the application code is executing only accesses to these designated spaces are made. an extension of application mode has been developed to facilitate java card virtual machine integration. with up to a 99kb (ram+flash+rom) of on chip memories EMTCG256-3G eradicates the need for memory bank switching either for data and code space. this is maximizing computing performances as well as code density of you application allowing smart card to integrate more features. in systems where application isolation is not needed, the security mechanism acts as a general protection unit trapping software errors. non volatiles memories the use of flash blocks of with 2kb increments configurable for code or data, allows to address different larger market range with a single product. serial interface EMTCG256-3G offers a unique serial interface compliant with the iso 7816-3 specification with several modes implemented allowing serial connections at 9600 up to 357k bits per second at 3.57mhz. EMTCG256-3G supports t=0 asynchronous half duplex character transmission protocol, t=1 asynchronous half duplex block transmission and a proprietary t=14 protocol used for fast loading of code into the otp by the card manufacturer. it handles minimum guard time requirements between characters specified by iso7816- 3 specification automatically. EMTCG256-3G is designed to be compatible with the iso7816-3 specification defining the characteristics of integrated circuit cards commonly referred to as smart cards. des/tdes high performance symmetric encryption / decryption algorithm can be achieved using des and triple des on chip hw accelerator, this engine could be used as well in ebc and cbc modes. the intrinsic security of this des implementation can be reinforced using spa/dpa protection mechanisms to achieve very high level of security. random number generator the on chip random number generator is fully fips140-2 compliant, providing a rapid stream of truly random numbers. this allows use of the random numbers generated beyond just the provision of numbers for randomizing transmissions or generating keys. clocks EMTCG256-3G has its own internal oscillator this allows the core of the device to be independent of the external clock. the processor can also be clocked much faster than the io clk signal. this ensures the elimination of fraudulent atta cks involving frequency jitter and unequal mark space ratios. the internal clock generator is connected to the core via a divider that is under the control of the software. this allows the operating system writer to control the trade off between execution speed and power drawn by the device. extending battery life in hand help applications where slow interfaces are involved. anti tampering the EMTCG256-3G has extensive anti tampering provision including the monitoring of the connection to the device to ensure that deviations beyond a prescribed criteria result in the device being closed down before its operating conditions are violated . on chip voltage regulators several on chip regulators isolate the various elements of the device from variations and fluctuations in the supply voltage. this allows elements to be characterized precisely, as they operate at one fixed voltage, which in turn maximizes the endurance of the device. technology this product is using superior flash memory superflash technology licensed from sst and superflash is a registered trademark of sst (silicon storage technology inc.).
em microelectronic ? marin sa theseus? gold 256 3g EMTCG256-3G copyright ? 2004, rev a, em microelectronic-marin sa 3 www.emmicroelectronic.com technical data absolute maximum ratings parameter symbol limit values unit min typical max supply operating volt v cc -0.3 6 v voltage at remaining pin v pin v ss ? 0.3 v cc + 0.3 v power dissipation p tot +60 mw storage temperature i cci -40 +125 c dc characteristics parameter symbol limit values unit min typical max ambient temperature t a -25 +85 c supply voltage class a,b v cc 2.7 3 / 5 5.5 v supply voltage class c v cc 1.62 1.8 1.98 v supply current class b i cc 6 (note 1) ma supply current class c i cc 4 (note 1) ma supply current idle i cci 200 (note 2) a note 1: the supply current refers to clock frequency of 5 mhz note 2: the supply current at 3.3v and a clock frequency of 1 mhz, at +25c io pin parameter symbol conditions min max unit h input voltage v ih i ihmax = 20 a 0.7 * v cc v cc v l input voltage v il i il max = 20 a -0.3 0.8 v h output voltage (note 3) v oh i ohmax = +20 a 0.7 * v cc v cc v l output voltage v ol i olmax = -1ma 0 0.4 v rise fall time t r , t f c in = c out = 30pf 1 s note 3: assumes 20k ? pull up resistor on interface device clock (clk) parameter symbol condition min max unit h output voltage v oh i ohmax = +20 a v cc - 0.7 v cc v l output voltage v ol i olmax = -20 a 0 0.5 v rise fall time t r , t f c in = c out = 30pf 9% clk period reset(rst) parameter symbol condition min max unit h output voltage v oh i ohmax = +20 a v cc - 0.7 v cc v l output voltage v ol i olmax = -20 a 0 0.6 v rise fall time t r , t f c in = c out = 30pf 400 s ? em microelectronic-marin sa, 01/04, rev. a em microelectronic-marin sa cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an em microelectronic-marin sa product. em microelectronic-marin sa reserves the right to change the circuitry and specifications without notice at any time. you are strongly urged to ensure that the information given has not been superseded by a more up-to-date version.
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