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  specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. the products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage conditi on (temperature, operation time etc.) prior to the intended use. if there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 53012 sy 20120523-s00001/50912 sy 20120327-s00002 no.a2054-1/8 LV5725JA overview the LV5725JA is a step-down voltage switching regulator. functions ? wide input dynamic range: 4.5v to 50v. ? current mode type. ? built-in pulse-by-pulse ocp circuit: detecti on is on resistance of an external mos. ? over current protection: hiccup mode. ? thermal shutdown. ? load-independent soft start circuit ? on/off pin ? synchronous operation by external signal. ? power good pin ? external voltage is usable when output voltage is high. specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit supply voltage v in max 55 v allowable pin voltage v in , sw, out, pgood 55 v hdrv, cboot 61 v ldrv 6.0 v between cboot to sw between cboot to hdrv 6.0 v en, ilim v in +0.3 v between v in to ilim 1.0 v v dd 6.0 v ss, fb, comp,rt, sync v dd +0.3 v allowable power dissipation pd max mounted on a specified board. * 1.45 w operating temperature topr -40 to +85 c storage temperature tstg -55 to +150 c continued on next page. bi-cmos lsi step-down switching regulator orderin g numbe r : ena2054a
LV5725JA no.a2054-2/8 continued from preceding page. parameter symbol conditions ratings unit maximum junction temperature tj max 150 c * specified board : 58.0mm 78.0mm 1.6mm, fiberglass epoxy printed board. caution 1) absolute maximum ratings represent the va lue which cannot be exceeded for any length of time. caution 2) even when the device is used within the range of abso lute maximum ratings, as a result of continuous usage under hig h temperature, high current, high voltage, or drastic temperature change, the reliability of th e ic may be degraded. please contact us for the further detai ls. recommended operating range at ta = 25 c parameter symbol conditions ratings unit supply voltage range v in 4.5 to 50 v error amplifier input voltage v fb 0 to 1.6 v oscillatory frequency f osc 50 to 500 khz electrical characteristics at ta = 25 c, v in = 12v parameter symbol conditions ratings unit min typ max reference voltage block internal reference voltage vref incl uding offset of e/ a 0.698 0.708 0.718 v 5v power supply v dd i out = 0 to 5ma 4.7 5.2 5.7 v triangular waveform oscillator block oscillation frequency f osc rt= 56k ? 317 365 412 khz frequency variation f osc dv v in = 4.5 to 50v 1 % fold back detection voltage v osc fb after power is supplied to ss, voltage is detected fb. 0.5 v fold back oscillation frequency f osc fb rt= 56k ? , v fb = 0v 100 130 160 khz on/off circuit block ic start-up voltage v en on - 2.5 3.0 v hysteresis of startup voltage v en hys 0.3 0.6 - v soft start circuit block soft start source current i ss sc en > 3.0v 4 5 6 a soft start sink current i ss sk en < 1v, v dd = 5v 2 ma soft start end voltage v ss end 0.7 0.9 1.1 v uvlo circuit block uvlo voltage v uvlo 3.7 4.0 4.3 v hysteresis of uvlo v uvlo h 0.3 v error amplifier input bias current i ea in 100 na error amplifier gain g ea 1000 1400 1800 a/v range of common-mode input voltage v ea r v in = 4.5 to 50v 0 1.6 v output sink current i ea osk fb = 1.0v -100 a output source current i ea osc fb = 0v 100 a current detection amplifier gain gisns 2.4 over current limi ter circuit block reference current i lim -10% 20 +10% a over current detection comparator offset voltage v lim_ofs -5 +5 mv range of over current detection comparator common mode input v lim_cm v in -0.45 v in v pwm comparator input threshold voltage vt max duty cycle = d max , sw = v in 1.15 1.25 1.35 v vt0 duty cycle = 0%, sw = v in 0.5 0.6 0.7 v maximum on duty d max 92 % continued on next page.
LV5725JA no.a2054-3/8 continued from preceding page. parameter symbol conditions ratings unit min typ max power good power good ?l? sink current i pg l pgood = 5v 5 ma power good ?h? sink current i pg h pgood = 5v 1 a power good voltage pg thresh when fb voltage rises 0.612 v hysteresis of power good pg hys 12 mv output block high side output on resistance (upper) r onh _high cboot ? hdrv = -0.1v 12 high side output on resistance (lower) r onl _high hdrv ? sw = +0.1v 3.3 low side output on resistance (upper) r onh _low v dd ? ldrv = -0.1v 7.9 low side output on resistance (lower) r onl _low ldrv ? gnd = +0.1v 3.8 high side output on current (upper) i onh _high cboot ? hdrv = -4.5v 160 ma high side output on current (lower) i onl _high hdrv ? sw = +4.5v 330 ma low side output on current (upper) i onh _low v dd ? ldrv = -5.2v 190 ma low side output on current (lower) i onl _low ldrv ? gnd = +5.2v 250 ma entire device standby current i ccs en < 1v 1 a average current consumption i cca en > 3.0v 2.5 ma package dimensions unit : mm (typ) 3178b sanyo : ssop16(225mil) 5.2 4.4 6.4 0.22 0.65 (0.33) 18 9 16 0.5 0.15 1.5max 0.1 (1.3) pd max -- ta 0 0.75 0.5 1.0 1.5 1.45 2.0 --40 --20 40 60 20 8085 0 100 spesified bord:58.0 78.0 1.6mm 3 glass epoxy 4-layer board. allowable power dissipation, pd max - w ambient temperature, ta - c
LV5725JA no.a2054-4/8 block diagram sample application circuit 13 v in v in 14 ilim 15 ss/hiccup 16 fb comp 12 gnd 9 ldrv 11 v dd + - + - + - + - 0.7v sd + + - 0.9v sd + - 0.5v ocp comp current amp err amp ffold amp pwm comp shut down(sd) 1.1v 0.5v 5v 5v regulator reference voltage saw wave oscillator fosc forcec 1/3 s r q control logic v in uvlo tsd s r q en 5 6sw 8 hdrv 7 cboot 1 + - + - 0.612v 10 out rt 2 sync 3 pgood 4 ocp 1.3v hiccup comp c10 c4 c8 q1 q2 d1 l en ss/hiccup comp cboot c1 c9 c7 c2 c11 c5 c3 on/off v out c6 r5 r3 r1 r2 r4 hdrv sw ldrv fb v dd gnd v in ilim gnd 16 1 5 6 7 8 9 11 12 13 14 15 rt 2 r6 out 10 r7 pgood 4 sync sync 3
LV5725JA no.a2054-5/8 pin assignment pin function pin no. pin name description 1 comp error amplifier output pin. make sure to c onnect a phase compensation network between comp and gnd. 2 rt oscillating frequency setting pin. make sure to connect a resistor between this pin and gnd. 3 sync external synchronous signal input pin. 4 pgood power good pin. 5 en on/off pin. 6 sw this pin is connected to switching node. c onnect the source of nch mosfet to this pin. 7 cboot bootstrap capacitor connected pin. this pin is used as gat e driving power supply for external nch mosfet. make sure to connect a capacitor between cboot and sw. 8 hdrv external upper mosfet gate driving pin. 9 ldrv external lower mosfet gate driving pin. 10 out internal regulator power supply pin. this pin is connected to v out . 11 v dd power supply pin for gate drive of the external lower mos-fet. 12 gnd ground pin. gnd pin voltage is the reference for each reference voltage. 13 v in power supply pin. this pin is monitored by uvlo function. when the voltage of this pin becomes higher than 4.3v by uvlo function, the ic starts up and mode shifts to soft start operation. 14 ilim reference current pin for current detection. the inlet current of approx. 20 a flows into this pin. connect a resistor externally between this pin and vin and when the voltage supplied to sw pin is lower than the pin voltage of this resistor, the upper nch mosfet is turned off by current limiter comparator. this operation is reset at every pwm pulse. 15 ss/hiccup capacitor connection pin for soft start. this pin enables to charge the soft start capacitor by 5 a. (approx) when this pin turns approx. 0.9v, soft start period ends and frequency fold back function is activated. 16 fb error amplifier reverse input pin. converter operates to set this pin to 0. 708v. the output voltage divided by the extern al resistance is applied to this pin. after soft start, frequency fo ld back function operates when the voltage of this pin becomes 0.5v or lower. and oscillating frequency decreases together with fb voltage. 3 4 5 6 7 8 9 10 14 13 12 11 en rt pgood sw cboot hdrv out ss/hiccup v in gnd v dd ldrv LV5725JA top view 1 2 comp sync 16 15 fb ilim
LV5725JA no.a2054-6/8 i/o pin equivalent circuit chart pin no. pin no. equivalent circuit 1 comp 11 1 12 v dd comp gnd 2 rt 11 2 12 v dd rt gnd 3 sync 11 3 12 v dd sync gnd 4 pgood 11 4 12 v dd pgood gnd 5 en 11 5 12 v dd en gnd 6 sw 7 13 6 12 cboot v in sw gnd continued on next page.
LV5725JA no.a2054-7/8 continued from preceding page. pin no. pin no. equivalent circuit 7 cboot 7 13 6 cboot v in sw 11 v dd 8 ldrv 7 8 6 12 cboot hdrv sw gnd 9 hdrv 11 9 12 v dd ldrv gnd 10 out 10 13 12 out v in gnd 11 v dd 11 v dd 13 12 v in gnd 11 v dd 12, 13 gnd, v in 13 12 v in gnd 1pf 14 ilim 13 14 12 v in ilim gnd continued on next page.
LV5725JA ps no.a2054-8/8 continued from preceding page. pin no. pin no. equivalent circuit 15 ss/hiccup 11 15 12 v dd ss/hiccup gnd 16 fb 11 16 12 v dd fb gnd this catalog provides information as of may, 2012. specifications and inform ation herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. regarding monolithic semiconductors, if you should intend to use this ic continuously under high temperature, high current, high voltage, or drastic temperature change, even if it is used within the range of absolute maximum ratings or operating conditions, there is a possibility of decrease reliability. please contact us for a confirmation. sanyo semiconductor co.,ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. it is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equ ipment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above.


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