n-channel fredfet absolute maximum ratings thermal and mechanical characteristics g d s single die fredfet unit a v mj a unit w c/w c oz g inlbf nm ratings 18 11 70 30 797 9 min typ max 500 0 .25 0.11 -55 150 300 0 .22 6.2 10 1.1 parameter continuous drain current @ t c = 25c continuous drain current @ t c = 100c pulsed drain current 1 gate-source voltage single pulse avalanche energy 2 avalanche current, repetitive or non-repetitive characteristic total power dissipation @ t c = 25c junction to case thermal resistance case to sink thermal resistance, flat, greased surface operating and storage junction temperature range soldering temperature for 10 seconds (1.6mm from case) package weight mounting torque ( to-247 package), 6-32 or m3 screw symbol i d i dm v gs e as i ar symbol p d r jc r cs t j ,t stg t l w t torque typical applications ? zvs phase shifted and other full bridge ? half bridge ? pfc and other boost converter ? buck converter ? single and two switch forward ? flyback features ? fast switching with low emi ? low t rr for high reliability ? ultra low c rss for improved noise immunity ? low gate charge ? avalanche energy rated ? rohs compliant to-247 d 3 pak apt17f80b APT17F80S 800v, 18a, 0.58? max, t rr 250ns apt17f80b APT17F80S power mos 8 ? is a high speed, high voltage n-channel switch-mode power mosfet. this 'fredfet' version has a drain-source (body) diode that has been opti - mized for high reliability in zvs phase shifted bridge and other circuits through reduced t rr , soft recovery, and high recovery dv/dt capability. low gate charge, high gain, and a greatly reduced ratio of c rss /c iss result in excellent noise immunity and low switching loss. the intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low emi and reliable paralleling, even when switching at very high frequency. microsemi website - http://www.microsemi.com 050-8165 rev b 04-2009
static characteristics t j = 25c unless otherwise specifed dynamic characteristics t j = 25c unless otherwise specifed source-drain diode characteristics 1 repetitive rating: pulse width and case temperature limited by maximum junction temperature. 2 starting at t j = 25c, l = 19.7mh, r g = 25?, i as = 9a. 3 pulse test: pulse width < 380s, duty cycle < 2%. 4 c o(cr) is defned as a fxed capacitance with the same stored charge as c oss with v ds = 67% of v (br)dss . 5 c o(er) is defned as a fxed capacitance with the same stored energy as c oss with v ds = 67% of v (br)dss . to calculate c o(er) for any value of v ds less than v (br)dss, use this equation: c o(er) = -3.43e-8/v ds ^2 + 1.44e-8/v ds + 5.38e-11. 6 r g is external gate resistance, not including internal gate resistance or gate driver impedance. (mic4452) microsemi reserves the right to change, without notice, the specifcations and information contained herein. g d s unit v v/c ? v mv/c a na unit s pf nc ns unit a v ns c a v/ns min typ max 800 0 .87 0.42 0.58 2.5 4 5 -10 250 1000 100 min typ max 18 70 1.0 216 250 371 450 0.97 2.33 9 14 25 min typ max 17 3757 64 374 177 88 122 20 62 21 31 93 27 test conditions v gs = 0v , i d = 250a reference to 25c, i d = 250a v gs = 10v , i d = 9a v gs = v ds , i d = 1ma v ds = 533v t j = 25c v gs = 0v t j = 125c v gs = 30v test conditions mosfet symbol showing the integral reverse p-n junction diode (body diode) i sd = 9a , t j = 25c, v gs = 0v t j = 25c t j = 125c i sd = 9a 3 t j = 25c di sd / dt = 100a/s t j = 125c v dd = 100v t j = 25c t j = 125c i sd 9a, di/dt 1000a/s, v dd = 400v, t j = 125c test conditions v ds = 50v , i d = 9a v gs = 0v , v ds = 25v f = 1mhz v gs = 0v , v ds = 0v to 400v v gs = 0 to 10v , i d = 9a, v ds = 400v resistive switching v dd = 533v , i d = 9a r g = 2.2? 6 , v gg = 15v parameter drain-source breakdown voltage breakdown voltage temperature coeff cient drain-source on resistance 3 gate-source threshold voltage threshold voltage temperature coeffcient zero gate voltage drain current gate-source leakage current parameter continuous source current (body diode) pulsed source current (body diode) 1 diode forward voltage reverse recovery time reverse recovery charge reverse recovery current peak recovery dv/dt parameter forward transconductance input capacitance reverse transfer capacitance output capacitance effective output capacitance, charge related effective output capacitance, energy related total gate charge gate-source charge gate-drain charge turn-on delay time current rise time preliminary 05-2008 turn-off delay time current fall time symbol v br(dss) ?v br(dss) /?t j r ds(on) v gs(th) ?v gs(th) /?t j i dss i gss symbol i s i sm v sd t rr q rr i rrm dv/dt symbol g fs c iss c rss c oss c o(cr) 4 c o(er) 5 q g q gs q gd t d(on) t r t d(off) t f 050-8165 rev b 04-2009 apt17f80b_s
v gs = 6, 7, 8 & 9v 4.5v t j = 125c t j = 25c t j = -55c v gs = 10v 5v v ds > i d(on) x r ds(on) max. 250sec. pulse test @ <0.5 % duty cycle normalized to v gs = 10v @ 9a t j = 125c t j = 25c t j = -55c c oss c iss i d = 9a v ds = 960v v ds = 240v v ds = 600v t j = 150c t j = 25c t j = 125c t j = 150c c rss t j = 125c t j = 25c t j = -55c v gs , gate-to-source voltage (v) g fs , transconductance r ds(on) , drain-to-source on resistance i d , drain current (a) i sd, reverse drain current (a) c, capacitance (pf) i d , drain current (a) i d , drian current (a) v ds(on) , drain-to-source voltage (v) v ds , drain-to-source voltage (v) figure 1, output characteristics figure 2, output characteristics t j , junction temperature (c) v gs , gate-to-source voltage (v) figure 3, r ds(on) vs junction temperature figure 4, transfer characteristics i d , drain current (a) v ds , drain-to-source voltage (v) figure 5, gain vs drain current figure 6, capacitance vs drain-to-source voltage q g , total gate charge (nc) v sd , source-to-drain voltage (v) figure 7, gate charge vs gate-to-source voltage figure 8, reverse drain current vs source-to-drain voltage 0 5 10 15 20 25 30 0 5 10 15 20 25 30 -55 -25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 12 0 200 400 600 800 1000 0 20 40 60 80 100 120 140 160 180 200 0 0.2 0.4 0.6 0.8 1.0 1.2 60 50 40 30 20 10 0 3.0 2.5 2.0 1.5 1.0 0.5 0 25 20 15 10 5 0 16 14 12 10 8 6 4 2 0 20 15 10 5 0 60 50 40 30 20 10 0 10,000 1,000 100 10 60 50 40 30 20 10 0 apt17f80b_s 050-8165 rev b 04-2009
d 3 pak package outline to-247 (b) package outline e1 100% sn plated 15.49 (.610) 16.26 (.640) 5.38 (.212) 6.20 (.244) 6.15 (.242) bsc 4.50 (.177) max. 19.81 (.780) 20.32 (.800) 20.80 (.819) 21.46 (.845) 1.65 (.065) 2.13 (.084) 1.01 (.040) 1.40 (.055) 3.50 (.138) 3.81 (.150) 2.87 (.113) 3.12 (.123) 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 2.21 (.087) 2.59 (.102) 0.40 (.016) 0.79 (.031) drai n drai n source gate 5.45 (.215) bsc dimensions in millimeters and (inches ) 2-plcs. 15.95 (.628) 16.05(.632) 1.22 (.048) 1.32 (.052) 5.45 (.215) bsc {2 plcs. } 4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 2.67 (.105) 2.84 (.112) 0.46 (.018) {3 plcs} 0.56 (.022) dimensions in millimeters (inches) heat sink (drain) and leads are plated 3.81 (.150) 4.06 (.160) (base of lead) drai n (heat sink) 1.98 (.078) 2.08 (.082) gate drain source 0.020 (.001) 0.178 (.007) 1.27 (.050) 1.40 (.055) 11.51 (.453) 11.61 (.457) 13.41 (.528) 13.51(.532) revised 8/29/97 1.04 (.041) 1.15(.045) 13.79 (.543) 13.99(.551) revised 4/18/95 microsemis products are covered by one or more of u.s. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157,886 6,939,743 7,342,262 and foreign patents. us and foreign patents pending. all rights reserved. 1ms 100ms r ds(on) 0.5 single pulse 0.1 0.3 0.7 0.05 d = 0.9 scaling for different case & junction temperatures: i d = i d(t c = 25 c) *( t j - t c )/125 peak t j = p dm x z jc + t c duty factor d = t 1 / t 2 t 2 t 1 p dm note : t 1 = pulse duration dc line 100s i dm 10ms 13s 100s i dm 100ms 10ms 13s r ds(on) dc line t j = 150c t c = 25c 1ms i d , drain current (a) v ds , drain-to-source voltage (v) v ds , drain-to-source voltage (v) figure 9, forard safe operating area figure 10, maximum forard safe operating area z jc , thermal impedance (c/w) 10 -5 10 -4 10 -3 10 -2 10 -1 1.0 rectangular pulse duration (seconds) figure 11. maximum effective transient thermal impedance junction-to-case vs pulse duration i d , drain current (a) 1 10 100 1000 1 10 100 1000 100 10 1 0.1 0.25 0.20 0.15 0.10 0.05 0 100 10 1 0.1 apt17f80b_s t j = 125c t c = 75c 050-8165 rev b 04-2009
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