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GS74117Ax 256k x 16 4mb asynchronous sram 8, 10, 12 ns 3.3 v v dd center v dd and v ss fp-bga commercial temp industrial temp rev: 1.05 12/2004 1/12 ? 2001, gsi technology specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. features ? fast access time: 8, 10, 12 ns ? cmos low power operation: 130/105/95 ma at minimum cycle time ? single 3.3 v power supply ? all inputs and outputs are ttl-compatible ? byte control ? fully static operation ? industrial temperature option: ?40 to 85c ? package: x: 6 mm x 10 mm fine pitch ball grid array package gx: pb-free 6 mm x 10 mm fine pitch ball grid array package description the GS74117A is a high speed cmos static ram organized as 262,144 words by 16 bits. stat ic design eliminates the need for external clocks or timing strobes. the gs operates on a single 3.3 v power supply and all inputs and outputs are ttl- compatible. the GS74117A is available in a 6 x 10 mm fine pitch bga package. fine pitch bga 256k x 16 bump configuration package x 6 x 10 mm bump pitch top view pin descriptions symbol description a 0 ?a 17 address input dq 1 ?dq 16 data input/output ce chip enable input lb lower byte enable input (dq1 to dq8) ub upper byte enable input (dq9 to dq16) we write enable input oe output enable input v dd +3.3 v power supply v ss ground nc no connect 123456 alb oe a 0 a 1 a 2 nc bdq 1 ub a 3 a 4 ce dq 16 cdq 3 dq 2 a 5 a 6 dq 15 dq 14 dv ss dq 4 a 17 a 7 dq 13 v dd ev dd dq 5 nc a 16 dq 12 v ss fdq 6 dq 7 a 8 a 9 dq 10 dq 11 gdq 8 nc a 10 a 11 we dq 9 hnca 12 a 13 a 14 a 15 nc
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 2/12 ? 2001, gsi technology x: ?h? or ?l? truth table ce oe we lb ub dq 1 to dq 8 dq 9 to dq 16 v dd current h x x x x not selected not selected isb 1 , isb 2 llh l l read read i dd l h read high z h l high z read lxl ll write write l h write not write, high z h l not write, high z write l h h x x high z high z l x x h h high z high z memory array row decoder column decoder address input buffer control i/o buffer a 0 ce we oe dq 1 a 17 dq 16 ub _____ block diagram
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 3/12 ? 2001, gsi technology note: permanent device damage may occur if absolute maximum ratings ar e exceeded. functional operation shall be restricted to recomme nded operating conditions. exposure to higher than recommended voltages for extended peri ods of time could affect device reliability . notes: 1. input overshoot voltage should be less than v dd +2 v and not exceed 20 ns. 2. input undershoot voltage should be greater than ?2 v and not exceed 20 ns. absolute maximum ratings parameter symbol rating unit supply voltage v dd ?0.5 to +4.6 v input voltage v in ?0.5 to v dd +0.5 ( 4.6 v max.) v output voltage v out ?0.5 to v dd +0.5 ( 4.6 v max.) v allowable power dissipation pd 0.7 w storage temperature t stg ?55 to 150 o c recommended oper ating conditions parameter symbol min typ max unit supply voltage for -8/-10/-12 v dd 3.0 3.3 3.6 v input high voltage v ih 2.0 ? v dd +0.3 v input low voltage v il ?0.3 ? 0.8 v ambient temperature, commercial range t ac 0?70 o c ambient temperature, industrial range t a i ?40 ? 85 o c
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 4/12 ? 2001, gsi technology notes: 1. tested at t a = 25c, f = 1 mhz 2. these parameters are sampled and are not 100% tested. capacitance parameter symbol test condition max unit input capacitance c in v in = 0 v 5 pf output capacitance c out v out = 0 v 7 pf dc i/o pin characteristics parameter symbol test conditions min max input leakage current i il v in = 0 to v dd ? 1 ua 1 ua output leakage current i lo output high z v out = 0 to v dd ?1 ua 1 ua output high voltage v oh i oh = ?4 ma 2.4 ? output low voltage v ol i lo = +4 ma ? 0.4 v power supply currents parameter symbol test conditions 0 to 70c ?40 to 85c unit 8 ns 10 ns 12 ns 8 ns 10 ns 12 ns operating supply current i dd ce v il all other inputs v ih or v il min. cycle time i out = 0 ma 130 105 90 140 115 100 ma standby current i sb1 ce v ih all other inputs v ih or v il min. cycle time 30 25 22 40 35 32 ma standby current i sb2 ce v dd ? 0.2 v all other inputs v dd ? 0.2 v or 0.2 v 10 20 ma
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 5/12 ? 2001, gsi technology ac test conditions dq vt = 1.4 v 50 ? 30pf 1 dq 3.3 v output load 1 output load 2 589 ? 434 ? 5pf 1 notes: 1. include scope and jig capacitance. 2. test conditions as specified with output loading as shown in fig. 1 unless otherwise noted. 3. output load 2 for t lz , t hz , t olz and t ohz parameter conditions input high level v ih = 2.4 v input low level v il = 0.4 v input rise time tr = 1 v/ns input fall time tf = 1 v/ns input reference level 1.4 v output reference level 1.4 v output load fig. 1& 2
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 6/12 ? 2001, gsi technology ac characteristics * these parameters are sampled and are not 100% tested. read cycle 1: ce = oe = v il , we = v ih , ub and, or lb = v il read cycle parameter symbol -8 -10 -12 unit minmaxminmaxminmax read cycle time t rc 8 ? 10 ? 12 ? ns address access time t aa ? 8 ? 10 ? 12 ns chip enable access time (ce )t ac ? 8 ? 10 ? 12 ns byte enable access time (ub , lb )t ab ?3.5?4?5 ns output enable to output valid (oe )t oe ?3.5?4?5 ns output hold from address change t oh 3?3?3?ns chip enable to output in low z (ce ) t lz * 3?3?3?ns output enable to output in low z (oe ) t olz * 0?0?0?ns byte enable to output in low z (ub , lb ) t blz * 0?0?0?ns chip disable to output in high z (ce ) t hz * ?4?5?6 ns output disable to output in high z (oe ) t ohz * ?3.5?4?5 ns byte disable to output in high z (ub , lb ) t bhz * ?3.5?4?5 ns t aa t oh t rc address data out previous data data valid
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 7/12 ? 2001, gsi technology read cycle 2: we = v ih * these parameters are sampled and are not 100% tested. write cycle parameter symbol -8 -10 -12 unit min max min max min max write cycle time twc 8 ? 10 ? 12 ? ns address valid to end of write taw 5.5 ? 7 ? 8 ? ns chip enable to end of write tcw 5.5 ? 7 ? 8 ? ns byte enable to end of write tbw 5.5 ? 7 ? 8 ? ns data set up time tdw 4 ? 4.5 ? 6 ? ns data hold time tdh 0 ? 0 ? 0 ? ns write pulse width twp 5.5 ? 7 ? 8 ? ns address set up time tas 0 ? 0 ? 0 ? ns write recovery time (we ) twr 0?0?0?ns write recovery time (ce )twr10?0?0?ns output low z from end of write twlz * 3?3?3?ns write to output in high z twhz * ?3.5? 4 ? 5 ns taa trc address tac tlz tab tblz toe tolz ce ub , lb oe data out thz tbhz tohz data valid high impedance
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 8/12 ? 2001, gsi technology write cycle 1: we control write cycle 2: ce control twc address ce ub , lb we data in oe data out taw tcw tbw tas twp twr tdw tdh twlz twhz data valid high impedance twc address ce ub , lb we data in oe data out taw twp tas tcw twr1 tdw tdh data valid high impedance tbw
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 9/12 ? 2001, gsi technology write cycle 3: ub , lb control twc address ce ub , lb we data in oe data out taw twp tas tcw twr1 tdw tdh data valid high impedance tbw
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 10/12 ? 2001, gsi technology package x?6 mm x 10 mm fp-bga pin a1 index a1 e top view side view d a aaa pin a1 index e1 bottom view d1 c e e solder ball f b symbol unit: mm a 1.100.10 a1 0.20~0.30 f b f 0.30~0.40 c 0.36(typ) d 10.00.05 d1 5.25 e 6.00.05 e1 3.75 e 0.75(typ) aaa 0.10 a b c d e f g h 1 2 3 4 5 6
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 11/12 ? 2001, gsi technology * customers requiring deliv ery in tape and reel should add the character ?t? to the end of the part number. for example: gs74117 ax-8t ordering information part number * package access time temp. range status GS74117Ax-8 6 mm x 10 mm bga 8 ns commercial GS74117Ax-10 6 mm x 10 mm bga 10 ns commercial GS74117Ax-12 6 mm x 10 mm bga 12 ns commercial GS74117Ax-8i 6 mm x 10 mm bga 8 ns industrial GS74117Ax-10i 6 mm x 10 mm bga 10 ns industrial GS74117Ax-12i 6 mm x 10 mm bga 12 ns industrial GS74117Agx-8 pb-free 6 mm x 10 mm bga 8 ns commercial GS74117Agx-10 pb-free 6 mm x 10 mm bga 10 ns commercial GS74117Agx-12 pb-free 6 mm x 10 mm bga 12 ns commercial GS74117Agx-8i pb-free 6 mm x 10 mm bga 8 ns industrial GS74117Agx-10i pb-free 6 mm x 10 mm bga 10 ns industrial GS74117Agx-12i pb-free 6 mm x 10 mm bga 12 ns industrial
GS74117Ax specifications cited are subject to change without notice . for latest documentation see http://www.gsitechnology.com. rev: 1.05 12/2004 12/12 ? 2001, gsi technology 4mb asynchronous datash eet revision history rev. code: old; new types of changes format or content page #/revisions/reason 74117a_r1 format/content ? creation of new datasheet 74117a_r1; 74117a_r1_01 content ? updated recommended operating conditions table on page 3 ? updated read cycle and write cycl e ac characteristics tables 74117a_r1_01; 74117a_r1_02 content ? removed 6 ns speed bin from entire document 74117a_r1_02; 74117a_r1_03 content ? removed 7 ns speed bin from entire document 74117a_r1_03; 74117a_r1_04 format ? updated format 74117a_r1_04; 74117a_r1_05 content ? added pb-free information for fp-bga package

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