? semiconductor components industries, llc, 2005 august, 2005 ? rev. 5 1 publication order number: nis6111/d nis6111 bers ic (better efficiency rectifier system) ultra efficient, high speed diode the nis6111 oring diode is a high speed, high efficiency, hybrid rectifier, designed for low voltage, high current systems, such as those required for today?s digital circuits. it couples a high speed integrated circuit with a power mosfet to create a diode with the same forward drop characteristics as a mosfet. it offers increased efficiency for switching power supplies as well as in oring diode applications. it offers a low on resistance that can be further reduced by the addition of external mosfets. it features the highest reverse recovery speed of any device in the industry. features ? low forward drop improves system efficiency ? ultra high speed ? can be used in high side and low side configurations ? 24 v rating ? allows use of external mosfets for extended current handling capacity ? pb ? free package is available* applications ? redundant power supplies for high ? availability systems ? static oring diodes ? low voltage, isolated outputs ? flyback, forward converter, half bridge converters pin assignment pin symbol function 1 anode power input connected to system 2 bias output of internal voltage regulator provides power for internal only. no external components required at this pin. 3 gate gate driver output for internal and external n ? channel mosfet 4 cathode power output connected to system 5 reg in input of internal voltage regulator *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. pllp32 case 488ac pin connections marking diagram nis6111= specific device code a = assembly location wl = wafer lot yy = year ww = work week g = pb ? free package 1 nis6111 awlyywwg ??????? ??????? ??????? ??????? ??????? ??????? ??????? ??????? ? ? ??? ? ? ? ? ? ? ?? ?? ?????? ?????? ?????? ?????? ?????? ?????? ?????? ?? ?? http://onsemi.com equivalent circuit cathode reg in gate anode ntd110n02r 4 3 5 1 device package shipping ? ordering information nis6111qpt1 pllp32 1500 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd801 1/d. NIS6111QPT1G pllp32 (pb ? free) 1500 tape & reel
nis6111 http://onsemi.com 2 maximum ratings (t j = 25 c, unless otherwise noted.) rating symbol value unit peak repetitive reverse voltage (v k to v a ) v rrm 24 v peak regulator input (reg in) v oltage vreg max 28 v average rectified forward current i fav 30 a non ? repetitive peak surge current i fsm 90 a analog die thermal resistance (min copper area) a j ? a 83 c/w mosfet die thermal resistance (min copper area) m j ? a 78 c/w analog die thermal resistance (junction ? to ? top of board) a j ? t 4.9 c/w mosfet die thermal resistance (junction ? to ? top of board) m j ? t 0.6 c/w analog die thermal resistance (junction ? to ? bottom of board) (note 4) a j ? b 30 c/w mosfet die thermal resistance (junction ? to ? bottom of board) (note 4) m j ? b 7.0 c/w storage temperature range t stg ? 55 to 150 c operating temperature range t j ? 40 to 125 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limi t values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be af fected.
nis6111 http://onsemi.com 3 electrical characteristics (t j = 25 c, reg in = 8.0 v, unless otherwise noted.) characteristic symbol min typ max unit synchronous rectifier on state conduction mode on resistance (i = 10 adc, v gs = 5.0 v) (i = 20 adc, v gs = 5.0 v) r on ? ? 3.7 4.7 4.5 ? m off state reverse leakage current (v r = 24 vdc) i dss ? ? 10 a reverse leakage current (v r = 24 vdc, t j = 125 c) i dss ? ? 100 a switching (see figures 1 and 3) (note 2) fet turn ? on time (i max = 3.0 a, i rev = 1.0 a, v rev = 5.0 v) t sat ? 45 ? ns turnoff propagation delay time (vds = v offset to i d = 0) t pd ? 35 ? ns body diode forward on ? voltage (notes 1 and 3) i = 10 adc, v gs = 0 v i = 20 adc, v gs = 0 v v sd ? ? 0.75 0.8 ? 1.2 vdc power supply (v r = 20 v, t j = 25 c) supply voltage (pin 2 to pin 1), internal bias v oltage v cc 4.8 5.0 5.2 v cap charge time (0.5 v initial charge, 5.0 v @ reg in, to 4.5 v, c = 0.22 f) t j = ? 40 c to 125 c t chg t chg 2.0 ? 3.7 4.7 5.0 ? s s headroom (for v cap = 4.7 v) v hd 1.0 1.27 1.5 v minimum duty cycle for operation (freq = 100 khz) (note 5) d min ? 2.0 ? % delay time (t amb = 20 c) t d 51 ns reg in voltage (pin 5 to pin 1) minimum voltage required for operation (v uvlo + v hd ) 4.8 v minimum v oltage required for full gate drive (v cc + v hd ) 6.3 v control circuit bias supply current (v bias = 5.0 v) i bias 0.8 1.3 1.8 ma input offset voltage i os ? 2.0 5.0 mv shutdown voltage (uvlo) v uvlo 3.35 3.55 3.65 v turn ? on voltage (uvlo) v to 3.65 3.81 3.95 v 1. pulse width 300 s, duty cycle 2%. 2. pulse width 2.0 s, duty cycle 5%. 3. switching characteristics are independent of operating junction temperature. 4. based on 0.062 fr4 board, double ? sided 1 oz copper. 5. minimum time required to recharge internal capacitor.
nis6111 http://onsemi.com 4 figure 1. switching w aveform v rev v fwd t sat v sat i max t rev i rev voltage regulator reg in bias + ? gate anode cathode figure 2. functional block diagram figure 3. synchronous buck turn off delay 1.8 1.6 1.2 1.4 1.0 0.8 0.6 figure 4. on ? resistance variation with temperature t j , junction temperature ( c) r ds(on) , drain ? to ? source resist ance (normalized) i dss , leakage (na) ? 50 50 25 0 ? 25 75 125 100 150 i d = 55 a v gs = 4.5 v ? 40 ? 20 0 20 40 60 80 100 120 80 temperature ( c) delay time (ns) 70 60 50 40 30 20 10 0 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 ? 40 ? 20 0 20 40 60 80 100 120 temperature ( c) headroom voltage (v) figure 5. delay time versus temperature figure 6. headroom versus temperature
nis6111 http://onsemi.com 5 85 80 75 70 65 60 55 50 45 40 6000 5500 5000 4500 4000 3500 3000 2500 2000 1500 1000 500 0 copper area (mm 2 ) ja (c/w) figure 7. thermal resistance vs. copper area for mosfet (m) and analog die (a) ja (m) ? (m) heated ja (a) ? (a) heated source 1 5.15 v i 2 5.2 v 15 v source 2 load figure 8. test circuit for short circuit oring test figure 9. waveforms from short circuit oring test figure 10. positive oring diode connection with additional external fets 5.0 v load anode cathode 18 v ntd110n02r reg in gate 12 v anode cathode reg in load figure 11. negative oring diode connection
nis6111 http://onsemi.com 6 operating description introduction the bers rectifier offers a new concept in rectification for low voltage, high current outputs. this product combines a high speed integrated circuit with a power mosfet, to create a device with speeds better than an ultrafast silicon rectifier, and a forward drop that is less than that of a schottky diode. this device is specifically designed for the low voltage outputs required by today?s digital circuits. current digital products operate on voltages of less than 5.0 v and currents in the tens to hundreds of amperes. bers can greatly increase the efficiency of low voltage, high current converters, by reducing the rectifier drop to several hundred millivolts. this device consists of four major circuits as well as a capacitor. bers contains a power supply to regulate the voltage on the bias supply cap, a high speed comparator to sense the conduction state of the device, a high speed driver, a power fet and a capacitor. bias supply the internal bias supply is a high current, switching regulator. it will maintain a regulated voltage on the internal capacitor as long as sufficient voltage is available at the reg in pin. when this pin is high, a current limited switch allows current to charge the capacitor. when the maximum charge voltage is reached, the switch is turned off. if there is not sufficient reverse voltage to maintain a 5.0 v charge on the capacitor, the bias supply will charge it to within 1.0 v of the reverse voltage. the regulator input pin can be connected to the cathode and will recharge the internal capacitor when the bers is reversed biased. this input requires a minimum voltage of 4.7 v to operate. in some cases this amount of reverse voltage may not be available. when this is the case, the reg in pin can be connected to a higher voltage source. it is not necessary that this source be synchronous with the cathode voltage. the reg in voltage should not be allowed to go more negative than the anode of the device. if this scenario can occur, a small switching diode should be placed in series with the reg in pin. comparator/driver the polarity comparator is a medium gain, ultra high speed design. it is integrated with the driver circuit, to optimize the switching speed of the device. the comparator input has a low offset voltage which biases the inverting input several millivolts above ground. this is to assure that at zero (or very low) current levels, the device is off. figure 12. detailed block diagram + ? cap power supply reg in ? + uvlo cathode fet comparator and driver bias
nis6111 http://onsemi.com 7 package dimensions pllp32 case 488ac ? 01 issue a ???? ???? ???? ???? c d e 0.15 c a a1 a3 2x 0.15 c 2x a thermal #1 index area 0.08 c 0.10 c b top view side view notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to metallized terminal and is measured between 0.25 mm and 40 mm from terminal tip 4. unilateral coplanarity zone applies to the exposed heat sink slug as well as their terminals. ??????? ??????? ??????? ??????? ??????? ??????? ??????? ??????? 32x bottom view ? ? ? ??? ?? ? ?? ? ????? ????? ????? ????? ????? ????? ????? ? ? ? a m 0.10 b c m 0.05 c dim min nom max millimeters a 1.750 1.850 1.950 a1 0.000 ???? 0.050 a3 0.254 ref b 0.350 0.400 0.450 d 9.000 bsc d1 5.987 6.087 6.187 d2 1.924 2.024 2.124 d3 2.713 2.813 2.913 d4 1.584 1.684 1.784 d5 3.547 3.647 3.747 e 9.000 bsc e1 4.472 4.572 4.672 e2 0.638 0.738 0.838 e 0.800 bsc f1 1.500 ref f2 1.324 1.424 1.524 g 2.700 2.800 2.900 h 2.000 ref j 1.016 bsc k 0.381 ref l 0.500 0.600 0.700 l1 0.062 0.162 0.262 l2 0.760 0.770 0.870 l3 0.281 0.381 0.481
nis6111 http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, in cluding without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different a pplications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical e xperts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc prod uct could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney f ees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was neglig ent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2 ? 9 ? 1 kamimeguro, meguro ? ku, tokyo, japan 153 ? 0051 phone : 81 ? 3 ? 5773 ? 3850 nis6111/d bers is a trademark of semiconductor components industries, llc (scillc). the product described herein (nis6111), may be covered by u.s. patents including 6,271,712. there may be other patents pending. literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082 ? 1312 usa phone : 480 ? 829 ? 7710 or 800 ? 344 ? 3860 toll free usa/canada fax : 480 ? 829 ? 7709 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
|
