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IT8209R extended pci arbiter and clock buffer preliminary specification v0.3 http://www..net/ datasheet pdf - http://www..net/
copyright ? 2002 ite, inc. this is preliminary document release. all specifications are subject to change without notice. the material contained in thi s document supersedes all previous documentation issued for the related products included herein. please contact ite, inc. for the latest document(s). all sales are subject to ite?s standard terms and conditions, a copy of which is included in the back of this document. ite, IT8209R is a trademark of ite, inc. all other trademarks are claimed by their respective owners. all specifications are subject to change without notice. additional copies of this manual or other ite literature may be obtained from: ite, inc. phone: (02) 2912 - 6889 marketing department fax: (02) 2910 - 2551, 2910 - 2552 8f, no. 233 - 1, bao chiao rd., hsin tien, taipei county 231, taiwan, r.o.c. ite (usa) inc. phone: (408) 530 - 8860 marketing department fax: (4 08) 530 - 8861 1235 midas way sunnyvale, ca 94086 u.s.a. ite (usa) inc. phone: (512) 388 - 7880 eastern u.s.a. sales office fax: (512) 388 - 3108 896 summit st., #105 round rock, tx 78664 u.s.a. if you have any marketing or sales questio ns, please contact: lawrence liu, at ite taiwan: e - mail: lawrence.liu@ite.com.tw , tel: 886 - 2 - 2912 - 6889 x6071, fax: 886 - 2 - 26578561 david lin , at ite u.s.a: e - mail: david.l in@iteusa.com , tel: (408) 530 - 8860 x238, fax: (408) 530 - 8861 don gardenhire , at ite eastern usa office: e - mail: don.gardenhire@iteusa.com tel: (512) 388 - 7880, fax: (512) 388 - 3108 to find out more about ite , visit our world wide web at: http://www.ite.com.tw http://www.iteusa.com or e - mail itesupport@ite.com.tw for more product information/services. http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0.3 www.iteusa.com 1 revision history revision history section revision page no. 6 the max. value of v il in section 6 dc characteristics was revised to ?vcc x 0.3 ?. the max. value of v ih has been removed. 11 http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com i contents contents 1. features ................................ ................................ ................................ ................................ ................................ 1 2. general description ................................ ................................ ................................ ................................ .............. 3 3. block diagram ................................ ................................ ................................ ................................ ....................... 5 4. pin configuration ................................ ................................ ................................ ................................ .................. 7 5. IT8209R pin descriptions ................................ ................................ ................................ ................................ .... 9 6. dc characteristics (vcc, avcc = 3.3v 0.3v. ta=0 c to 70 c) ................................ ................................ ... 11 7. ac charac teristics ................................ ................................ ................................ ................................ .............. 13 8. package information ................................ ................................ ................................ ................................ .......... 15 9. ordering information ................................ ................................ ................................ ................................ .......... 17 figures figure 2 - 1. arbitration scheme of IT8209R ................................ ................................ ................................ ............. 3 figure 3 - 1. extended pci arbiter scheme ................................ ................................ ................................ ............... 5 figure 3 - 2. clock buffer scheme ................................ ................................ ................................ .............................. 5 figure 7 - 1. pci request delay timing ................................ ................................ ................................ .................. 13 figure 7 - 2 . pci grant delay timing ................................ ................................ ................................ ....................... 13 figure 7 - 3 . pci grant separation timing ................................ ................................ ................................ .............. 13 figure 7 - 4. p ci clock acquisition timing ................................ ................................ ................................ .............. 14 tables table 4 - 1. pins listed in numeric order ................................ ................................ ................................ .................. 7 table 5 - 1. pin descriptions of extended pci arbi ter ................................ ................................ .............................. 9 table 5 - 2. pin descriptions of clock buffer ................................ ................................ ................................ ............. 9 table 5 - 3. pin descriptions of power/ground signals ................................ ................................ ............................ 9 table 7 - 1. pci request delay timing table ................................ ................................ ................................ ......... 13 table 7 - 2 . pci grant delay timing table ................................ ................................ ................................ .............. 13 table 7 - 3 . pci grant separatioin timing table ................................ ................................ ................................ ..... 13 table 7 - 4 . pci clock acquisition timing table ................................ ................................ ................................ ..... 14 http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com itpm - pn - 200205 specifications subject to change wit hout notice by peterson lu, mar. 7, 2002 1 features 1. features n extended pci arbiter - utilizes 1 set of sysgnt# and sysreq# to support 3 pci masters n input pci clock - supports input clock frequency from 25mhz to 66mhz n clock buffer - provides 4 zero delay clock sources - supports output clock frequency from 25mhz to 66mhz n 28 - pin ssop http://www..net/ datasheet pdf - http://www..net/
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www.ite.com.tw IT8209R v0. 3 www.iteusa.com 3 general description 2. general description the IT8209R incorporates an extended pci arbiter and a clock buffer. the extended pci arbiter utilizes one set of sysgnt# and sysreq# to support 3 pci masters, so that two more pci masters can be supported for the system. pcistop# input signal is useful to facilitate the fairness arbitration. the algorithm of this arbiter uses a rotation arbitration priority that is illustrated in figure 2 - 1. the clock buffer provides 4 zero delay and low jitter clock sources. pciclki is the clock input of the clock buffer, and pciclkout is the clock output fed back internally to the input of the built - in pll to reduce the clock skew. if zero clock skew is req uired, pciclkout and pciclk1 to pciclk4 must be equally loaded. when pciclki input becomes inactive, the IT8209R will enter power down mode. in power down mode, all clock outputs are low and other control outputs are deasserted. the IT8209R is available in 28 - pin ssop package. figure 2 - 1 . arbitration scheme of IT8209R extended device 1 extended device 3 extended device 2 pci device n pci device x pci device n-1 pci device 1 pci device 2 central pci arbiter (chipset) extended pci arbiter (IT8209R) http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com 4 http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com 5 block diagram 3. block diagram figure 3 - 1 . extended pci arbiter scheme figure 3 - 2 . cloc k buffer scheme IT8209R pciclki clock generator pci device 1 pciclk1 pciclk2 pciclk3 pciclk4 pciclkout pci device 2 pci device 3 pci device 4 load pci bus IT8209R sysreq# sysgnt# pcireq1# pcignt1# pcireq2# pcignt2# pcireq3# pcignt3# pci master 1 pci master 2 pci master 3 http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com 6 http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com 7 pin configuration 4. pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 19 18 17 16 15 24 23 22 21 20 28 27 26 25 IT8209R pcistop# sysreq# sysgnt# pcireq1# vss pcignt1# pcireq2# vcc pcignt2# pcireq3# pcignt3# nc nc avcc pciclki pcirst# avss vss pciclkout pciclk1 vcc pciclk2 pciclk3 pciclk4 vss nc nc pciframe# pin signal pin signal 1 pcif rame# 15 nc 2 pcistop# 16 nc 3 sysreq# 17 vss 4 sysgnt# 18 pciclk4 5 pcireq1# 19 pciclk3 6 vss 20 pciclk2 7 pcignt1# 21 vcc 8 pcireq2# 22 pciclk1 9 vcc 23 pciclkout 10 pcignt2# 24 vss 11 pcireq3# 25 avss 12 pcignt3# 26 pcirst# 13 nc 27 pciclki 14 nc 28 avcc table 4 - 1 . pins listed in numeric order http://www..net/ datasheet pdf - http://www..net/
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www.ite.com.tw IT8209R v0. 3 www.iteusa.com 9 IT8209R pin descriptions 5. IT8209R pin descriptions table 5 - 1 . pin descriptions of extended pci arbiter signal pin(s) no . attribute description extended pci arbiter signals (3.3v cmos i/f, 5v tolerant) pciframe# 1 piu pci bus frame# s ignal the pin can be connected to pci bus frame# signal or not connected to any signals. pcistop# 2 pi u pci bus stop# signal sysreq# 3 o1 2 pci bus request sysgnt# 4 pi u pci bus grant pcireq1# 5 pi u request signal from extended pci master 1 pcignt1# 7 o12 grant signal to extended pci master 1 pcireq2# 8 pi u request signal from extended pci master 2 pcignt2# 10 o12 grant signal to extend ed pci master 2 pcireq3# 11 pi u request signal from extended pci master 3 pcignt3# 12 o12 grant signal to extended pci master 3 pcirst# 26 ik pci bus rst# signal table 5 - 2 . pin descriptions of clock buffer signal p in(s) no. attribute description clock buffer signals (3.3v cmos i/f ) pciclk4 18 o12 pciclk output 4 pciclk3 19 o12 pciclk output 3 pciclk2 20 o12 pciclk output 2 pciclk1 22 o12 pciclk output 1 pciclkout 23 o12 pciclk output (for internal feedback) pciclki 27 i pciclk input table 5 - 3 . pin descriptions of power/ground signals signal pin(s) no. attribute description power ground signals vss 6, 17, 24 i ground vcc 9, 21 i power supply of 3.3v avss 2 5 i analog ground for analog pll avcc 28 i analog vcc for analog pll notes: io cell types are described as below: i: input pad. ik: schmitt trigger input pad. pi u : pci bus specified input pad (integrated a 75k ohms pull - up resistor) . o12: 12ma output pa d. http://www..net/ datasheet pdf - http://www..net/
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www.ite.com.tw IT8209R v0. 3 www.iteusa.com 11 dc characteristics 6. dc characteristics (vcc, avcc = 3.3v 0.3v. ta=0 c to 70 c) absolute maximum ratings* applied voltage of vcc, avcc ............. - 0.3v to +4.6v input voltage of 3.3v interface ...... - 0.3v to vcc+0.3v input voltage of 5v tolerant interface ? - 0.3v to 5.25v tcase ................................ ......................... 0 c to +70 c storage temperature ......................... - 40 c to +125 c dc electr ical characteristics (ta = 0 c to 70 c) symbol parameter min. typ. max. conditions v il input low voltage - 0.3v vcc x 0. 3 vcc=3.0 ~ 3.6v v ih input high voltage vcc x 0.7 vcc=3.0 ~ 3.6v v ol output low voltage 0.5 i ol = - 12ma v oh output high vo ltage 2.4 i oh = 12ma i il input low current - 1 m a 1 m a v il = v ss no pull - up or pull - down i ih input high current - 1 m a 1 m a v ih = vcc no pull - up or pull - down i oz tri - state leakage current - 10 m a 10 m a cin input capacitance 3pf cout output capacitance 3 pf cbld bi - directional buffer 3pf r i input pull - up resistance 40k w 75k w 170k w v il =0v *comments stresses above those listed under "absolute maximum ratings" may cause permanent dam age to this device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied, and exposure to absolute maximum rating conditio ns for extended periods may affect device reliability . http://www..net/ datasheet pdf - http://www..net/
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www.ite.com.tw IT8209R v0. 3 www.iteusa.com 13 ac characteristics 7. ac characteristics figure 7 - 1 . pci request delay timing table 7 - 1 . pci request delay timing table symbol parameter min. ty p. max. unit t 1 pcireqn# (n=1, 2, 3) to sysreq# asserted 0 - 7 ns figure 7 - 2 . pci grant delay timing table 7 - 2 . pci grant delay timing table symbol parameter min. typ . max. unit t 2 sysgnt# to pcigntn# (n=1, 2, 3) asserted 0 - 8.5 ns figure 7 - 3 . pci grant separation timing table 7 - 3 . pci grant separation timing table symbol parameter min. typ. max. unit t 3 pcigntm# (m=1, 2, 3) deasserted to pcigntn# (n=1, 2, 3) asserted (n != m) 1 - - clock period pcireqn# sysreq# t1 sysgnt# pcigntn# t2 pcigntm# pcigntn# t3 http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com 14 it8 209r figure 7 - 4 . pci clock acquisition timing table 7 - 4 . pci clock acq uisition timing table symbol parameter min. typ. max. unit t 4 pciclki stable to pciclkn (n=1, 2, 3, 4, out) stable - - 60 us pciclki pciclkn t4 http://www..net/ datasheet pdf - http://www..net/
www.ite.com.tw IT8209R v0. 3 www.iteusa.com 15 package information 8. package information ssop28l outline dimensions unit: inches/mm 1 e h e l l 1 c 14 see detail f detail f 15 28 a 1 a 2 a s d seating plane e b d y dimension in inches dimension in mm symbol min nom max min nom max a 0.053 0.064 0.069 1.35 1.63 1.75 a 1 0.004 0.006 0.010 0.10 0.152 0.25 a 2 - - 0.059 - - 1.50 b 0.008 0.010 0.012 0.203 0.254 0.305 c 0.007 - 0.010 0.178 - 0.250 d 0.386 0.390 0.394 9.80 9.91 10.00 e 0.150 0.154 0.157 3.80 3.91 4.00 e 0.025bsc 0.635bsc h e 0.228 0.236 0.244 5.80 5.99 6.20 l 0.016 0.025 0.050 0.40 0.635 1.27 l 1 0.041ref. 1.04ref. s 0.033ref. 0.838ref. y - - 0.004 - - 0.10 q 0 - 8 0 - 8 http://www..net/ datasheet pdf - http://www..net/
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www.ite.com.tw IT8209R v0. 3 www.iteusa.com 17 ordering information 9. ordering information part no. package IT8209R 28 ssop http://www..net/ datasheet pdf - http://www..net/

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