? semiconductor components industries, llc, 2006 august, 2006 ? rev. 3 1 publication order number: mac15a4/d mac15 series preferred device triacs silicon bidirectional thyristors designed primarily for full-wave ac control applications, such as solid?state relays, motor controls, heating controls and power supplies; or wherever full?wave silicon gate controlled solid?state devices are needed. triac type thyristors switch from a blocking to a conducting state for either polarity of applied main terminal voltage with positive or negative gate triggering. features ? blocking voltage to 800 v ? all diffused and glass passivated junctions for greater parameter uniformity and stability ? small, rugged, thermowatt construction for low thermal resistance, high heat dissipation and durability ? gate triggering guaranteed in three modes (mac15 series) or four modes (mac15a series) ? pb?free packages are available* maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit peak repetitive off?state voltage note 1 (t j = ?40 to +125 c, sine wave 50 to 60 hz, gate open) mac15a6 mac15?8, mac15a8 mac15?10, mac15a10 v drm, v rrm 400 600 800 v peak gate voltage (pulse width 1.0 sec; t c = 90 c) v gm 10 v on?state current rms; full cycle sine wave 50 to 60 hz (t c = +90 c) i t(rms) 15 a circuit fusing consideration (t = 8.3 ms) i 2 t 93 a 2 s peak non?repetitive surge current (one full cycle sine wave, 60 hz, t c = +80 c) preceded and followed by rated current i tsm 150 a peak gate power (t c = +80 c, pulse width = 1.0 s) p gm 20 w average gate power (t c = +80 c, t = 8.3 ms) p g(av) 0.5 w peak gate current (pulse width 1.0 sec; t c = 90 c) i gm 2.0 a operating junction temperature range t j ?40 to +125 c storage temperature range t stg ?40 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. v drm and v rrm for all types can be applied on a continuous basis. blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. triacs 15 amperes rms 400 thru 800 volts to?220ab case 221a style 4 1 2 3 4 pin assignment 1 2 3 gate main terminal 1 main terminal 2 4 main terminal 2 mt1 g mt2 preferred devices are recommended choices for future use and best overall value. http://onsemi.com see detailed ordering, marking, and shipping information in the package dimensions section on page 2 of this data sheet . ordering information mac15xx = specific device code xx = see table on page 2 a = assembly location y = year ww = work week g = pb?free package marking diagram mac15xxg ayww
mac15 series http://onsemi.com 2 thermal characteristics characteristic symbol value unit thermal resistance, junction?to?case r jc 2.0 c/w thermal resistance, junction?to?ambient r ja 62.5 c/w maximum lead temperature for soldering purposes 1/8 from case for 10 seconds t l 260 c electrical characteristics (t c = 25 c unless otherwise noted; electricals apply in both directions) characteristic symbol min typ max unit off characteristics peak blocking current t j = 25 c (v d = rated v drm , v rrm ; gate open) t j = 125 c i drm, i rrm ? ? ? ? 10 2.0 a ma on characteristics peak on?state voltage note 2 (i tm = 21 a peak) v tm ? 1.3 1.6 v gate trigger current (continuous dc) (v d = 12 vdc, r l = 100 ) mt2(+), g(+) mt2(+), g(?) mt2(?), g(?) mt2(?), g(+) ?a?? suffix only i gt ? ? ? ? ? ? ? ? 50 50 50 75 ma gate trigger voltage (continuous dc) (v d = 12 vdc, r l = 100 ) mt2(+), g(+) mt2(+), g(?) mt2(?), g(?) mt2(?), g(+) ?a?? suffix only v gt ? ? ? ? 0.9 0.9 1.1 1.4 2 2 2 2.5 v gate non?trigger voltage (v d = 12 v, r l = 100 ) t j = 110 c) mt2(+), g(+); mt2(?), g(?); mt2(+), g(?) mt2(?), g(+) ?a?? suffix only v gd 0.2 0.2 ? ? ? ? v holding current (v d = 12 vdc, gate open, initiating current = 200 ma) i h ? 6.0 40 ma turn-on time (v d = rated v drm , i tm = 17 a) (i gt = 120 ma, rise time = 0.1 s, pulse width = 2 s) t gt ? 1.5 ? s dynamic characteristics critical rate of rise of commutation voltage (v d = rated v drm , i tm = 21 a, commutating di/dt = 7.6 a/ms, gate unenergized, t c = 80 c) dv/dt(c) ? 5.0 ? v/ s 2. pulse test: pulse width 2.0 ms, duty cycle 2%. ordering information device device marking package shipping mac15?008 mac15?8 to?220ab 500 units bulk mac15?8g to?220ab (pb?free) mac15?10 mac1510 to?220ab mac15?10g to?220ab (pb?free) mac15a6 mac15a6 to?220ab mac15a6g to?220ab (pb?free) mac15a8 mac15a8 to?220ab mac15a8g to?220ab (pb?free) mac15a10 mac15a10 to?220ab mac15a10g to?220ab (pb?free) MAC15A10T to?220ab 50 units / rail
mac15 series http://onsemi.com 3 + current + voltage v tm i h symbol parameter v drm peak repetitive forward off state voltage i drm peak forward blocking current v rrm peak repetitive reverse off state voltage i rrm peak reverse blocking current voltage current characteristic of triacs (bidirectional device) i drm at v drm on state off state i rrm at v rrm quadrant 1 mainterminal 2 + quadrant 3 mainterminal 2 ? v tm i h v tm maximum on state voltage i h holding current mt1 (+) i gt gate (+) mt2 ref mt1 (?) i gt gate (+) mt2 ref mt1 (+) i gt gate (?) mt2 ref mt1 (?) i gt gate (?) mt2 ref ? mt2 negative (negative half cycle) mt2 positive (positive half cycle) + quadrant iii quadrant iv quadrant ii quadrant i quadrant definitions for a triac i gt ? + i gt all polarities are referenced to mt1. with in?phase signals (using standard ac lines) quadrants i and iii are used.
mac15 series http://onsemi.com 4 figure 1. rms current derating figure 2. on?state power dissipation figure 3. typical gate trigger voltage figure 4. typical gate trigger current 130 120 110 100 90 80 02 46 810121416 i t(rms), rms on?state current (amp) t c , case temperature ( c) = 30 = 180 = 60 = 90 dc t j 125 20 16 12 8 4 0 02 46 810121416 i t(rms), on?state current (amp) 30 = 180 dc t j 125 60 90 120 p av , average power (watts) = conduction angle = conduction angle 1.8 1.6 1.4 1.2 1.0 0.4 ?60 ?40 ?20 0 20 40 60 80 100 t j , junction temperature ( c) 1 quadrant 4 0.8 0.6 120 140 2 3 quadrants off?state voltage = 12 v v gt , gate trigger voltage (volts) 50 30 20 10 7.0 5.0 ?60 ?40 ?20 0 20 40 60 80 100 t j , junction temperature ( c) 1 120 140 2 3 quadrant off?state voltage = 12 v 4 i gt , gate trigger current (ma)
mac15 series http://onsemi.com 5 100 70 50 30 20 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 v tm , instantaneous on?state voltage (volts) t j = 25 c 4 4.4 10 7 5 3 2 1 0.7 0.5 0.3 0.2 0.1 i tm , instantaneous forward current (amp) 125 c 20 10 7.0 5.0 3.0 2.0 ?60 ?40 ?20 0 20 40 60 80 100 t j , junction temperature ( c) 120 140 gate open 300 200 100 70 50 30 1235 number of cycles 710 surge is preceded and followed by rated current main terminal #1 positive main terminal #2 positive t c = 80 c t f = 60 hz t sm , peak surge current (amp) i h , holding current (ma) figure 5. on?state characteristics figure 6. typical holding current figure 7. maximum non?repetitive surge current 1 0.5 0.1 0.05 0.02 0.01 0.1 0.2 0.5 t, time (ms) 1 z jc(t) = r(t) ? r jc 0.2 2 5 10 20 50 100 200 500 1 k 2 k 5 k 10 k r(t) transient thermal resistance (normalized) figure 8. thermal response
mac15 series http://onsemi.com 6 package dimensions style 4: pin 1. main terminal 1 2. main terminal 2 3. gate 4. main terminal 2 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 ??? 1.15 ??? z ??? 0.080 ??? 2.04 b q h z l v g n a k f 123 4 d seating plane ?t? c s t u r j to?220ab case 221a?09 issue ad on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 mac15a4/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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