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  march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. tisp7070h3sl thru tisp7095h3sl, tisp7125h3sl thru tisp7220h3sl, tisp7250h3sl thru tisp7400h3sl triple element bidirectional thyristor overvoltage protectors tisp7xxxh3sl overview tisp7xxxh3sl overvoltage protector series summary electrical characteristics part # v drm v v (bo) v v t @ i t v i drm a i (bo) ma i t a i h ma c o @ -2 v pf functionally replaces tisp7070h3 58 70 3 5 600 5 150 140 tisp7080h3 65 80 3 5 600 5 150 140 tisp7095h3 75 95 3 5 600 5 150 140 tisp7125h3 100 125 3 5 600 5 150 74 tisp7135h3 110 135 3 5 600 5 150 74 tisp7145h3 120 145 3 5 600 5 150 74 tisp7165h3 130 165 3 5 600 5 150 74 p1553ac? tisp7180h3 145 180 3 5 600 5 150 74 tisp7200h3 150 200 3 5 600 5 150 74 p1803ac? tisp7210h3 160 210 3 5 600 5 150 74 tisp7220h3 170 220 3 5 600 5 150 74 p2103ac? tisp7250h3 200 250 3 5 600 5 150 62 p2353ac? tisp7290h3 230 290 3 5 600 5 150 62 p2703ac? tisp7300h3 230 300 3 5 600 5 150 62 tisp7350h3 275 350 3 5 600 5 150 62 p3203ac tisp7400h3 300 400 3 5 600 5 150 62 p3403ac ? bourns' part has an improved protection voltage summary current ratings parameter i tsp a i tsm a di/dt a/ s waveshape 2/10 1.2/50, 8/20 10/160 5/320 10/560 10/1000 1 cycle 60 hz 2/10 wavefront value 500 350 250 200 130 100 60 400 this tisp device series protects central office, access and customer premise equipment against overvoltages on the telecom line. the tisp7xxxh3sl has the same symmetrical bidirectional protection on any terminal pair; r-t, r-g and t-g. in addition, the device is rated for simultaneous r-g and t-g impulse conditions. the tisp7xxxh3sl is available in a wide range of voltages and has a high current c apability, allowing minimal series resistance to be used. these protectors have been specified mindful of the following standards and reco mmendations: gr-1089-core, fcc part 68, ul1950, en 60950, iec 60950, itu-t k.20, k.21 and k.45. the tisp7350h3sl meets the fcc part 68 ? ringer voltage requirement and survives both type a and b impulse tests. these devices are housed in a through-hole 3-pin singl e-in-line (sl) plastic package. *rohs directive 2002/95/ec jan 27 2003 including annex *rohs compliant versions available
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. device v drm v v (bo) v ?070 58 70 ?080 65 80 ?095 75 95 7125 100 125 7135 110 135 7145 120 145 7165 130 165 7180 145 180 7200 150 200 7210 160 210 7220 170 220 7250 200 250 7290 230 290 7350 275 350 7400 300 400 itu-t k.20/21 rating . . . . . . . . 8 kv 10/700, 200 a 5/310 ion-implanted breakdown region precise and stable voltage low voltage overshoot under surge 1 2 3 t g r mdxxaga how to order description device symbol sl package (top view) tisp7xxxh3sl overvoltage protector series waveshape standard i tsp a 2/10 s gr-1089-core 500 8/20 s iec 61000-4-5 350 10/160 s fcc part 68 250 10/700 s fcc part 68 itu-t k.20/21 200 10/560 s fcc part 68 130 10/1000 s gr-1089-core 100 rated for international surge wave shapes - single and simultaneous impulses the tisp7xxxh3sl limits overvoltages between the telephone line ring and tip conductors and ground. overvoltages are normally c aused by a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. each terminal pair, t-g, r-g and t-r, has a symmetrical voltage-triggered bidirectional thyristor protection characteristic. ov ervoltages are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. this low-voltage on state causes the current resulting from the overvoltage to be safely diverted through the device. th e high crowbar holding current prevents d.c. latchup as the diverted current subsides. 3-pin through-hole packaging - compatible with to-220ab pin-out -low height .................................................................... 8.3 mm low differential capacitance ....................................... < 72 pf .............................................. ul recognized component g t r sd7xab terminals t, r and g correspond to the alternative line designators of a, b and c device package carrier tisp7xxxh3 sl (single-in-line) tube tisp7xxxh3sl tisp7xxxh3sl-s insert xxx value corresponding to protection voltages of 070, 080, 095, 125 etc. for standard termination finish order as for lead free termination finish order as
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. rating symbol value unit repetitive peak off-state voltage, (see note 1) 7070 7080 7095 7125 7135 7145 7165 7180 7200 7210 7220 7250 7290 7350 7400 v drm 58 65 75 100 110 120 130 145 150 160 170 200 230 275 300 v non-repetitive peak on-state pulse current (see notes 2, and 3) i tsp a 2/10 (telcordia gr-1089-core, 2/10 voltage wave shape) 500 8/20 s (iec 61000-4-5, 1.2/50 s voltage, 8/20 current combination wave generator) 350 10/160 s (fcc part 68, 10/160 s voltage wave shape) 250 4/250 (itu-t k.20/21, 10/700 voltage wave shape, dual) 225 0.2/310 (cnet i 31-24, 0.5/700 voltage wave shape) 200 5/310 (itu-t k.20/21, 10/700 voltage wave shape, single) 200 5/320 s (fcc part 68, 9/720 s voltage wave shape) 200 10/560 s (fcc part 68, 10/560 s voltage wave shape) 130 10/1000 (telcordia gr-1089-core, 10/1000 voltage wave shape) 100 non-repetitive peak on-state current (see notes 2, 3 and 4) i tsm 55 60 0.9 a 20 ms (50 hz) full sine wave 16.7 ms (60 hz) full sine wave 1000 s 50 hz/60 hz a.c. initial rate of rise of on-state current, exponential current ramp, maximum ramp value < 200 a di t /dt 400 a/ s junction temperature t j -40 to +150 c storage temperature range t stg -65 to +150 c notes: 1. derate value at -0.13%/ c for temperatures below 25 c. 2. initially the tisp7xxxh3 must be in thermal equilibrium. 3. these non-repetitive rated currents are peak values of either polarity. the rated current values may be applied to any termin al pair. additionally, both r and t terminals may have their rated current values applied simultaneously (in this case the g termi nal return current will be the sum of the currents applied to the r and t terminals). the surge may be repeated after the tisp7xxxh3 returns to its initial conditions. 4. eia/jesd51-2 environment and eia/jesd51-3 pcb with standard footprint dimensions connected with 5 a rated printed wiring track widths. derate current values at -0.61 %/ c for ambient temperatures above 25 c. absolute maximum ratings, t a = 25 c (unless otherwise noted) tisp7xxxh3sl overvoltage protector series description (continued) this tisp7xxxh3sl range consists of fifteen voltage variants to meet various maximum system voltage levels (58 v to 300 v). the y are guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. these high current prot ection devices are in a 3-pin single-in-line (sl) plastic package and are supplied in tube pack. for alternative impulse rating, voltage and holding current values in sl packaged protectors, consult the factory. for lower rated impulse currents in the sl package, the 45 a 10/1000 tisp7xxxf3sl series is available. these monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover c ontrol and are virtually transparent to the system in normal operation.
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. electrical characteristics for any terminal pair, t a = 25 c (unless otherwise noted) tisp7xxxh3sl overvoltage protector series parameter test conditions min typ max unit i drm repetitive peak off- state current v d = v drm t a = 25 c t a = 85 c 5 10 a v (bo) breakover voltage dv/dt = 750 v/ms, r source = 300 ? 7070 7080 7095 7125 7135 7145 7165 7180 7200 7210 7220 7250 7290 7350 7400 70 80 95 125 135 145 165 180 200 210 220 250 290 350 400 v v (bo) impulse breakover voltage dv/dt 1000 v/ s, linear voltage ramp, maximum ramp value = 500 v di/dt = 20 a/ s, linear current ramp, maximum ramp value = 10 a 7070 7080 7095 7125 7135 7145 7165 7180 7200 7210 7220 7250 7290 7350 7400 78 88 103 134 144 154 174 189 210 220 231 261 302 362 414 v i (bo) breakover current dv/dt = 750 v/ms, r source = 300 ? 0.1 0.8 a v t on-state voltage i t = 5a, t w = 100 s 5v i h holding current i t = 5a, di/dt=-/+30ma/ms 0.15 0.6 a dv/dt critical rate of rise of off-state voltage linear voltage ramp, maximum ramp value < 0.85v drm 5kv/ s i d off-state current v d = 50 v t a = 85 c 10 a
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. electrical characteristics for any terminal pair, t a = 25 c (unless otherwise noted) c off off-state capacitance f=1mhz, v d =1v rms, v d =0, f=1mhz, v d =1v rms, v d =-1v f=1mhz, v d =1v rms, v d =-2v f=1mhz, v d =1v rms, v d =-50v f=1mhz, v d =1v rms, v d = -100 v (see note 5) 7070 thru ?095 7125 thru ?220 7250 thru ?400 7070 thru ?095 7125 thru ?220 7250 thru ?400 7070 thru ?095 7125 thru ?220 7250 thru ?400 7070 thru ?095 7125 thru ?220 7250 thru ?400 7125 thru ?220 7250 thru ?400 170 90 84 150 79 67 140 74 62 73 35 28 33 26 pf note 5: to avoid possible voltage clipping, the 7125 is tested with v d =-98v. a parameter test conditions min typ max unit thermal characteristics tisp7xxxh3sl overvoltage protector series parameter test conditions min typ max unit r ja junction to free air thermal resistance eia/jesd51-3 pcb, i t = i tsm(1000) , t a = 25 c, (see note 6) 50 c/w note 6: eia/jesd51-2 environment and pcb has standard footprint dimensions connected with 5 a rated printed wiring track widths.
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. parameter measurement information tisp7xxxh3sl overvoltage protector series figure 1. voltage-current characteristic for terminal pairs -v v drm i drm v d i h i t v t i tsm i tsp v (bo) i (bo) i d quadrant i switching characteristic +v +i v (bo) i (bo) v d i d i h i t v t i tsm i tsp -i quadrant iii switching characteristic pm4xaac v drm i drm v d = 50 v and i d = 10 a used for reliability release
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. typical characteristics tisp7xxxh3sl overvoltage protector series figure 2. figure 3. figure 4. figure 5. t j - junction temperature - c 0 25 50 75 100 125 150 |i d | - off-state current - a 00001 0001 001 01 1 10 tc7aaa v d = +50 v v d = -50 v t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized breakover voltage 0.95 1.00 1.05 1.10 tc7aaba '7070 thru '7095 '7250 thru '7400 '7250 thru '7400 '7125 thru '7220 on-state current vs on-state voltage v t - on-state voltage - v 0.7 1.5 2 3 4 5 7 110 1.5 2 3 4 5 7 15 20 30 40 50 70 150 200 1 10 100 t a = 25 c t w = 100 s '3250 thru '3350 '3125 thru '3210 '3070 thru '3095 t j - junction temperature - c -25 0 25 50 75 100 125 150 breakover current normalized to 25 c holding current 0.4 0.5 0.6 0.7 0.8 0.9 1.5 2.0 3.0 4.0 1.0 tc7aada + i (bo) , - i (bo) '7250 thru '7400 + i (bo) , - i (bo) '7070 thru '7220 t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized holding current 0.4 0.5 0.6 0.7 0.8 0.9 1.5 2.0 1.0 tc7aac off-state current vs junction temperature normalized breakover current vs junction temperature normalized breakover voltage vs junction temperature normalized holding current vs junction temperature
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. typical characteristics tisp7xxxh3sl overvoltage protector series figure 6. figure 7. v d - off-state voltage - v 1 2 3 5 10 20 30 50 100 150 capacitance normalized to v d = -1v 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 t j = 25 c v d = 1 vrms '7070 thru '7095 '7250 thru '7400 tc7aaia '7125 thru '7220 v drm - repetitive peak off-state voltage - v 50 60 70 80 150 200 250 300 400 100 ? c - differential off-state capacitance - pf 30 35 40 45 50 55 60 65 70 75 80 ? c = c off(-2 v) - c off(-50 v) '7070 '7080 '7095 '7125 '7135 '7145 '7180 '7250 '7290 '7350 '7210 '7400 tc7aaha '7220 '7165 '7200 normalized capacitance vs off-state voltage differential off-state capacitance vs rated repetive peak off-state voltage
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. rating and thermal information tisp7xxxh3sl overvoltage protector series figure 8. figure 9. figure 10. t - current duration - s 01 1 10 100 1000 i tsm(t) - non-repetitive peak on-state current - a 0.8 0.9 1.5 2 3 4 5 6 7 8 9 15 20 30 1 10 ti7ab v gen = 600 v rms, 50/60 hz r gen = 1.4*v gen /i tsm(t) eia/jesd51-2 environment eia/jesd51-3 pcb, t a = 25 c simultaneous operation of r and t terminals. g terminal current = 2xi tsm(t) t amin - minimum ambient temperature - c -35 -25 -15 -5 5 15 25 -40 -30 -20 -10 0 10 20 derating factor 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1.00 '7070 thru '7095 '7250 thru '7400 ti7aaca '7125 thru '7220 t a - ambient temperature - c -40-30-20-100 1020304050607080 impulse current - a 70 80 90 100 120 150 200 250 300 400 500 600 700 iec 1.2/50, 8/20 itu-t 10/700 fcc 10/560 fcc 10/160 tc7haa telcordia 2/10 telcordia 10/1000 non-repetitive peak on-state current vs current duration v drm derating factor vs minimum ambient temperature impulse rating vs ambient temperature
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. deployment tisp7xxxh3sl overvoltage protector series applications information impulse testing these devices are three terminal overvoltage protectors. they limit the voltage between three points in the circuit. typically, this would be the two line conductors and protective ground (figure 11). in figure 11, protectors th2 and th3 limit the maximum voltage between each conductor and ground to the v (bo) of the individual protector. protector th1 limits the maximum voltage between the two conductors to its v (bo) value. manufacturers are being increasingly required to design in protection coordination. this means that each protector is operated at its design level and currents are diverted through the appropriate protector, e.g. the primary level current through the primary protector and lower levels of current may be diverted through the secondary or inherent equipment protection. without coordination, primary level currents could pass through the equipment only designed to pass secondary level currents. to ensure coordination happens with fixed voltage protect ors, some resistance is normally used between the primary and secondary protection. the values given in this data sheet apply to a 400 v (d.c. sparkover) gas discharge tube primary protector and the appropriate test voltage when the equipment is tested with a primary pr otector. to verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various imp ulse wave forms. the table below shows some common values. if the impulse generator current exceeds the protectors current rating, then a series resistance can be used to reduce the cur rent to the protectors rated value to prevent possible failure. the required value of series resistance for a given waveform is given by t he following calculations. first, the minimum total circuit impedance is found by dividing the impulse generators peak voltage by the prote ctors rated current. the impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then sub tracted from the minimum total circuit impedance to give the required value of series resistance. in some cases, the equipment will require veri fication over a temperature range. by using the rated waveform values from figure 10, the appropriate series resistor value can be calculated f or ambient temperatures in the range of -40 c to 85 c. figure 11. multi-point protection th3 th2 th1 standard peak voltage setting v voltage waveform s peak current value a current waveform s tisp7xxxh3 25 c rating a ? series resistance coordination resistance (min.) gr-1089-core 2500 2/10 500 2/10 500 0na 1000 10/1000 100 10/1000 100 fcc part 68 (march 1998) 1500 10/160 200 10/160 250 0na 800 10/560 100 10/560 130 1000 1500 1500 9/720 ? (single) (dual) 25 37.5 2 x 27 5/320 ? 5/320 ? 4/250 200 200 2 x 225 i 31-24 1500 0.5/700 37.5 0.2/310 200 0 na itu-t k.20/k.21 1000 1500 4000 4000 10/700 (single) (single) (dual) 25 37.5 100 2 x 72 5/310 5/310 5/310 4/250 200 200 200 2 x 225 0 na na 4.5 6.0 ? fcc part 68 terminology for the waveforms produced by the itu-t recommendation k.21 10/700 impulse generator na = not applicable, primary protection removed or not specified.
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. tisp7xxxh3sl overvoltage protector series applications information ac power testing capacitance normal system voltage levels jesd51 thermal measurement method the protector can withstand the g return currents applied for times not exceeding those shown in figure 8. currents that exceed these times must be terminated or reduced to avoid protector failure. fuses, ptc (positive temperature coefficient) resistors and fusible r esistors are overcurrent protection devices which can be used to reduce the current flow. protective fuses may range from a few hundred mill iamperes to one ampere. in some cases, it may be necessary to add some extra series resistance to prevent the fuse opening during impulse t esting. the current versus time characteristic of the overcurrent protector must be below the line shown in figure 8. in some cases there m ay be a further time limit imposed by the test standard (e.g. ul 1459 wiring simulator failure). the protector characteristic off-state capacitance values are given for d.c. bias voltage, v d , values of 0, -1 v, -2 v and -50 v. where possible, values are also given for -100 v. values for other voltages may be calculated by multiplying the v d = 0 capacitance value by the factor given in figure 6. up to 10 mhz, the capacitance is essentially independent of frequency. above 10 mhz, the effective capacitance is str ongly dependent on connection inductance. for example, a printed wiring (pw) trace of 10 cm could create a circuit resonance with the device capacitance in the region of 50 mhz. in many applications, the typical conductor bias voltages will be about -2 v and -50 v. fi gure 7 shows the differential (line unbalance) capacitance caused by biasing one protector at -2 v and the other at -50 v. the protector should not clip or limit the voltages that occur in normal system operation. for unusual conditions, such as ring ing without the line connected, some degree of clipping is permissible. under this condition, about 10 v of clipping is normally possible witho ut activating the ring trip circuit. figure 9 allows the calculation of the protector v drm value at temperatures below 25 c. the calculated value should not be less than the maximum normal system voltages. the tisp7290h3, with a v drm of 230 v, can be used for the protection of ring generators producing 105 v rms of ring on a battery voltage of -58 v. the peak ring voltage will be 58 + 1.414*105 = 206.5 v. however, this is the o pen circuit voltage and the connection of the line and its equipment will reduce the peak voltage. for the extreme case of an unconnected line, the temperature at which clipping begins can be calculated using the data from fig ure 9. to possibly clip, the v drm value has to be 206.5 v. this is a reduction of the 230 v 25 c v drm value by a factor of 206.5/230 = 0.90. figure 9 shows that a 0.90 reduction will occur below an ambient temperature of -40 c. for this example, the tisp7290h3 will allow normal equipment operation, even on an open-circuit line, down to below -40 c . to standardize thermal measurements, the eia (electronic industries alliance) has created the jesd51 standard. part 2 of the st andard (jesd51-2, 1995) describes the test environment. this is a 0.0283 m 3 (1 ft 3 ) cube which contains the test pcb (printed circuit board) horizontally mounted at the center. part 3 of the standard (jesd51-3, 1996) defines two test pcbs for surface mount components; one for packages smaller than 27 mm (1.06 ? on a side and the other for packages up to 48 mm (189 ?. the thermal measurements used the smaller 76.2 mm x 114.3 mm (3.0 x 4.5 ? pcb. the jesd51-3 pcbs are designed to have low effective thermal conductivity (high therm al resis- tance) and represent a worse case condition. the pcbs used in the majority of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than indicated by the jesd51 values.
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. tisp7xxxh3sl overvoltage protector series typical circuits figure 12. protection module figure 13. isdn protection figure 14. line card ring/test protection protected equipment e.g. line card ai7xbk th3 th2 th1 tisp7xxxh3 r1a r1b ring wire tip wire f1a f1b r1a r1b ai7xbl signal d.c. th3 th2 th1 tisp7150h3 test relay ring relay slic relay test equip- ment ring generator s1a s1b r1a r1b ring wire tip wire th3 th2 th1 th4 th5 slic slic protection ring/test protection over- current protection s2a s2b s3a s3b v bat c1 220 nf ai7xbj tisp6xxxx, tisppblx, 1/2tisp6ntp2 coordi- nation resistance tisp7xxxh3
march 1999 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. mechanical data tisp7xxxh3sl overvoltage protector series sl003 3-pin plastic single-in-line package this single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. the compo und will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated i n high humidity conditions. leads require no additional cleaning or processing when used in soldered assembly. ?isp?is a trademark of bourns, ltd., a bourns company, and is registered in u.s. patent and trademark office. ?ourns?is a registered trademark of bourns, inc. in the u.s. and other countries. sl003 2 1 3 notes: a. each pin centerline is located within 0.25 (0.010) of its true longitudinal position. b. body molding flash of up to 0.15 (0.006) may occur in the package lead plane. mdxxce index notch 9.25 - 9.75 (0.364 - 0.384) 3.20 - 3.40 (0.126 - 0.134) 6.10 - 6.60 (0.240- 0.260) 0.203 - 0.356 (0.008- 0.014) 0.559 - 0.711 (0.022 - 0.028) 3 places 12.9 (0.492) dimensions are: metric (inches) 4.267 (0.168) min. max. 1.854 (0.073) max. 8.31 (0.327) max. 2.54 (0.100) typical (see note a) 2 places


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