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for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. general description the max3110e/max3111e combine a full-featured uni- versal asynchronous receiver/transmitter (uart) with ?5kv esd-protected rs-232 transceivers and inte- grated charge-pump capacitors into a single 28-pin package for use in space-, cost-, and power-con- strained applications. the max3110e/max3111e also feature an spi/qspi/microwire-compatible serial interface to save additional board space and microcontroller (?) i/o pins. a proprietary low-dropout output stage enables the 2-driver/2-receiver interface to deliver true rs-232 per- formance down to v cc = +3v (+4.5v for max3110e) while consuming only 600?. the receivers remain active in a hardware/software-invoked shutdown, allow- ing external devices to be monitored while consuming only 10?. each device is guaranteed to operate at up to 230kbps while maintaining true eia/tia-232 output voltage levels. the max3110e/max3111e? uart includes a crystal oscillator and baud-rate generator with software-pro- grammable divider ratios for all common baud rates from 300baud to 230kbaud. the uart features an 8- word-deep receive fifo that minimizes processor over- head and provides a flexible interrupt with four maskable sources. two control lines (one input and one output) are included for hardware handshaking. the uart and rs-232 functions can be used together or independently since the two functions share only supply and ground connections (the max3110e/ max3111e are hardware- and software-compatible with the max3100 and max3222e). ________________________applications point-of-sale (pos) devices handy-terminals telecom/networking diagnostic ports industrial front-panel interfaces hand-held/battery-powered equipment features ? integrated rs-232 transceiver and uart in a single 28-pin package ? spi/qspi/microwire-compatible ? interface ? internal charge-pump capacitors no external components required! ? true rs-232 operation down to v cc = +3v (max3111e) ? esd protection for rs-232 i/o pins ?5kv?uman body model ?kv?ec 1000-4-2, contact discharge ?5kv?ec 1000-4-2, air-gap discharge ? single-supply operation +5v (max3110e) +3.3v (max3111e) ? low power 600? supply current 10? shutdown supply current with receiver interrupt active ? guaranteed 230kbps data rate ? hardware/software-compatible with max3100 and max3222e max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ________________________________________________________________ maxim integrated products 1 678 rs-232 db-9 cs sclk spi din dout p u a r t 9 12345 irq max3110e max3111e 19-1494; rev 1; 12/05 typical application circuit ordering information spi and qspi are trademarks of motorola, inc. microwire is a trademark of national semiconductor corp. ordering information continued at end of data sheet. pin configuration appears at end of data sheet. ? c ; 4, d o g. part max3110ecwi max3110ecni 0? to +70? 0? to +70? temp. range pin- package 28 wide so 28 plastic dip v cc (v) 5 5
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?max3110e (v cc = +4.5v to +5.5v, t a = t min to t max , unless otherwise noted. typical values are measured for baud rate set to 9600baud at v cc = +5v, t a = +25?c.) (note 2) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and function- al operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifica tions is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd (max3110e) ........................................-0.3v to +6v v cc to gnd (max3111e).........................................-0.3v to +4v v+ to gnd (note 1) ..................................................-0.3v to +7v v- to gnd (note 1) ...................................................+0.3v to -7v v+ to v- (note 1) ..................................................................+13v input voltages to gnd cs , , cts , r, din, sc cc tin, shdn rin nd dt, rts , t, cc irq tt rt cc t, rts c a sc d , dt, irq cc ndc tt nd c c p d t a c s c c p dip c c t r maec c c maee c c s t r c c t , c s t pdip p c pdip pc s pc s p c n , shdn shdn i c i in a parameter sm min tp ma nits i i cc i h ih cc s c h s s i ccshdnh s a i c c in f i h ih cc i i cc s c i cc a s c h s i ccshdnh a i h hst i c i a i c c in f i h ih i i t i h hst i c i in a cnditins shdn nd, shdn n cc shdn cc , shdn nd n dc characteristics cc , t a c art sciatr inpt art ic inpts din, sc, cs, cts , r ) ) rs ic ints tin, shdn ) )
25 max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors _______________________________________________________________________________________ 3 electrical characteristics?max3110e (continued) (v cc = +4.5v to +5.5v, t a = t min to t max , unless otherwise noted. typical values are measured for baud rate set to 9600baud at v cc = +5v, t a = +25?c.) (note 2) conditions units min typ max symbol parameter mv 500 v hyst4 input hysteresis v 0.8 v il4 input low voltage v 2.4 v ih4 input high voltage t a = +25?c k 357 r in input resistance t a = +25?c, v cc = 5v t a = +25?c, v cc = 5v v -25 +25 input voltage range 0.9 i sink = 25ma; tx only output low voltage v ol2 0.4 v i sink = 4ma; dout, rts cc i srce a t iec c d iec a d sc f dt d c ad f cs sc h t csh h h cc a s r r m sc c a c i a esd p c i a h h cc c c t f c i a c c t f cs dt d cs h dt ts tr cs sc s t css dt , cs cc i sin a i srce a cc , t i srce a dt, rts cc , t , irq i sin a h m c ad f c ad f, r cs rs receier inpts rin rs esd prtectin rin, tt rs receier tpts rt rs transmitter tpts tt art tpts dt, t, rts ) rt irq tts irq art ac timin
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 4 _______________________________________________________________________________________ electrical characteristics?max3110e (continued) (v cc = +4.5v to +5.5v, t a = t min to t max , unless otherwise noted. typical values are measured for baud rate set to 9600baud at v cc = +5v, t a = +25?c.) (note 2) conditions units min typ max symbol parameter ns 0 t dh din to sclk hold time ns 100 t ds din to sclk setup time ns 238 t cp sclk period ns 100 t cl sclk low time ns 100 t ch sclk high time ns 100 t cs0 sclk rising edge to cs f t, rts , dt c f r t cs cs h p cs cs r e sc r e t, rts , dt, irq c f f t c f f r s ph ph c f f t s ph ph ph tr s r m d r r p d ph n c f cc , r , t a c, r , c f, r rs ac timin
kv human body model spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors _______________________________________________________________________________________ 5 max3110e/max3111e shdn nd n shdn cc , shdn nd shdn n cnditins f c in i c a i i c hst i h a i ccshdnh s c h s a i cc s c cc i i cc ih i h f c in a i ccshdnh s s c h s s cc ih i h cc i i nits min tp ma sm parameter a i in i c shdn shdn eectrica characteristicsmae cc , a t min t ma , t cc , t a c n t a c, cc cc hst i h i i ih i h a i in i c hst t i h i i ih i h t a c r in i r t a c, cc i r esd p iec a d iec c d i c dc characteristics cc , t a c art sciatr inpt art ic inpts din, sc, cs , r ) ) rs ic ints tin, shdn) rs rcir ints rin) rs sd rtctin rin, tt)
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 6 _______________________________________________________________________________________ electrical characteristics?max3111e (continued) (v cc = +3.0v to +3.6v, v a = t min to t max , unless otherwise noted. typical values are measured for baud rate set to 9600baud at v cc = +3.3v, t a = +25?c.) (note 2) output fall time t f 10 ns tx, rts , dt, irq c ad f cs r e sc r e cs cs h p cs r t t, rts , dt c ad f sc r e cs f cs sc h t ch sc t c sc p cp sc f dt d din sc s t ds din sc h t dh c ad f cs sc h t csh cs dt d cs h dt ts tr cs sc s t css c ad f c ad f, r cs i sin a, t cc i sin a dt, rts h h cc s r r m sc c a c i a i srce a, t parameter sm min tp ma nits c i a h h cc c c t f c i a c c t f dt cs cc i sin a i srce a cc , t i srce a dt, rts cc , t , irq i sin a cnditin rs receier tpts rt rs transmitter tpts tt art tpts dt, t, rts ) rt irq tt irq art ac timin
ns max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors _______________________________________________________________________________________ 7 electrical characteristics?max3111e (continued) (v cc = +3.0v to +3.6v, v a = t min to t max , unless otherwise noted. typical values are measured for baud rate set to 9600baud at v cc = +3.3v, t a = +25?c.) (note 2) note 2: all currents into the device are positive; all currents out of the device are negative. all voltages are referred to device ground unless otherwise noted. note 3: i ccshdn(h) represents a hardware-only shutdown. in hardware shutdown, the uart is in normal operation and the charge pumps for the rs-232 transmitters are shut down. note 4: i ccshdn(h+s) represents a simultaneous software and hardware shutdown in which the uart and charge pumps are shut down. note 5: transmitter skew is measured at the transmitter zero cross points. receiver input to receiver output r l = 3k , c l = 1000pf, one-transmitter switching v cc = 3.3v, r l = 3k to 7k , t a = +25?c, measured from +3v to -3v or -3v to +3v c l = 150pf (note 5) 150 t phl receiver propagation delay kbps 250 maximum data rate v/s 630 transition-region slew rate ns 150 t plh c l = 150pf to 1000pf ns 200 |t phl - t plh | transmitter skew ns 100 |t phl - t plh | receiver skew 430 c l = 150pf to 2500pf conditions units min typ max symbol parameter rs-232 ac timing
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 8 _______________________________________________________________________________________ 0 10 5 15 30 35 40 25 20 50 0 1000 2000 250kbps 3000 4000 5000 rs-232 transceiver supply current vs. load capacitance max3110e/toc09 load capacitance (pf) supply current (ma) 45 transmitter 1 at data rate transmitter 2 at data rate 3k rs-232 transmitter slew rate vs. load capacitance max3110e/toc11 load capacitance (pf) slew rate (v/ s) transmitter 1 at 250kbps 3k rs-232 transmitter output voltage vs. load capacitance max3110e/toc07 load capacitance (pf) transmitter output voltage (v) transmitter 1 at 250kbps transmitter 2 at 15.6kbps 3k uart supply current vs. temperature 200 100 800 700 max3110e-01 temperature ( c) supply current ( a) 020 80 600 500 400 300 max3110e, v cc = +5v max3111e, v cc = +3.3v 1.8432mhz crystal transmitting at 115.2kbps 10 9 0 -40 -20 40 60 100 uart shutdown current vs. temperature 2 1 8 7 max3110e-02 temperature ( c) shutdown current ( a) 020 80 6 5 4 3 1.8432mhz crystal max3110e, v cc = +5v max3111e, v cc = +3.3v 400 50 100 10k 1000 100k 1m uart supply current vs. baud rate 150 100 max3110e-03 baud rate (bps) supply current ( a) 200 250 350 300 1.8432mhz crystal max3110e max3111e +5v standby +5v transmitting +3v transmitting +3v standby 700 600 0 01 3 4 5 uart supply current vs. external clock frequency 100 500 max3110e-04 external clock frequency (mhz) supply current ( a) 2 400 300 200 max3110e v cc = +5v max3111e v cc = +3.3v 70 0 0 0.2 0.1 0.6 0.7 0.8 1.0 max3111e tx, rts, dout output current vs. output low voltage (v cc = +3.3v) 10 max3110e-05 voltage (v) output sink current (ma) 0.3 0.5 0.4 0.9 60 50 40 30 20 rts tx dout 90 80 0 0 0.2 0.1 0.6 0.7 0.8 1.0 max3110e tx, rts, dout output current vs. output low voltage (v cc = +5v) 10 70 max3110e-06 voltage (v) output sink current (ma) 0.3 0.5 0.4 0.9 60 50 40 30 20 rts tx dout
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors _______________________________________________________________________________________ 9 pin description positive terminal of internal inverting charge-pump capacitor. do not make any connection to this terminal. c2+ 24 negative terminal of internal inverting charge-pump capacitor. do not make any connection to this terminal. c2- 25 -5.5v generated by the internal charge pump. do not make any connection to this terminal. v- 26 ground gnd 27 rs-232 transmitter output 2 t2out 28 uart active-low interrupt output. open-drain interrupt output to microprocessor. irq h s i d shdn rs d shdn d p d c n d c spimicrire sd i s i din spimicrire sd h cs dt spimicrire sc i s sc art a cs i dt cs irq , t, rts s cs art a sd t art c c cms s c, , c r art c c cms s c, , c r art cs a i r cts cts art rs a c rts a rs rts art a sd i t rs a r t r rs r , ttcms rt rs r i rin rs t tt p s cc rs t , ttcms tin rs t , ttcms tin pin rs r , ttcms rt rs r i rin fnctin name
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 10 ______________________________________________________________________________________ detailed description the max3110e/max3111e contain an spi/qspi/microwire- compatible uart and an rs-232 transceiver with two drivers and two receivers. the uart is compatible with spi and qspi for cpol = 0 and cpha = 0. the uart supports data rates up to 230kbaud for standard uart bit streams as well as irda and includes an 8-word receive fifo. also included is a 9-bit-address recogni- tion interrupt. the rs-232 transceiver has electrostatic discharge (esd) protection on the transmitter outputs and the receiver inputs. the internal charge-pump capacitors minimize the number of external components required. the rs-232 transceivers meet eia/tia-232 specifica- tions for v cc down to the minimum supply voltage and are guaranteed to operate for data rates up to 250kbps. the uart and rs-232 functions operate as one device or independently since the two functions share only supply and ground connections. uart the universal asynchronous receiver transmitter (uart) interfaces the spi/ qspi/ microwire-compati- ble synchronous serial data from a microprocessor (p) to asynchronous, serial-data communication ports (rs- 232, irda). figure 1 shows the max3110e/max3111e functional diagram. included in the uart function is an spi/ qspi/ microwire interface, a baud-rate generator, and an interrupt generator. spi interface interrupt logic pr rx shift register pt tx shift register t2out t2in 9 pr rx buffer pt tx buffer pr rx fifo 9 9 9 9 9 9 4 internal 5k 5k internal internal internal t1out r2in t1in r2out r1in v+ gnd v- shdn irq r1out c1+ c1- c2+ c2- v cc rx x2 x1 tx cts rts baud-rate generator dout sclk cs din i/o charge pump max3110e/max3111e figure 1. max3110e/max3111e functional diagram
max3110e/max3111e max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 11 spi interface the max3110e/max3111e are compatible with spi, qspi (cpol = 0, cpha = 0), and microwire serial- interface standards (figure 2). the max3110e/ max3111e have a unique full-duplex-only architecture that expects a 16-bit word for din and simultaneously produces a 16-bit word for dout regardless of which read/write register is used. the din stream is moni- tored for its first two bits to tell the uart the type of data transfer being executed (see the write configuration register , read configuration register , write data register , and read data registe r sections). din (mosi) is latched on sclk?s rising edge. dout (miso) should be read into the p on sclk?s rising edge. the first bit (bit 15) of dout transitions on cs , sc f spi i cs , , m , , cs e cs , a c r f t c , r c, d, r d r t pr f cs sc sc sc sc cp , cpha cp , cpha cp , cpha cp , cpha cmpatie ith maemae nt cmpatie ith maemae din ms s dt ms s f c cp cpha t m cs sc din dt cs css c ds dh d ch d tr csh cs f d s t s s spi p
max3110e/max3111e 12 ______________________________________________________________________________________ spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 15 cs sclk din dout 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 data updated 1 1 fen shdn tm rm pm ram ir st pe l b3 b2 b1 b0 rt 0 0 0 00 00 00 00 000 figure 4. write configuration register example idle second stop bit is omitted if st = 0. pe = 1, l = 1 time d0 start d1 d2 d3 d4 d5 d6 pt stop stop idle idle pe = 1, l = 0 d0 start d1 d2 d3 d4 d5 d6 d7 pt stop stop idle idle pe = 0, l = 1 d0 start d1 d2 d3 d4 d5 d6 stop stop idle idle pe = 0, l = 0 d0 start d1 d2 d3 d4 d5 d6 d7 stop stop idle figure 5. parity and word-length control
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 13 table 1. bit descriptions 0 pe por state write parity-enable bit. appends the pt bit to the transmitted data when pe = 1, and sends the pt bit as written. no parity bit is transmitted when pe = 0. with pe = 1, an extra bit is expected to be received. this data is put into the pr register. pr = 0 when pe = 0. the max3110e/max3111e do not calculate parity. 0 pe read reads the value of the parity-enable bit. 0 pm m p irq pm p t descriptin p rp t pe t, pe i pe , p p fif n ir r ir it tpe r d s s t r d s r it name pe f pe r p tp t pe i , maemae i pe , p n dd e fif , d fen fif e e fif fen fen , fif fen fife r fen ir e ida ir n cts csi r cts cts cts dd t r e d pm r pm t r r fif n e f r fif i r d d , r sc rm m r irq rm r t rm r rm t ram m rafe irq ram rafe t ram r ram t rts rs c rts t rts rts
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 14 ______________________________________________________________________________________ notice to high-level programmers: the uart follows the spi convention of providing a bidirectional data path for writes and reads. whenever the data is written, data is also read back. this speeds operation over the spi bus, and the uart needs this speed advantage when operating at high baud rates. in most high-level lan- guages, such as c, there are commands for writing and reading stream i/o devices such as the console or serial port. in c specifically, there is a putchar command that transmits a character and a getchar command that receives a character. if programmers were to write direct write and read commands in c with no underlying driver code, they would notice that a putchar com- mand is really a putgetchar command. these c commands assume some form of bios-level support for these commands. the proper way to implement these commands is to write driver code, usually in the form of an assembly-language interrupt-service routine and a callable routine used by high-level routines. this driver handles the interrupts and manages the receive and transmit buffers for the max3110e/max3111e. when a putchar executes, this driver is called and it safely buffers any characters received when the current character is transmitted. when a getchar executes, it checks its own receive buffer before getting data from the uart. see the c-language outline of a max3110e/ max3111e software driver in listing 1, which appears at the end of this data sheet. listing 1 is a c-language outline of an interrupt-driven software driver that interfaces to a max3110e/ max3111e, providing an intermediate layer between the bit-manipulation subroutine and the familiar putchar/getchar subroutines. the user must supply code for managing the transmit and receive queues as well as the low-level hardware interface itself. the interrupt control hardware must be initialized before this driver is called. table 1. bit descriptions (continued) por state description bit type bit name 0 shdni write software-shutdown bit. enter software shutdown with a write configuration where shdni = 1. software shutdown takes effect after cs , s r, t, rafe, dd, dd, p, p, fif rts cts e c shdn t cs rts cts r p d shdn shdn s r t r c shdn art n t t rsrs t shdn rafe rafe i , ra i , fe i , r ra i , fe a fe , fif , t c t fe r d fe , art st ts st t st t st r st tm m t irq tm t t tm r tm t t te f t te te i te , rts cs t rts , p, dd cs te
max3110e/max3111e write configuration register (d15, d14 = 1, 1) configure the uart by writing a 16-bit word to the write configuration register, which programs the baud rate, data word length, parity enable, and enable of the 8- word receive fifo. in this mode, bits 15 and 14 of the din configuration word are both required to be 1 in order to enable the write configuration mode. bits 13e0 of the din configuration word set the configuration of the uart. table 2 shows the bit assignment for the write configuration register. the write configuration reg- ister allows selection between normal uart timing and irda timing, provides shutdown control, and contains four interrupt mask bits. using the write configuration register clears the receive fifo and the r, t, ra/fe, d0red7r, d0ted7t, pr, and pt registers. rts and cts remain unchanged. the new configuration is valid on cs t i t , t fen , shdn, ir, st, pe, , t tm , rm , pm , ram sc dt r t maemae t r t , t art , t art r c m d, d , t art i , din , , din , art t m t t m t din i , cs , rts t t cs t d r d, d , t r r fif , din dt , din dt t din , dt r fif t t rts , te i , r sc r d r d, d , r fif , din din t r r irq i , r sc spimicrirec art esd p rs t i c
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 16 ______________________________________________________________________________________ 6 st 0 7 ir 0 2 b2 0 3 b3 0 0 b0 0 1 b1 0 4 l 0 5 pe 0 10 rm tm ram pm shdn fen t din dt r it t c d, d , n dt r , d fif r , r fif dt t , t t , t dt , din , c din fen , fif fen , fif din shdn , e shdn , e din tm , t tm , t din rm , d fif rm , d fif din pm , p pm , p din ram , r f ram , r f din ir , ida ir , ida din st , t st , t din pe , p p pe , p din , pe , pe din , r d s t d dt cs c sc
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 17 table 3. read configuration (d15, d14 = 0, 1) notes: bit 15: dout r = 1, data is available to be read or is being read from the receive register or fifo. r = 0, receive register and fifo are empty. bit 14: dout t = 1, transmit buffer is empty. t = 0, transmit buffer is full. bit 13: dout fen , fif fen , fif dt shdn , s shdn , s dt tm , t tm , t dt rm , d fif rm , d fif dt pm , p pm , p dt ram , r f ram , r f dt ir , ida ir , ida dt st , t st , t dt pe , p p pe , p dt , pe , pe dt r d s t , din , r c din din i test cs , rts c test , d d dt cs c sc t st ir din dt r it test pe rm tm ram pm shdn fen
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 18 ______________________________________________________________________________________ table 4. write data (d15, d14 = 1, 0) notes: bit 15: dout r = 1, data is available to be read or is being read from the receive register or fifo. r = 0, receive register and fifo are empty. bit 14: dout t = 1, transmit buffer is empty. t = 0, transmit buffer is full. bits 13e11: dout zeros bit 10: dout ra/fe = receive-activity (uart shutdown)/framing-error (normal operation) bit bit 9: dout cts = cts i cts , cts dt p r p t pe dt dd r d d , din , d din din te , d rts te , e din rts , c rts rts , c rts din p , t i pe , i pe , p , t i pe , i pe , din dd t d d d dt cs c sc t d d d d din d dt r d it d d d d d d d d d d te rafe p p rts cts
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 19 table 5. read data (d15, d14 = 0, 0) notes: bits 15: dout r = 1, data is available to be read or is being read from the receive register or fifo. r = 0, receive register and fifo are empty. bit 14: dout t = 1, transmit buffer is empty. t = 0, transmit buffer is full. bits 13e11: dout zeros bit 10: dout ra/fe = receive-activity (uart shutdown)/framing-error (normal operation) bit bit 9: dout cts = cts i cts , cts dt p r t pe dt dd r d d , din , r d din d dt cs c sc cts p rafe d d d d d it d r dt din d d t
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 20 ______________________________________________________________________________________ baud-rate generator the baud-rate generator determines the rate at which the transmitter and receiver operate. bits b3eb0 in the write configuration register determine the baud-rate divisor (brd), which divides the x1 oscillator frequen- cy. the on-board oscillator operates with either a 1.8432mhz or a 3.6864mhz crystal or is driven at x1 with a 45% to 55% duty-cycle square wave. table 6 shows baud-rate divisors for given input codes as well as the baud rate for 1.8432mhz and 3.684mhz crystals. the generator?s clock is 16-times the baud rate. interrupt sources and masks using the read data or write data register clears the interrupt irq, t f f irq maemae e s s din maemae c t mae mae , , , mh he ca e s s din maemae c t mae mae , , , mh he ca r fif t maemae fif art art fif , fif t fif, fen c t fif , fen r c t r s ad rate sc mh ad diisin rati ad rate sc mh irq n rm mas tm mas pm mas transitin n r shtdn ram mas framin errr shtdn ram mas r s q ne data aaiae data read transmit ffer empt data read pe and receied parit it pe r receied parit it r s q r s q f f d i s m s d
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 21 uart software shutdown when in software shutdown, the uart?s oscillator turns off to reduce power dissipation. the uart enters shut- down by a software command (shdni bit = 1). the software shutdown is entered upon completing the transmission of the data in both the transmit register and the transmit-buffer register. the shdno bit is set when the uart enters shutdown. the microcontroller (c) monitors the shdno bit to determine when the uart is shut down and then shuts down the rs-232 transceivers. software shutdown clears the receive fifo, r, ra/fe, d0red7r, pr, and pt registers and sets the t bit high. configuration bits ( rm , tm , pm , ram , ir, st, pe, , , rts shdn cts a ra , r t art shdn , cs a cs , c art rts cts i , t rs , art s rs t h s d cp c t , mae mae t , , , e t i s m d meanin hen set descriptin r t r rafe ram t ra r , fe ra r ra maemae irq ra ram fe fif t fe fe irq fe ram mas it p pm t p t p pe t p pe a p fif t p r d it name d r rm t r fif fif a r rm t t tm t t irq tm t sc r d d cs r d a , t
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 22 ______________________________________________________________________________________ laplink is a trademark of traveling software. rs-232 transmitters the transmitters are inverting-level translators that con- vert cmos-logic levels to 5.0v eia/tia-232 levels. the transmitters guarantee a 230kbps data rate with worst- case loads of 3k in parallel with 1000pf, providing compatibility with pc-to-pc communication software (such as laplinka). transmitters can be paralleled because the outputs are forced into a high-impedance state when the device is in hardware shutdown ( shdn nd t maemae t c nd cc rs r t rs cms t maemae , rs t h s s i ccshdnh shdn , , cc , , t , f c shdn cc t art rs esd p a m , esd t maemae m esd t esd esd , , a esd , maemae , rs esd h m cd m iec a m iec esd t c esd c m q a qa , , h m f h m, f t f esd , iec t iec esd t mae mae iec esd t h m iec iec , iec h, esd iec h m f iec , f iec esd shdn tt tt cc f mae t e s p
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 23 the air-gap test involves approaching the device with a charged probe. the contact-discharge method connects the probe to the device before the probe is energized. machine model the machine model for esd tests all pins using a 200pf storage capacitor and zero discharge resis- tance. its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. of course, all pins require this protec- tion during manufacturing, not just rs-232 inputs and outputs. therefore, after pc board assembly, the machine model is less relevant to i/o ports. applications information crystals, oscillators, and ceramic resonators the max3110e/max3111e include an oscillator circuit derived from an external crystal oscillator for baud-rate generation. for standard baud rates, use a 1.8432mhz or 3.6864mhz crystal. the 1.8432mhz crystal results in lower operating current; however, the 3.6864mhz crystal may be more readily available in surface mount. charge-current limit resistor discharge resistance storage capacitor c s 100pf r c 1m r d 1500
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 24 ______________________________________________________________________________________ ceramic resonators are low-cost alternatives to crystals and operate similarly, although the q and accuracy are lower. some ceramic resonators are available with inte- gral load capacitors, which can further reduce cost. the tradeoff between crystals and ceramic resonators is in initial-frequency accuracy and temperature drift. keep the total error in the baud-rate generator below 1% for reliable operation with other systems. this is accom- plished easily with a crystal and, in most cases, is achieved with ceramic resonators. table 8 lists different types of crystals and resonators and their suppliers. th e max3110e/max3111e?s oscillator supports paral- lel-resonant mode crystals and ceramic resonators or can be driven from an external clock source. internally, the oscillator consists of an inverting amplifier with its input, x1, tied to its output, x2, by a bias network that self-biases the inverter at approximately v cc /2. the external feedback circuit, usually a crystal from x2 to x1, provides 180? of phase shift, causing the circuit to oscil- late. as shown in the standard application circuit, the crystal or resonator is connected between x1 and x2, with the load capacitance for the crystal being the series combination of c1 and c2. for example, for a 1.8432mhz crystal with a specified load capacitance of 11pf, use capacitors of 22pf on either side of the crystal to ground. series-resonant mode crystals have a slight frequency error, typically oscillating 0.03% higher than specified series-resonant frequency when operated in parallel mode. note: it is very important to keep crystal, resonator, and load-capacitor leads and traces as short and direct as possible. make the x1 and x2 trace lengths and ground tracks short, with no intervening traces. this helps mini- mize parasitic capacitance and noise pickup in the oscillator, and reduces emi. minimize capacitive load- ing on x2 to minimize supply current. the max3110e/ max3111e?s x1 input can be driven directly by an external cmos clock source. the trip level is approxi- mately equal to v cc /2. make no connection to x2 in this mode. if a ttl or non-cmos clock source is used, ac- couple it with a 10nf capacitor to x1. a 2v peak-to- peak swing on the input is required for reliable operation. rs-232 transmitter outputs exiting shutdown figure 7 shows two rs-232 transmitter outputs exiting shutdown mode. as they become active, the two trans- mitter outputs are shown going to opposite rs-232 lev- els (one transmitter input is high; the other is low). each transmitter is loaded with 3k in parallel with 2500pf. the transmitter outputs display no ringing or undesir- able transients as they come out of shutdown. note that the transmitters are enabled only when the magnitude of v- exceeds approximately 3v. table 8. component and supplier list murata north america ecs international, inc. supplier csa1.84mg ecs-18-13-1 part number 800-831-9172 913-782-7787 phone number description 1.8432 through-hole ceramic resonator 1.8432 through-hole crystal (hc-49/u) frequency (mhz) 47 25 typical c1, c2 (pf) ecs international, inc. ecs international, inc. ecs-36-20-5p ecs-36-18-4 913-782-7787 913-782-7787 3.6864 smt crystal 3.6864 through-hole crystal (hc-49/us) 39 33 avx/kyocera pbrc-3.68b 803-448-9411 3.6864 smt ceramic resonator none (integral)
high data rates the max3110e/max3111e maintain the rs-232 5.0v minimum transmitter output-voltage specification even at the highest guaranteed data rate. figure 10 shows a transmitter loopback test circuit. figure 11 shows a loopback test result at 120kbps, and figure 12 shows the same test at 250kbps. for figure 11, both transmit- ters are driven simultaneously at 120kbps into an rs- 232 receiver in parallel with 1000pf. for figure 12, a single transmitter is driven at 250kbps, and both trans- mitters are loaded with an rs-232 receiver in parallel with 1000pf. interconnection with 3.3v and 5v logic the max3110e/max3111e can directly interface with various 3.3v and 5v logic families, including act and hct cmos. see table 9 for more information on possi- ble combinations of interconnections. typical applications the max3110e/max3111e each contain a uart, two rs-232 drivers, and two rs-232 receivers in one pack- age. the standard rs-232 typical operating circuit is shown in figure 13. max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 25 2 s/div t1in t1out r1out 5v/div 5v/div 5v/div v cc = 3.3v (max3111e), v cc = 5.0v (max3110e) figure 11. loopback test result at 120kbps max3110e max3111e 5k r_ in r_ out c2- c2+ c1- c1+ v- v+ v cc 0.1 f v cc shdn t_ out t_ in gnd v cc 1000pf figure 10. loopback test circuit 2 s/div t1in t1out r1out 5v/div 5v/div 5v/div v cc = 3.3v (max3111e), v cc = 5.0v (max3110e) figure 12. loopback test result at 250kbps rx tx v cc v cc shdn 232 active 232 shutdown din dout sclk cs irq 100k p rs-232 i/o c2+ gnd c2- v+ v- c1+ c1- max3110e max3111e cts r2out r1out t1in t2in t1out x2 x1 rts r1in r2in t2out figure 13. rs-232 typical operating circuit
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 26 ______________________________________________________________________________________ an ir and rs-232 typical operating circuit is shown in figure 14. since the max3110e/max3111e?s internal uart has irda capability, a standard ir transceiver (the max3120) can be used to provide the irda com- munication. the two-driver/two-receiver rs-232 trans- ceiver can be used with a software uart to provide rs-232 communication. 9-bit networks the max3110e/max3111e support a common multi- drop communication technique referred to as 9-bit mode. in this mode, the parity bit is set to indicate a message that contains a header with a destination address. the max3110e/max3111e?s parity mask can be set to generate interrupts for this condition. operating a network in this mode reduces the process- ing overhead of all nodes by enabling the slave con- trollers to ignore most message traffic. this relieves the remote processor to handle more useful tasks. table 9. logic-family compatibility with various supply voltages cts rx tx v cc shdn 232 active 232 shutdown din dout sclk cs c1+ c1- v+ v- tx rx txd rxd irda i/o p rs-232 i/o uart in irda mode non-irda uart c2+ gnd c2- max3110e max3111e max3120 rts r2out r1out t1in t2in r2in r1in t1out x2 x1 t2out irq 100k v cc figure 14. ir and rs-232 typical operating circuit 5 (max3111e) logic power-supply voltage (v) 3.3 (max3111e) 5 (max3110e) compatible with act and hct cmos, and with ac, hc, or cd4000 cmos compatibility compatible with all cmos families compatible with all ttl and cmos fami- lies 3.3 v cc supply voltage (v) 3.3 5
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 27 in 9-bit mode, the max3110e/max3111e is set up with eight bits plus parity. the parity bit in all normal mes- sages is clear but is set in an address-type message. the max3110e/max3111e?s parity-interrupt mask gen- erates an interrupt on high parity when enabled. when the master sends an address message with the parity bit set, all max3110e/max3111e nodes issue an inter- rupt. all nodes then retrieve the received byte to com- pare to their assigned address. once addressed, the node continues to process each received byte. if the node was not addressed, it ignores all message traffic until a new address is sent out by the master. the parity/9th-bit interrupt is controlled only by the data in the receive register and is not affected by data in the fifo, so the most effective use of the parity/9th-bit interrupt is with fifo disabled. with the fifo disabled, received non-address words can be ignored and not even read from the uart. for more detailed informa- tion on 9-bit mode, refer to the max3100 data sheet. sir irda mode the max3110e/max3111e?s irda mode can be used to communicate with other irda sir-compatible devices or to reduce power consumption in opto-isolat- ed applications. in irda mode, a bit period is shortened to 3/16 of a baud period (1.61s at 115,200 baud). a data zero is transmitted as a pulse of light (tx pin = logic low, rx pin = logic high), as shown in figure 15. in receive mode, the rx signal?s sampling is done halfway into the transmission of a high level. the sam- pling is done once (instead of three times, as in normal mode). the max3110e/max3111e ignore pulses short- er than approximately 1/16 of the baud period. the irda device that is communicating with the max3110e/ max3111e must be set to transmit pulses at 3/16 of the baud period. for compatibility with other irda devices, set the format to 8-bit data, one stop, no parity. for more detailed information on sir irda mode, refer to the max3100 data sheet. layout and power-supply _____________________considerations the max3110e/max3111e require basic layout tech- niques and fundamental power supply considerations. the minimum requirements include: (1) placing a 1f ceramic bypass capacitor as close as possible to v cc , preferably right next to the v cc lead or on the opposite side of the pcb directly below the v cc lead; (2) using an internal ground plane within the pcb, returning all circuit grounds to this ground plane, or using a ?star? ground technique where all circuit grounds are returned to a common ground point at the ?gnd? lead of the ic; 3) ensuring that the power source to the ic has a low inductive path and is high-frequency bypassed to absorb esd events with significant changes in the supply voltage. start stop start stop normal rx uart frame data bits 01 1 11 1 000 0 normal uart tx 11 11 1 000 0 irda rx irda tx figure 15. irda timing
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 28 ______________________________________________________________________________________ this is a c-language outline of an interrupt-driven software driver that interfaces to a max3110e/max3111e, providing an intermediate layer between the bit-manipulation subroutine and the familiar putchar / getchar subroutines. user must supply code for managing the transmit and receive queues, as well as the low-level hardware interface itself. the interrupt control hardware must be initialized before this driver is called. char is an 8 bit character. int is a 16 bit unsigned integer. & is the bitwise boolean and operator. | is the bitwise boolean or operator. /* high level interface routine to put a character to the max3110e/max3111e. */ putchar ( char c ) { enqueue ( txqueue, c ); /* enable the transmit-buffer-empty interrupt */ config = config | 0x0800; /* set the tm bit */ config = config | 0xc000; /* set bits 15 and 14 */ max3110e/max3111e ( config ); } /* high level interface routine to get a character from the max3110e/max3111e. ** wait for a character to be received, if necessary. */ char getchar ( ) { while ( isqueueempty ( rxqueue ) ) /* wait for data to be received */ ; return dequeue ( rxqueue ); } /* configure the max3110e/max3111e with the specified baud rate. */ configuremax3110e/max3111e ( int baud_rate_index ) { baud_rate_index = baud_rate_index & 0x000f; /* restrict to a 4 bit field */ config = 0xc400 + baud_rate_index; /* enable received data interrupt */ max3110e/max3111e ( config ); } /* private variable that stores the configuration settings for the max3110e/max3111e */ int config; /* low level communication routine between the computer and the max3110e/max3111e. ** this is a private routine to be used only within the driver software. */ int max3110e/max3111e ( int mosi ) { int miso; /* this is interface-specific. ** transmit 16 bits of master-out, slave-in data, msb first, ** while simultaneously receiving 16 bits of master-in, slave-out data. ** if and spi hardware interface is available, use (cpol=0,cpha=0) mode. ** lacking specialized hardware, just set and clear i/o bits to generate ** the waveform in figures 2 and 3 in the max3110e/max311e data sheet. */ return miso; /* return 16 bits of master-in, slave-out data, msb first */ } listing 1. outline for a max3110e/max3111e software driver
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors ______________________________________________________________________________________ 29 /* this driver needs a txqueue transmit-data queue and a rxqueue receive-data queue. ** these can be ring buffers or any other kind of first-in, first-out data queue. */ enqueue ( queue , char ) char dequeue ( queue ) true/false isqueueempty ( queue ) /* interrupt service routine called when the max3110emax3111e's int pin falls to a low level. ** this is a private routine to be used only within the driver software. */ servicemax3110e/max3111eint ( ) { int rxdata; int txdata; char c; /* issue a read data command to discover the cause of the interrupt */ rxdata = max3110e/max3111e ( 0 ); if ( rxdata & 0x8000 ) /* the r bit = 1 */ { c = rxdata & 0x00ff; /* get the received character data */ enqueue ( rxqueue, c ); } if ( rxdata & 0x4000 ) /* the t bit = 1 */ { if ( isqueueempty ( txqueue ) ) { /* mask the transmit-buffer-empty interrupt */ config = config & ~ 0x0800; /* clear the tm bit */ config = config | 0xc000; /* set bits 15 and 14 */ max3110e/max3111e ( config ); } else /* transmit some data */ { /* issue a write data command */ txdata = dequeue ( txqueue ); c = txdata & 0x00ff; /* get the transmit character */ max3110e/max3111e ( 0x8000 | c ); } } } /* end of servicemax3110e/max3111eint */ listing 1. outline for a max3110e/max3111e software driver (continued)
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors 30 ______________________________________________________________________________________ chip information transistor count: 7977 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 t2out gnd v- c2- c2+ c1- din c1+ v+ shdn irq cs sclk dout tx rx rts cts x1 x2 v cc t1out r1in r1out t1in t2in r2out r2in narrow dip/wide so top view max3110e max3111e pin configuration ordering information 3.3 3.3 3.3 3.3 5 v cc (v) 5 28 plastic dip -40?c to +85?c max3110eeni 28 wide so -40?c to +85?c max3110eewi 28 plastic dip 28 wide so -40?c to +85?c -40?c to +85?c max3111eeni max3111eewi 28 plastic dip 28 wide so 0?c to +70?c 0?c to +70?c max3111ecni max3111e cwi pin- package temp. range part package type package code document no. 28 wide so ? 21-0042 28 plastic dip ? 21-0043 package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to th e package regardless of rohs status.
max3110e/max3111e spi/microwire-compatible uart and 15kv esd- protected rs-232 transceivers with internal capacitors maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 31 ? 2005 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 7/99 initial release. 1 12/05 added the soldering temperature to the absolute maximum ratings . 2

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