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? 2005 microchip technology inc. ds21929a-page 1 93aa46a/b/c, 93lc46a/b/c, 93c46a/b/c 93aa56a/b/c, 93lc56a/b/c, 93c56a/b/c 93aa66a/b/c, 93lc66a/b/c, 93c66a/b/c 93aa76a/b/c, 93lc76a/b/c, 93c76a/b/c 93aa86a/b/c, 93lc86a/b/c, 93c86a/b/c features: ? densities from 1 kbits through 16 kbits ? low-power cmos technology ? available with or without org function: with org function: - org pin at logic lo: 8-bit word - org pin at logic hi: 16-bit word without org function: - ?a? version: 8-bit word - ?b? version: 16-bit word ? program enable pin: - write-protect for entire array (93xx76c and 93xx86c only) ? self-timed erase/write cycles (including auto-erase) ? automatic eral before wral ? power-on/off data protection circuitry ? industry standard 3-wire serial i/o ? device status signal (ready/busy ) ? sequential read function ? 1,000,000 e/w cycles ? data retention > 200 years ? temperature ranges supported: pin function table description: microchip technology inc. supports the 3-wire microwire bus with low-voltage serial electrically erasable proms (eeprom) that range in density from 1 kbits up to 16 kbits. each density is available with and without the org fu nctionality, and selected by the part number ordered. advanced cmos technology makes these devices ideal for low power, nonvolatile memory applications. the en tire series of microwire devices are available in the standard 8-lead pdip and soic packages as well as the more advanced packag- ing such as the 8-lead msop, 8-lead tssop, 6-lead sot-23, and 8-lead dfn (2x3). these packages are all available in a pb-free (matte tin) finish. packaging with the sn/pb finish is also av ailable as a custom device. pin diagrams (not to scale) - industrial (i) -40c to +85c - automotive (e) -40c to +125c name function cs chip select clk serial data clock di serial data input do serial data output v ss ground pe program enable org memory configuration v cc power supply note: org and pe functionality not available in all products. see table 1-1, device selection table. pdip/soic (p, sn) cs clk di do 1 2 3 4 8 7 6 5 v cc nc org v ss rotated soic (ex: 93lc46bx) tssop/msop cs clk di do 1 2 3 4 8 7 6 5 v cc pe (2,3) org (1,3) v ss (st, ms) sot-23 do v ss di 1 2 3 6 5 4 v cc cs clk (ot) note 1: org pin: only on 93xx46c/56c/66c/76c/86c. 2: pe pin: only on 93xx76c/86c. 3: org/pe: no internal connections on 93xxa/b. di do v ss org 1 2 3 4 8 7 6 5 clk cs v cc pe (1,3) (1,3) (2,3) dfn (mc) 1 2 3 4 5 6 7 8 cs clk di do v cc pe (2,3) org (1,3) v ss 1k-16k microwire compatible serial eeproms note: please visit www.microchip.com/pbfree for the la test information on pb-free conversion.
93xx46x/56x/66x/76x/86x ds21929a-page 2 ? 2005 microchip technology inc. table 1-1: device selection table part number density (kbits) v cc range org pin organization (words) pe pin temp range packages 93xx46a/b/c 93aa46a 1 1.8-5.5 no 128 x 8 bits no i p, sn, st, ms, ot, mc 93aa46b 1 1.8-5.5 no 64 x 16 bits no i p, sn, st, ms, ot, mc 93aa46c 1 1.8-5.5 yes selectable x8 or x16 no i p, sn, st, ms, mc 93lc46a 1 2.5-5.5 no 128 x 8 bits no i, e p, sn, st, ms, ot, mc 93lc46b 1 2.5-5.5 no 64 x 16 bits no i, e p, sn, st, ms, ot, mc 93lc46c 1 2.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc 93c46a 1 4.5-5.5 no 128 x 8 bits no i, e p, sn, st, ms, ot, mc 93c46b 1 4.5-5.5 no 64 x 16 bits no i, e p, sn, st, ms, ot, mc 93c46c 1 4.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc 93aa46ax/bx/cx, 93lc46ax/bx/cx, 93c46ax/bx/c x (alternate pinout with die rotated 90) 93aa46ax 1 1.8-5.5 no 128 x 8 bits no i p, sn, st, ms, ot, mc 93aa46bx 1 1.8-5.5 no 64 x 16 bits no i p, sn, st, ms, ot, mc 93aa46cx 1 1.8-5.5 yes selectable x8 or x16 no i p, sn, st, ms, mc 93lc46ax 1 2.5-5.5 no 128 x 8 bits no i, e p, sn, st, ms, ot, mc 93lc46bx 1 2.5-5.5 no 64 x 16 bits no i, e p, sn, st, ms, ot, mc 93lc46cx 1 2.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc 93c46ax 1 4.5-5.5 no 128 x 8 bits no i, e p, sn, st, ms, ot, mc 93c46bx 1 4.5-5.5 no 64 x 16 bits no i, e p, sn, st, ms, ot, mc 93c46cx 1 4.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc 93xx56a/b/c 93aa56a 2 1.8-5.5 no 256 x 8 bits no i p, sn, st, ms, ot, mc 93aa56b 2 1.8-5.5 no 128 x 16 bits no i p, sn, st, ms, ot, mc 93aa56c 2 1.8-5.5 yes selectable x8 or x16 no i p, sn, st, ms, mc 93lc56a 2 2.5-5.5 no 256 x 8 bits no i, e p, sn, st, ms, ot, mc 93lc56b 2 2.5-5.5 no 128 x 16 bits no i, e p, sn, st, ms, ot, mc 93lc56c 2 2.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc 93c56a 2 4.5-5.5 no 256 x 8 bits no i, e p, sn, st, ms, ot, mc 93c56b 2 4.5-5.5 no 128 x 16 bits no i, e p, sn, st, ms, ot, mc 93c56c 2 4.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc 93xx66a/b/c 93aa66a 4 1.8-5.5 no 512 x 8 bits no i p, sn, st, ms, ot, mc 93aa66b 4 1.8-5.5 no 256 x 16 bits no i p, sn, st, ms, ot, mc 93aa66c 4 1.8-5.5 yes selectable x8 or x16 no i p, sn, st, ms, mc 93lc66a 4 2.5-5.5 no 512 x 8 bits no i, e p, sn, st, ms, ot, mc 93lc66b 4 2.5-5.5 no 256 x 16 bits no i, e p, sn, st, ms, ot, mc 93lc66c 4 2.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc 93c66a 4 4.5-5.5 no 512 x 8 bits no i, e p, sn, st, ms, ot, mc 93c66b 4 4.5-5.5 no 256 x 16 bits no i, e p, sn, st, ms, ot, mc 93c66c 4 4.5-5.5 yes selectable x8 or x16 no i, e p, sn, st, ms, mc
? 2005 microchip technology inc. ds21929a-page 3 93xx46x/56x/66x/76x/86x 93xx76a/b/c 93aa76a 8 1.8-5.5 no 1024 x 8 bits no i ot 93aa76b 8 1.8-5.5 no 512 x 16 bits no i ot 93aa76c 8 1.8-5.5 yes selectable x8 or x16 yes i p, sn, st, ms, mc 93lc76a 8 2.5-5.5 no 1024 x 8 bits no i, e ot 93lc76b 8 2.5-5.5 no 512 x 16 bits no i, e ot 93lc76c 8 2.5-5.5 yes selectable x8 or x16 yes i, e p, sn, st, ms, mc 93c76a 8 4.5-5.5 no 1024 x 8 bits no i, e ot 93c76b 8 4.5-5.5 no 512 x 16 bits no i, e ot 93c76c 8 4.5-5.5 yes selectable x8 or x16 yes i, e p, sn, st, ms, mc 93xx86a/b/c 93aa86a 16 1.8-5.5 no 2048 x 8 bits no i ot 93aa86b 16 1.8-5.5 no 1024 x 16 bits no i ot 93aa86c 16 1.8-5.5 yes selectable x8 or x16 yes i p, sn, st, ms, mc 93lc86a 16 2.5-5.5 no 2048 x 8 bits no i, e ot 93lc86b 16 2.5-5.5 no 1024 x 16 bits no i, e ot 93lc86c 16 2.5-5.5 yes selectable x8 or x16 yes i, e p, sn, st, ms, mc 93c86a 16 4.5-5.5 no 2048 x 8 bits no i, e ot 93c86b 16 4.5-5.5 no 1024 x 16 bits no i, e ot 93c86c 16 4.5-5.5 yes selectable x8 or x16 yes i, e p, sn, st, ms, mc table 1-1: device selection table (continued) part number density (kbits) v cc range org pin organization (words) pe pin temp range packages
93xx46x/56x/66x/76x/86x ds21929a-page 4 ? 2005 microchip technology inc. 2.0 electrical characteristics absolute maximum ratings (?) v cc ............................................................................................................................... ..............................................7.0v all inputs and outputs w.r.t. v ss ......................................................................................................... -0.6v to v cc +1.0v storage temperature ............................................................................................................ ...................-65c to +150c ambient temperature with power applied ......................................................................................... .......-40c to +125c esd protection on all pins ............................................................................................................................... ....................... 4kv ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. table 2-1: dc characteristics all parameters apply over the specified ranges unless otherwise noted. v cc = 1.8v to 5.5v industrial (i): t a = -40c to +85c automotive (e): t a = -40c to +125c param. no. symbol parameter min typ max units conditions d1 v ih 1 v ih 2 high-level input voltage 2.0 0.7 v cc ? ? v cc +1 v cc +1 v v v cc 2.7v v cc < 2.7v d2 v il 1 v il 2 low-level input voltage -0.3 -0.3 ? ? 0.8 0.2 v cc v v v cc 2.7v v cc < 2.7v d3 v ol 1 v ol 2 low-level output voltage ? ? ? ? 0.4 0.2 v v i ol = 2.1 ma, v cc = 4.5v i ol = 100 a, v cc = 2.5v d4 v oh 1 v oh 2 high-level output voltage 2.4 v cc -0.2 ? ? ? ? v v i oh = -400 a, v cc = 4.5v i oh = -100 a, v cc = 2.5v d5 i li input leakage current ? ? 1 av in = v ss to v cc d6 i lo output leakage current ? ? 1 av out = v ss to v cc d7 c in , c out pin capacitance (all inputs/outputs) ??7 pfv in /v out = 0v (note 1) t a = 25c, f clk = 1 mhz d8 i cc write write current ? ? 2 ma f clk = 3 mhz, v cc = 5.5v (93xx46x/56x/66x) ? ? ? 500 3 ? ma a f clk = 3 mhz, v cc = 5.5v (93xx76x/86x) f clk = 2 mhz, v cc = 2.5v d9 i cc read read current ? ? ? ? ? 100 1 500 ? ma a a f clk = 3 mhz, v cc = 5.5v f clk = 2 mhz, v cc = 3.0v f clk = 2 mhz, v cc = 2.5v d10 i ccs standby current ? ? ? ? 1 5 a a i-temp (note 2, 3) e-temp clk = cs = 0v org = di = v ss or v cc d11 v por v cc voltage detect ? ? 1.5v 3.8v ? ? v v 93aax6a/b/c, 93lcx6a/b/c, 93cx6a/b/c (note 1) note 1: this parameter is periodically sampled and not 100% tested. 2: org and pe pins not available on ?a? or ?b? versions. 3: ready/busy status must be cleared from do, see section 4.4 ?data out (do)? .
? 2005 microchip technology inc. ds21929a-page 5 93xx46x/56x/66x/76x/86x table 2-2: ac characteristics all parameters apply over the specified ranges unless otherwise noted. v cc = 1.8v to 5.5v industrial (i): t a = -40c to +85c automotive (e): t a = -40c to +125c param. no. symbol parameter min max units conditions a1 f clk clock frequency ? 3 2 1 mhz mhz mhz 4.5v v cc < 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v a2 t ckh clock high time 200 250 450 ?ns ns ns 4.5v v cc < 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v a3 t ckl clock low time 100 200 450 ?ns ns ns 4.5v v cc < 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v a4 t css chip select setup time 50 100 250 ?ns ns ns 4.5v v cc < 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v a5 t csh chip select hold time 0 ? ns 1.8v v cc < 5.5v a6 t csl chip select low time 250 ? ns 1.8v v cc < 5.5v a7 t dis data input setup time 50 100 250 ?ns ns ns 4.5v v cc < 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v a8 t dih data input hold time 50 100 250 ?ns ns ns 4.5v v cc < 5.5v 2.5v v cc < 4.5v 1.8v v cc < 2.5v a9 t pd data output delay time ? 100 ns 4.5v v cc < 5.5v, cl = 100 pf (93c76x/86x) ?200 250 400 ns ns ns 4.5v v cc < 5.5v, cl = 100 pf 2.5v v cc < 4.5v, cl = 100 pf 1.8v v cc < 2.5v, cl = 100 pf a10 t cz data output disable time ? 100 200 ns ns 4.5v v cc < 5.5v, (note 1) 1.8v v cc < 4.5v, (note 1) a11 t sv status valid time ? 200 300 500 ns ns ns 4.5v v cc < 5.5v, cl = 100 pf 2.5v v cc < 4.5v, cl = 100 pf 1.8v v cc < 2.5v, cl = 100 pf a12 t wc program cycle time ? 5 ms erase/write mode 93xx76x/86x (aa and lc versions) ? 6 ms 93xx46x/56x/66x (aa and lc versions) a13 t wc ? 2 ms 93c46x/56x/66x/76x/86x a14 t ec program cycle time ? 6 ms eral mode, 4.5v v cc 5.5v a15 t wl ? 15 ms wral mode, 4.5v v cc 5.5v a16 ? endurance 1m ? cycles 25c, v cc = 5.0v, (note 2) note 1: this parameter is periodically sampled and not 100% tested. 2: this application is not tested but ensured by characterization. for endurance estimates in a specific application, please consult the total endurance? model which may be downloaded from www.microchip.com.
93xx46x/56x/66x/76x/86x ds21929a-page 6 ? 2005 microchip technology inc. figure 2-1: synchronous data timing cs v ih v il v ih v il v ih v il v oh v ol v oh v ol clk di do (read) do (program) t css t dis t ckh t ckl t dih t pd t csh t pd t cz status valid t sv t cz note: status valid time (t sv ) is relative to cs.
? 2005 microchip technology inc. ds21929a-page 7 93xx46x/56x/66x/76x/86x table 2-4: instruction set for 93xx56a/b/c table 2-3: instruction set for 93xx46a/b/c instruction sb opcode address data in data out req. clk cycles 93xx46b or 93xx46c with org = 1 (16-bit word organization) erase 1 11 a5 a4 a3 a2 a1 a0 ? (rdy/bsy) 9 eral 100 10xxxx ? (rdy/bsy )9 ewds 100 00xxxx ?high-z 9 ewen 100 11xxxx ?high-z 9 read 1 10 a5a4a3a2a1a0 ? d15-d0 25 write 1 01 a5 a4 a3 a2 a1 a0 d15-d0 (rdy/bsy )25 wral 100 01xxxx d15-d0 (rdy/bsy )25 93xx46a or 93xx46c with org = 0 (8-bit word organization) erase 1 11 a6a5a4a3a2a1a0 ? (rdy/bsy )10 eral 100 10xxxxx ? (rdy/bsy )10 ewds 100 00xxxxx ?high-z10 ewen 100 11xxxxx ?high-z10 read 1 10 a6a5a4a3a2a1a0 ? d7-d0 18 write 1 01 a6a5a4a3a2a1a0 d7-d0 (rdy/bsy )18 wral 100 01xxxxx d7-d0 (rdy/bsy )18 instruction sb opcode address data in data out req. clk cycles 93xx56b or 93xx56c with org = 1 (16-bit word organization) erase 111 x a6 a5 a4 a3 a2 a1 a0 ? (rdy/bsy )11 eral 100 10xxxxxx ? (rdy/bsy )11 ewds 100 00xxxxxx ?high-z11 ewen 100 11xxxxxx ?high-z11 read 110 x a6 a5 a4 a3 s2 a1 a0 ? d15-d0 27 write 101 x a6 a5 a4 a3 s2 a1 a0 d15-d0 (rdy/bsy )27 wral 100 01xxxxxx d15-d0 (rdy/bsy )27 93xx56a or 93xx56c with org = 0 (8-bit word organization) erase 111 x a7 a6 a5 a4 a3 a2 a1 a0 ? (rdy/bsy )12 eral 100 10xxxxxxx ? (rdy/bsy )12 ewds 100 00xxxxxxx ?high-z12 ewen 100 11xxxxxxx ?high-z12 read 110 x a7 a6 a5 a4 a3 a2 a1 a0 ? d7-d0 20 write 101 x a7 a6 a5 a4 a3 a2 a1 a0 d7-d0 (rdy/bsy )20 wral 100 01xxxxxxx d7-d0 (rdy/bsy )20
93xx46x/56x/66x/76x/86x ds21929a-page 8 ? 2005 microchip technology inc. table 2-5: instruction set for 93xx66a/b/c table 2-6: instruction set for 93xx76a/b/c instruction sb opcode address data in data out req. clk cycles 93xx66b or 93xx66c with org = 1 (16-bit word organization) erase 1 11 a7a6a5a4a3a2a1a0 ? (rdy/bsy )11 eral 100 10xxxxxx ? (rdy/bsy )11 ewds 100 00xxxxxx ?high-z11 ewen 100 11xxxxxx ?high-z11 read 1 10 a7a6a5a4a3a2a1a0 ? d15-d0 27 write 1 01 a7a6a5a4a3a2a1a0 d15-d0 (rdy/bsy )27 wral 100 01xxxxxx d15-d0 (rdy/bsy )27 93xx66a or 93xx66c with org = 0 (8-bit word organization) erase 1 11 a8a7a6a5a4a3a2a1a0 ? (rdy/bsy )12 eral 100 10xxxxxxx ? (rdy/bsy )12 ewds 100 00xxxxxxx ?high-z12 ewen 100 11xxxxxxx ?high-z12 read 1 10 a8a7a6a5a4a3a2a1a0 ? d7-d0 20 write 1 01 a8a7a6a5a4a3a2a1a0 d7-d0 (rdy/bsy )20 wral 100 01xxxxxxx d7-d0 (rdy/bsy )20 instruction sb opcode address data in data out req. clk cycles 93xx76b or 93xx76c with org = 1 (16-bit word organization) erase 111 x a8 a7 a6 a5 a4 a3 a2 a1 a0 ? (rdy/bsy )13 eral 100 10xxxxxxxx ? (rdy/bsy )13 ewds 100 00xxxxxxxx ?high-z13 ewen 100 11xxxxxxxx ?high-z13 read 110 x a8 a7 a6 a5 a4 a3 a2 a1 a0 ? d15-d0 29 write 101 x a8 a7 a6 a5 a4 a3 a2 a1 a0 d15-d0 (rdy/bsy )29 wral 100 01xxxxxxxx d15-d0 (rdy/bsy )29 93xx76a or 93xx76c with org = 0 (8-bit word organization) erase 111 x a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 ? (rdy/bsy )14 eral 100 1 0xxxxxxxxx ? (rdy/bsy )14 ewds 100 0 1xxxxxxxxx ?high-z14 ewen 100 1 1xxxxxxxxx ?high-z14 read 110 x a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 ? d7-d0 22 write 101 x a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 d7-d0 (rdy/bsy )22 wral 100 0 1xxxxxxxxx d7-d0 (rdy/bsy )22
? 2005 microchip technology inc. ds21929a-page 9 93xx46x/56x/66x/76x/86x table 2-7: instruction set for 93xx86a/b/c instruction sb opcode address data in data out req. clk cycles 93xx86b or 93xx86c with org = 1 (16-bit word organization) erase 1 11 a9a8a7a6a5a4a3a2a1a0 ? (rdy/bsy )13 eral 100 10xxxxxxxx ? (rdy/bsy )13 ewds 100 00xxxxxxxx ?high-z13 ewen 100 11xxxxxxxx ?high-z13 read 1 10 a9a8a7a6a5a4a3a2a1a0 ? d15-d0 29 write 1 01 a9a8a7a6a5a4a3a2a1a0d15-d0 (rdy/bsy )29 wral 100 01xxxxxxxx d15-d0 (rdy/bsy )29 93xx86a or 93xx86c with org = 0 (8-bit word organization) erase 1 11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 ? (rdy/bsy )14 eral 100 1 0xxxxxxxxx ? (rdy/bsy )14 ewds 100 0 0xxxxxxxxx ?high-z14 ewen 100 1 1xxxxxxxxx ?high-z14 read 1 10 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 ? d7-d0 22 write 1 01 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 d7-d0 (rdy/bsy )22 wral 100 0 1xxxxxxxxx d7-d0 (rdy/bsy )22
93xx46x/56x/66x/76x/86x ds21929a-page 10 ? 2005 microchip technology inc. 3.0 functional description when the org pin is connected to v cc , the (x16) organization is selected. when it is connected to ground, the (x8) organization is selected. instruc- tions, addresses and write data are clocked into the di pin on the rising edge of the clock (clk). the do pin is normally held in a high-z state except when reading data from the device, or when checking the ready/busy status during a programming operation. the ready/busy status can be verified during an erase/write operation by polling the do pin; do low indicates that programming is still in progress, while do high indicates the device is ready. do will enter the high-z state on the falling edge of cs. 3.1 start condition the start bit is detected by the device if cs and di are both high with respect to the positive edge of clk for the first time. before a start condition is detected, cs, clk and di may change in any combination (except to that of a start condition), without resulting in any device operation (read, write, erase, ewen, ewds, eral or wral). as soon as cs is high, the device is no longer in standby mode. an instruction following a start condition will only be executed if the required opcode, address and data bits for any particular instruction are clocked in. 3.2 data in/data out (di/do) it is possible to connect the data in and data out pins together. however, with this configuration it is possible for a ?bus conflict? to occur during the ?dummy zero? that precedes the read operation, if a0 is a logic high level. under such a condition the voltage level seen at data out is undefined and will depend upon the relative impedances of data out and the signal source driving a0. the higher the current sourcing capability of the driver, the higher the voltage at the data out pin. in order to limit this current, a resistor should be connected between di and do. 3.3 data protection all modes of operation are inhibited when v cc is below a typical voltage of 1.5v for ?93aaxx? and ?93lcxx? devices or 3.8v for ?93cxx? devices. the ewen and ewds commands give additional protection against accidentally programming during normal operation. after power-up, the device is automatically in the ewds mode. therefore, an ewen instruction must be performed before the initial erase or write instruction can be executed. block diagram note: when preparing to transmit an instruction, either the clk or di signal levels must be at a logic low as cs is toggled active high. note: for added protection, an ewds command should be performed after every write operation and an external 10 k pull-down protection resistor should be added to the cs pin. note: to prevent accidental writes to the array in the 93xx76c/86c devices, set the pe pin to a logic low. di do clk cs org* pe** i/o control memory control logic x dec hv generator eeprom array byte latches y decoder sense amp. r/w control logic v cc v ss
? 2005 microchip technology inc. ds21929a-page 11 93xx46x/56x/66x/76x/86x 3.4 erase the erase instruction forces all data bits of the specified address to the logical ?1? state. cs is brought low following the loading of the last address bit. this falling edge of the cs pin initiates the self-timed programming cycle, except on ?93cxx? devices where the rising edge of clk before the last address bit ini- tiates the write cycle. the do pin indicates the ready/busy status of the device if cs is brought high after a minimum of 250 ns low (t csl ). do at logical ?0? indicates that programming is still in progress. do at logical ?1? indicates that the register at the specified address has been erased and the device is ready for another instruction. figure 3-1: erase timing for 93aaxx and 93lcxx devices figure 3-2: erase timing for 93cxx devices note: after the erase cycle is complete, issuing a start bit and then taking cs low will clear the ready/busy status from do. cs clk di do t csl check status 111 a n a n -1 a n -2 ??? a0 t sv t cz b usy ready high-z t wc high-z cs clk di do t csl check status 111 a n a n -1 a n -2 ??? a0 t sv t cz b usy ready high-z t wc high-z
93xx46x/56x/66x/76x/86x ds21929a-page 12 ? 2005 microchip technology inc. 3.5 erase all (eral) the erase all ( eral ) instruction will erase the entire memory array to the logical ?1? state. the eral cycle is identical to the erase cycle, except for the different opcode. the eral cycle is completely self-timed and commences at the falling edge of the cs, except on ?93cxx? devices where the rising edge of clk before the last data bit initiates the write cycle. clocking of the clk pin is not necessary after the device has entered the eral cycle. the do pin indicates the ready/busy status of the device, if cs is brought high after a minimum of 250 ns low (t csl ). v cc must be 4.5v for proper operation of eral. figure 3-3: eral timing for 93aaxx and 93lcxx devices figure 3-4: eral timing for 93cxx devices note: after the eral command is complete, issuing a start bit and then taking cs low will clear the ready/busy status from do. cs clk di do t csl check status 100 10 x ??? x t sv t cz busy ready high-z t ec high-z vcc must be 4.5v for proper operation of eral. cs clk di do t csl check status 100 1 0 x ??? x t sv t cz busy ready high-z t ec high-z
? 2005 microchip technology inc. ds21929a-page 13 93xx46x/56x/66x/76x/86x 3.6 erase/write disable and enable (ewds/ewen) the 93xx series devices power-up in the erase/write disable ( ewds ) state. all programming modes must be preceded by an erase/write enable ( ewen ) instruction. once the ewen instruction is executed, programming remains enabled until an ewds instruction is executed or v cc is removed from the device. to protect against accidental data disturbance, the ewds instruction can be used to disable all erase/write functions and should follow all programming operations. execution of a read instruction is independent of both the ewen and ewds instructions. figure 3-5: ewds timing figure 3-6: ewen timing cs clk di 10 000 x ??? x t csl 1 x cs clk di 00 1 1 x t csl ???
93xx46x/56x/66x/76x/86x ds21929a-page 14 ? 2005 microchip technology inc. 3.7 read the read instruction outputs the serial data of the addressed memory location on the do pin. a dummy zero bit precedes the 8-bit (if org pin is low or a-version devices) or 16-bit (if org pin is high or b-version devices) output string. the output data bits will toggle on the rising edge of the clk and are stable after the spec- ified time delay (t pd ). sequential read is possible when cs is held high. the memory data will automatically cycle to the next register and output sequentially. figure 3-7: read timing cs clk di do 110 an ??? a0 high-z 0 dx ??? d0 dx ??? d0 ??? dx d0
? 2005 microchip technology inc. ds21929a-page 15 93xx46x/56x/66x/76x/86x 3.8 write the write instruction is followed by 8 bits (if org is low or a-version devices) or 16 bits (if org pin is high or b-version devices) of data which are written into the specified address. for 93aaxx and 93lcxx devices, after the last data bit is clocked into di, the falling edge of cs initiates the self-timed auto-erase and program- ming cycle. for 93cxx devices, the self-timed auto- erase and programming cycle is initiated by the rising edge of clk on the last data bit. the do pin indicates the ready/busy status of the device, if cs is brought high after a minimum of 250 ns low (t csl ). do at logical ?0? indicates that programming is still in progress. do at logical ?1? indicates that the register at the specified address has been written with the data specified and the device is ready for another instruction. figure 3-8: write timing for 93aaxx and 93lcxx devices figure 3-9: write timing for 93cxx devices note: for devices with pe functionality such as the 93xx76c or 93xx86c, the write sequence requires a logic low signal on the pe pin prior to the rising edge of the last data bit. note: after the write cycle is complete, issuing a start bit and then taking cs low will clear the ready/busy status from do. cs clk di do 1 0 1 an ??? a0 dx ??? d0 busy ready high-z high-z twc t csl t cz t sv cs clk di do 1 0 1 an ??? a0 dx ??? d0 busy ready high-z high-z twc t csl t cz t sv
93xx46x/56x/66x/76x/86x ds21929a-page 16 ? 2005 microchip technology inc. 3.9 write all (wral) the write all ( wral ) instruction will write the entire memory array with the data specified in the command. for 93aaxx and 93lcxx devices, after the last data bit is clocked into di, the falling edge of cs initiates the self-timed auto-erase and programming cycle. for 93cxx devices, the self-timed auto-erase and pro- gramming cycle is initiated by the rising edge of clk on the last data bit. clocking of the clk pin is not neces- sary after the device has entered the wral cycle. the wral command does include an automatic eral cycle for the device. therefore, the wral instruction does not require an eral instruction, but the chip must be in the ewen status. the do pin indicates the ready/busy status of the device if cs is brought high after a minimum of 250 ns low (t csl ). v cc must be 4.5v for proper operation of wral. figure 3-10: wral timing for 93aaxx and 93lcxx devices figure 3-11: wral timing for 93cxx devices note: for devices with pe functionality such as the 93xx76c or 93xx86c, the write sequence requires a logic low signal on the pe pin prior to the rising edge of the last data bit. note: after the write all cycle is complete, issuing a start bit and then taking cs low will clear the ready/busy status from do. cs clk di do h igh -z 1 0 0 01 x ??? x dx ??? d0 high-z busy ready t wl v cc must be 4.5v for proper operation of wral. t csl t sv t cz cs clk di do h igh -z 1 0 0 01 x ??? x dx ??? d0 high-z busy ready t wl t csl t sv t cz
? 2005 microchip technology inc. ds21929a-page 17 93xx46x/56x/66x/76x/86x 4.0 pin descriptions table 4-1: pin descriptions 4.1 chip select (cs) a high level selects the device; a low level deselects the device and forces it into standby mode. however, a programming cycle which is already in progress will be completed, regardless of the chip select (cs) input signal. if cs is brought low during a program cycle, the device will go into standby mode as soon as the programming cycle is completed. cs must be low for 250 ns minimum (t csl ) between consecutive instructions. if cs is low, the internal control logic is held in a reset status. 4.2 serial clock (clk) the serial clock is used to synchronize the communi- cation between a master device and the 93xx series device. opcodes, address and data bits are clocked in on the positive edge of clk. data bits are also clocked out on the positive edge of clk. clk can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to clock high time (t ckh ) and clock low time (t ckl ). this gives the controlling mas- ter freedom in preparing opcode, address and data. clk is a ?don't care? if cs is low (device deselected). if cs is high, but the start condition has not been detected (di = 0 ), any number of clock cycles can be received by the device without changing its status (i.e., waiting for a start condition). clk cycles are not required during the self-timed write (i.e., auto erase/write) cycle. after detection of a start condition the specified number of clock cycles (respectively low-to-high transitions of clk) must be provided. these clock cycles are required to clock in all required opcode, address and data bits before an instruction is executed. clk and di then become ?don't care? inputs waiting for a new start condition to be detected. 4.3 data in (di) data in (di) is used to clock in a start bit, opcode, address and data synchronously with the clk input. 4.4 data out (do) data out (do) is used in the read mode to output data synchronously with the clk input (t pd after the positive edge of clk). this pin also provides ready/busy status information during erase and write cycles. ready/busy status information is available on the do pin if cs is brought high after being low for minimum chip select low time (t csl ) and an erase or write operation has been initiated. the status signal is not available on do, if cs is held low during the entire erase or write cycle. in this case, do is in the high-z mode. if status is checked after the erase/write cycle, the data line will be high to indicate the device is ready. name soic/pdip/msop/ tssop/dfn sot-23 function cs 1 5 chip select clk 2 4 serial clock di 3 3 data in do 4 1 data out v ss 5 2 ground org 6n/a organization (93xx46c/56c/66c/76c/86c) nc (1) no connect on 93xxa/b devices pe 7n/a program enable (93xx76c/86c) nc (1) no connect on 93xxa/b devices v cc 8 6 power supply note 1: with no internal connection, logic levels on nc pins are ?don?t cares.? note: after the read cycle is complete, issuing a start bit and then taking cs low will clear the ready/busy status from do.
93xx46x/56x/66x/76x/86x ds21929a-page 18 ? 2005 microchip technology inc. 4.5 organization (org) when the org pin is connected to v cc or logic hi, the (x16) memory organization is selected. when the org pin is tied to v ss or logic lo, the (x8) memory organization is selected. for proper operation, org must be tied to a valid logic level. for devices without the org functionality, there is no internal connection to the org pin. in these devices the functionality has been set at the factory to support a single word size. ?a? series devices ? x8 organization ?b? series devices ? x16 organization 4.6 program enable (pe) a logic level on the pe pin will enable or disable the ability to write data to the memory array in only the 8- lead 93xx76c and 93xx86c devices. for all other devices the pe function is not present and the pe pin is a no connect. when driving the pe pin to a logic high, the device can be programmed, but when the pe pin is driven low, programming is inhibited. this pin is used in parallel with the ewen/ewds latch to protect the memory array from inadvertent writes, as shown in table 4-2. in either the 93xx76c or 93xx86c devices, the pe pin must be tied to a specific logic level and cannot be floated. in all other devices without the pe function, the pe pin has no internal connections and programming is always enabled. table 4-2: write protection scheme ewen/ewds latch pe pin* array write enabled 1 yes disabled 1 no enabled 0 no disabled 0 no * pe pin level does not alter the state of the ewen/ewds latch. note: for logic control, the pe pin must be driven high before the chip select enables the device and must remain high until the chip select is disabled.
? 2005 microchip technology inc. ds21929a-page 19 93xx46x/56x/66x/76x/86x appendix a: revision history revision a original release of document. combined all the 93-series microwire serial eeprom device data sheets.
93xx46x/56x/66x/76x/86x ds21929a-page 20 ? 2005 microchip technology inc. 5.0 packaging information 5.1 package marking information txxxxnnn xxxxxxxx yyww 8-lead pdip i/p il7 93lc46a 0528 example: pb-free 3-wire 8-lead pdip package marking (pb-free or sn/pb) part line 1 marking part line 1 marking part line 1 marking 93aa46a 93aa46a 93lc46a 93lc46a 93c46a 93c46a 93aa46b 93aa46b 93lc46b 93lc46b 93c46b 93c46b 93aa46c 93aa46c 93lc46c 93lc46c 93c46c 93c46c 93aa56a 93aa56a 93lc56a 93lc56a 93c56a 93c56a 93aa56b 93aa56b 93lc56b 93lc56b 93c56b 93c56b 93aa56c 93aa56c 93lc56c 93lc56c 93c56c 93c56c 93aa66a 93aa66a 93lc66a 93lc66a 93c66a 93c66a 93aa66b 93aa66b 93lc66b 93lc66b 93c66b 93c66b 93aa66c 93aa66c 93lc66c 93lc66c 93c66c 93c66c 93aa76a 93aa76a 93lc76a 93lc76a 93c76a 93c76a 93aa76b 93aa76b 93lc76b 93lc76b 93c76b 93c76b 93aa76c 93aa76c 93lc76c 93lc76c 93c76c 93c76c 93aa86a 93aa86a 93lc86a 93lc86a 93c86a 93c86a 93aa86b 93aa86b 93lc86b 93lc86b 93c86b 93c86b 93aa86c 93aa86c 93lc86c 93lc86c 93c86c 93c86c note: temperature range on second line. 3 e i/p 1l7 93lc46a 0528 example: sn/pb legend: xx...x part number or part number code t temperature (i, e) y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code (2 characters for small packages) pb-free jedec designator for matte tin (sn) note : for very small packages with no room for the pb-free jedec designator , the marking will only appear on the outer carton or reel label. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e note: please visit www.microchip.com/pbfree for the latest information on pb-free conversion.
? 2005 microchip technology inc. ds21929a-page 21 93xx46x/56x/66x/76x/86x 8-lead soic xxxxyyww xxxxxxxt nnn example: pb-free sn 0528 93lc46ai 1l7 3-wire 8-lead soic (sn) package marking (pb-free or sn/pb) part line 1 marking part line 1 marking part line 1 marking 93aa46a 93aa46at 93lc46a 93lc46at 93c46a 93c46at 93aa46b 93aa46bt 93lc46b 93lc46bt 93c46b 93c46bt 93aa46c 93aa46ct 93lc46c 93lc46ct 93c46c 93c46ct 93aa56a 93aa56at 93lc56a 93lc56at 93c56a 93c56at 93aa56b 93aa56bt 93lc56b 93lc56bt 93c56b 93c56bt 93aa56c 93aa56ct 93lc56c 93lc56ct 93c56c 93c56ct 93aa66a 93aa66at 93lc66a 93lc66at 93c66a 93c66at 93aa66b 93aa66bt 93lc66b 93lc66bt 93c66b 93c66bt 93aa66c 93aa66ct 93lc66c 93lc66ct 93c66c 93c66ct 93aa76a 93aa76at 93lc76a 93lc76at 93c76a 93c76at 93aa76b 93aa76bt 93lc76b 93lc76bt 93c76b 93c76bt 93aa76c 93aa76ct 93lc76c 93lc76ct 93c76c 93c76ct 93aa86a 93aa86at 93lc86a 93lc86at 93c86a 93c86at 93aa86b 93aa86bt 93lc86b 93lc86bt 93c86b 93c86bt 93aa86c 93aa86ct 93lc86c 93lc86ct 93c86c 93c86ct note: t = temperature range: i = industrial, e = extended 3 e example: sn/pb i/sn 0528 93lc46a 1l7 note: for sn/pb devices the temperature range appears on the second line. note: please visit www.microchip.com/pbfree for the latest information on pb-free conversion. legend: xx...x part number or part number code t temperature (i, e) y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code (2 characters for small packages) pb-free jedec designator for matte tin (sn) note : for very small packages with no room for the pb-free jedec designator , the marking will only appear on the outer carton or reel label. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e
93xx46x/56x/66x/76x/86x ds21929a-page 22 ? 2005 microchip technology inc. 3-wire 2x3 dfn package marking (pb-free) part industrial line 1 marking e-temp line 1 marking part industrial line 1 marking e-temp line 1 marking part industrial line 1 marking e-temp line 1 marking 93aa46a 301 302 93lc46a 304 305 93c46a 307 308 93aa46b 311 312 93lc46b 314 315 93c46b 317 318 93aa46c 321 322 93lc46c 324 325 93c46c 327 328 93aa56a 331 332 93lc56a 334 335 93c56a 337 338 93aa56b 341 342 93lc56b 344 345 93c56b 347 348 93aa56c 351 352 93lc56c 354 355 93c56c 357 358 93aa66a 361 362 93lc66a 364 365 93c66a 367 368 93aa66b 371 372 93lc66b 374 375 93c66b 377 378 93aa66c 381 382 93lc66c 384 385 93c66c 387 388 93aa76c 3b1 3b2 93lc76c 3b4 3b5 93c76c 3b7 3b8 93aa86c 3e1 3e2 93lc86c 3e4 3e5 93c86c 3e7 3e8 8-lead 2x3 dfn example: 304 506 l7 xxx yww nn note: please visit www.microchip.com/pbfree for the latest information on pb-free conversion. legend: xx...x part number or part number code t temperature (i, e) y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code (2 characters for small packages) pb-free jedec designator for matte tin (sn) note : for very small packages with no room for the pb-free jedec designator , the marking will only appear on the outer carton or reel label. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e
? 2005 microchip technology inc. ds21929a-page 23 93xx46x/56x/66x/76x/86x example: pb-free 6-lead sot-23 xxnn 1el7 3-wire 6-lead sot-23 package marking (pb-free) part industrial line 1 marking e-temp line 1 marking part industrial line 1 marking e-temp line 1 marking part industrial line 1 marking e-temp line 1 marking 93aa46a 1bnn 1cnn 93lc46a 1enn 1fnn 93c46a 1hnn 1jnn 93aa46b 1lnn 1mnn 93lc46b 1pnn 1rnn 93c46b 1tnn 1unn 93aa56a 2bnn 2cnn 93lc56a 2enn 2fnn 93c56a 2hnn 2jnn 93aa56b 2lnn 2mnn 93lc56b 2pnn 2rnn 93c56b 2tnn 2unn 93aa66a 3bnn 3cnn 93lc66a 3enn 3fnn 93c66a 3hnn 3jnn 93aa66b 3lnn 3mnn 93lc66b 3pnn 3rnn 93c66b 3tnn 3unn 93aa76a 4bnn 4cnn 93lc76a 4enn 4fnn 93c76a 4hnn 4jnn 93aa76b 4lnn 4mnn 93lc76b 4pnn 4rnn 93c76b 4tnn 4unn 93aa86a 5bnn 5cnn 93lc86a 5enn 5fnn 93c86a 5hnn 5jnn 93aa86b 5lnn 5mnn 93lc86b 5pnn 5rnn 93c86b 5tnn 5unn legend: xx...x part number or part number code t temperature (i, e) y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code (2 characters for small packages) pb-free jedec designator for matte tin (sn) note : for very small packages with no room for the pb-free jedec designator , the marking will only appear on the outer carton or reel label. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e note: please visit www.microchip.com/pbfree for the latest information on pb-free conversion.
93xx46x/56x/66x/76x/86x ds21929a-page 24 ? 2005 microchip technology inc. 3-wire 8-lead msop package marking (pb-free or sn/pb) part line 1 marking part line 1 marking part line 1 marking 93aa46a 3a46at 93lc46a 3l46at 93c46a 3c46at 93aa46b 3a46bt 93lc46b 3l46bt 93c46b 3c46bt 93aa46c 3a46ct 93lc46c 3l46ct 93c46c 3c46ct 93aa56a 3a56at 93lc56a 3l56at 93c56a 3c56at 93aa56b 3a56bt 93lc56b 3l56bt 93c56b 3c56bt 93aa56c 3a56ct 93lc56c 3l56ct 93c56c 3c56ct 93aa66a 3a66at 93lc66a 3l66at 93c66a 3c66at 93aa66b 3a66bt 93lc66b 3l66bt 93c66b 3c66bt 93aa66c 3a66ct 93lc66c 3l66ct 93c66c 3c66ct 93aa76a 3a76at 93lc76a 3l76at 93c76a 3c76at 93aa76b 3a76bt 93lc76b 3l76bt 93c76b 3c76bt 93aa76c 3a76ct 93lc76c 3l76ct 93c76c 3c76ct 93aa86a 3a86at 93lc86a 3l86at 93c86a 3c86at 93aa86b 3a86bt 93lc86b 3l86bt 93c86b 3c86bt 93aa86c 3a86ct 93lc86c 3l86ct 93c86c 3c86ct note: t = temperature range: i = industrial, e = extended 8-lead msop (150 mil) example: pb-free or sn/pb xxxxxxt ywwnnn 3l46ai 5281l7 legend: xx...x part number or part number code t temperature (i, e) y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code (2 characters for small packages) pb-free jedec designator for matte tin (sn) note : for very small packages with no room for the pb-free jedec designator , the marking will only appear on the outer carton or reel label. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e note: please visit www.microchip.com/pbfree for the latest information on pb-free conversion.
? 2005 microchip technology inc. ds21929a-page 25 93xx46x/56x/66x/76x/86x nnn xxxx tyww 8-lead tssop 1l7 l46a i528 example: pb-free or sn/pb 3-wire 8-lead tssop package marking (pb-free or sn/pb) part line 1 marking part line 1 marking part line 1 marking 93aa46a a46a 93lc46a l46a 93c46a c46a 93aa46b a46b 93lc46b l46b 93c46b c46b 93aa46c a46c 93lc46c l46c 93c46c c46c 93aa56a a56a 93lc56a l56a 93c56a c56a 93aa56b a56b 93lc56b l56b 93c56b c56b 93aa56c a56c 93lc56c l56c 93c56c c56c 93aa66a a66a 93lc66a l66a 93c66a c66a 93aa66b a66b 93lc66b l66b 93c66b c66b 93aa66c a66c 93lc66c l66c 93c66c c66c 93aa76a a76a 93lc76a l76a 93c76a c76a 93aa76b a76b 93lc76b l76b 93c76b c76b 93aa76c a76c 93lc76c l76c 93c76c c76c 93aa86a a86a 93lc86a l86a 93c86a c86a 93aa86b a86b 93lc86b l86b 93c86b c86b 93aa86c a86c 93lc86c l86c 93c86c c86c note: temperature range on second line. legend: xx...x part number or part number code t temperature (i, e) y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code (2 characters for small packages) pb-free jedec designator for matte tin (sn) note : for very small packages with no room for the pb-free jedec designator , the marking will only appear on the outer carton or reel label. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e note: please visit www.microchip.com/pbfree for the latest information on pb-free conversion.
93xx46x/56x/66x/76x/86x ds21929a-page 26 ? 2005 microchip technology inc. 8-lead plastic dual in-line (p) ? 300 mil (pdip) b1 b a1 a l a2 p e eb c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top 51015 51015 mold draft angle bottom 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010? (0.254mm) per side. significant characteristic
? 2005 microchip technology inc. ds21929a-page 27 93xx46x/56x/66x/76x/86x 8-lead plastic small outline (sn) ? narrow, 150 mil (soic) foot angle 048048 15 12 0 15 12 0 mold draft angle bottom 15 12 0 15 12 0 mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l c 45 a2 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic
93xx46x/56x/66x/76x/86x ds21929a-page 28 ? 2005 microchip technology inc. 8-lead plastic dual flat no lead package (mc) 2x3x0.9 mm body (dfn) ? saw singulated exposed pad width exposed pad length contact length *controlling parameter contact width drawing no. c04-123 notes: exposed pad dimensions vary with paddle size. overall width e2 d2 l b e .016 .012 .008 .047 .055 .010 .118 bsc number of pins standoff contact thickness overall length overall height pitch p n units a a1 d a3 dimension limits 8 .000 .001 .008 ref. .079 bsc .031 .020 bsc min inches nom 0.40 0.25 3.00 bsc 0.30 .020 .071 .012 .064 0.20 1.20 1.39 0.50 0.30 1.80 1.62 0.02 0.80 2.00 bsc 0.20 ref. 0.50 bsc millimeters* .002 .039 0.00 min max nom 8 0.05 1.00 max 3. package may have one or more exposed tie bars at ends. 1. pin 1 visual index feature may vary, but must be located within the hatched area. 2. 0.90 .035 (not e 3) (not e 3) 4. jedec equivalent: mo-229 l e2 a3 a1 a top view d e exposed pad metal d2 bottom view 21 b p n (note 1) exposed tie bar pin 1 (note 2) id index area revised 05/24/04 -- -- -- --
? 2005 microchip technology inc. ds21929a-page 29 93xx46x/56x/66x/76x/86x 6-lead plastic small outline transistor (ot) (sot-23) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.50 0.4 3 0. 3 5 .020 .017 .014 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 10 5 0 10 5 0 foot angle 0.55 0.45 0. 3 5 .022 .018 .014 l foot length 3 .10 2.95 2.80 .122 .116 .110 d overall length 1.75 1.6 3 1.50 .069 .064 .059 e1 molded package width 3 .00 2.80 2.60 .118 .110 .102 e overall width 0.15 0.08 0.00 .006 .00 3 .000 a1 standoff 1. 3 0 1.10 0.90 .051 .04 3 .0 3 5 a2 molded package thickness 1.45 1.18 0.90 .057 .046 .0 3 5 a overall height 1.90 .075 p1 outside lead pitch (basic) 0.95 .0 3 8 p pitch 6 6 n number of pins max nom min max nom min dimension limits millimeters inches* units 1 d b n e e1 l c a2 a a1 p1 exceed .005" (0.127mm) per side. dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not notes: jeita (formerly eiaj) equivalent: sc-74a drawing no. c04-120 *controlling parameter
93xx46x/56x/66x/76x/86x ds21929a-page 30 ? 2005 microchip technology inc. 8-lead plastic micro small outline package (ms) (msop) d a a1 l c (f) a2 e1 e p b n 1 2 dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not .0 3 7 ref f footprint (reference) exceed .010" (0.254mm) per side. notes: drawing no. c04-111 *controlling parameter mold draft angle top mold draft angle bottom foot angle lead width lead thickness c b .00 3 .009 .006 .012 dimension limits overall height molded package thickness molded package width overall length foot length standoff overall width number of pins pitch a l e1 d a1 e a2 .016 .024 .118 bsc .118 bsc .000 .0 3 0 .19 3 typ. .0 33 min p n units .026 bsc nom 8 inches 0.95 ref - - .009 .016 0.08 0.22 0 0.2 3 0.40 8 millimeters* 0.65 bsc 0.85 3 .00 bsc 3 .00 bsc 0.60 4.90 bsc .04 3 .0 3 1 .0 3 7 .006 0.40 0.00 0.75 min max nom 1.10 0.80 0.15 0.95 max 8 -- - 15 5 - 15 5 - jedec equivalent: mo-187 0 - 8 5 5 - - 15 15 - - - -
? 2005 microchip technology inc. ds21929a-page 31 93xx46x/56x/66x/76x/86x 8-lead plastic thin shrink small outline (st) ? 4.4 mm (tssop) 10 5 0 10 5 0 mold draft angle bottom 10 5 0 10 5 0 mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 3.10 3.00 2.90 .122 .118 .114 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters* inches units a2 a a1 l c 1 2 d n p b e e1 foot angle 048048 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005? (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-086 significant characteristic
93xx46x/56x/66x/76x/86x ds21929a-page 32 ? 2005 microchip technology inc. notes:
? 2005 microchip technology inc. ds21929a-page 33 93xx46x/56x/66x/76x/86x the microchip web site microchip provides online support via our www site at www.microchip.com. this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchip?s customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com, click on customer change notification and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support ? development systems information line customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://support.microchip.com in addition, there is a development systems information line which lists the latest versions of microchip?s development systems software products. this line also provides information on how customers can receive currently available upgrade kits. the development systems information line numbers are: 1-800-755-2345 ? united states and most of canada 1-480-792-7302 ? other international locations
93xx46x/56x/66x/76x/86x ds21929a-page 34 ? 2005 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip prod- uct. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this document. to : technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds21929a 93xx46x/56x/66x/76x/86x 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you think would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document?
? 2005 microchip technology inc. ds21929a-page 35 93xx46x/56x/66x/76x/86x product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . examples: a) 93aa46a-i/ms: 1k, 128x8 serial eeprom, industrial temperature, msop package, 1.8v b) 93aa46bt-i/ot: 1k, 64x16 serial eeprom, sot-23 package, tape and reel, 1.8v c) 93aa46ct-i/ms: 1k, 128x8 or 64x16 serial eeprom, msop package, tape and reel, 1.8v d) 93aa46bx-i/sn: 1k, 128x8 serial eeprom, industrial temperature, soic package (alter- nate pinout), tape and reel package, 1.8v e) 93lc66a-i/ms: 4k, 512x8 serial eeprom, msop package, 2.5v f) 93lc66bt-i/ot: 4k, 256x16 serial eeprom, sot-23 package, tape and reel, 2.5v g) 93lc66ct-e/sng: 4k, 512x8 or 256x16 serial eeprom, soic package, extended tempera- ture, tape and reel, pb-free finish, 2.5v h) 93c86at-i/ot: 16k, 2048x8 serial eeprom, sot-23 package, tape and reel, 5.0v i) 93c86bt-i/ot: 16k, 1024x16 serial eeprom, sot-23 package, tape and reel, 5.0v j) 93c86ct-i/mc: 16k, 2048x8 or 1024x16 serial eeprom, dfn industrial temperature, tape and reel package, 5.0v eeprom package tape & reel series lead finish v oltage 93 density size word temp range aa = 1.8v-5.5v lc = 2.5v-5.5v c = 4.5v-5.5v 46 = 1 kbit 56 = 2 kbit 66 = 4 kbit 76 = 8 kbit 86 = 16 kbit a = x8 bit b = x16 bit c = selectable blank = std pkg t = tape & reel i = -40c to +85c e = -40c to +125c p = 8-lead pdip sn = 8-lead soic (.150) mc = 8-lead 2x3 dfn ot = 6-lead sot-23 ms = 8-lead msop st = 8-lead tssop blank = pb-free ? matte tin (see note 1 ) g = pb-free ? matte tin only note 1: most products manufactured after january 2005 will have a matte tin (pb-free) finish. most products manufactured before january 2005 will have a finish of approx imately 63% sn and 37% pb (sn/pb). please visit www.microchip.com/pbfree for the latest info rmation on pb-free conversion, including conversion date codes.
93xx46x/56x/66x/76x/86x ds21929a-page 36 ? 2005 microchip technology inc. sales and support data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products.
? 2005 microchip technology inc. ds21929a-page 37 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application m eets with your specifications. microchip makes no representations or war- ranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip?s products as critical components in life support systems is not authorized except with express written approval by microchip. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, accuron, dspic, k ee l oq , micro id , mplab, pic, picmicro, picstart, pro mate, powersmart, rfpic, and smartshunt are registered trademarks of micr ochip technology incorporated in the u.s.a. and other countries. amplab, filterlab, migratable memory, mxdev, mxlab, picmaster, seeval, smartsensor and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, app lication maestro, dspicdem, dspicdem.net, dspicworks, ecan, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, mpasm, mplib, mplink, mpsim, pickit, picdem, picdem.net, piclab, pictail, powercal, powerinfo, powermate, powertool, rflab, rfpicdem, select mode, smart serial, smarttel, total endurance and wiperlock are tr ademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2005, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona and mountain view, california in october 2003. the company?s quality system processes and procedures are for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
ds21929a-page 38 ? 2005 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://support.microchip.com web address: www.microchip.com atlanta alpharetta, ga tel: 770-640-0034 fax: 770-640-0307 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 kokomo kokomo, in tel: 765-864-8360 fax: 765-864-8387 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 san jose mountain view, ca tel: 650-215-1444 fax: 650-961-0286 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8528-2100 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8676-6200 fax: 86-28-8676-6599 china - fuzhou tel: 86-591-8750-3506 fax: 86-591-8750-3521 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - shunde tel: 86-757-2839-5507 fax: 86-757-2839-5571 china - qingdao tel: 86-532-502-7355 fax: 86-532-502-7205 asia/pacific india - bangalore tel: 91-80-2229-0061 fax: 91-80-2229-0062 india - new delhi tel: 91-11-5160-8631 fax: 91-11-5160-8632 japan - kanagawa tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-536-4803 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 taiwan - hsinchu tel: 886-3-572-9526 fax: 886-3-572-6459 europe austria - weis tel: 43-7242-2244-399 fax: 43-7242-2244-393 denmark - ballerup tel: 45-4450-2828 fax: 45-4485-2829 france - massy tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - ismaning tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 england - berkshire tel: 44-118-921-5869 fax: 44-118-921-5820 w orldwide s ales and s ervice 03/01/05

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