femtoclocks? crystal-to-3.3v lvpecl clock generator 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 1 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator g eneral d escription the ics843031 is a 1 gigabit ethernet clock generator and a member of the hiperclocks tm family of high performance devices from ics. the ics843031 can synthesize 1 gigabit ethernet, sonet, or serial ata reference clock frequencies with the appropriate choice of crystal and output divider. the ics843031 has excellent phase jitter performance and is packaged in a small 8-pin tssop, making it ideal for use in systems with limited board space. f eatures ? 1 differential 3.3v lvpecl output ? crystal oscillator interface designed for 18pf parallel resonant crystals ? output frequency range: 290mhz - 350mhz ? rms phase jitter @312.5mhz (1.875mhz - 20mh ? vco frequency range: 580mhz - 700mhz ? rms phase jitter @312.5mhz (1.875mhz - 20mhz): 0.475ps (typical) rms phase jitter @318.75mhz (1.875mhz - 20mhz): 0.475ps (typical) ? 3.3v operating supply ? 0c to 70c ambient operating temperature ? lead-free package rohs compliant hiperclocks? ics ics843031 8-lead tssop 4.40mm x 3.0mm x 0.925mm package body g package top view v cc xtal_out xtal_in v ee 1 2 3 4 q0 nq0 v cc pwr_dn 8 7 6 5 osc phase detector vco 24 (fixed) 2 xtal_in xtal-out nq0 q0 b lock d iagram p in a ssignment f requency t able pwr_dn s t u p n i ) r e i l p i t l u m ( o i t a r n / m y c n e u q e r f t u p t u o ) z h m ( ) z h m ( y c n e u q e r f l a t s y r c 2 9 . 5 22 14 0 . 1 1 3 6 6 1 4 0 . 6 22 15 . 2 1 3 5 2 6 5 . 6 22 15 7 . 8 1 3 idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 1 data sheet ics843031
idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 2 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 2 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator t able 2. p in c haracteristics t able 1. p in d escriptions r e b m u ne m a ne p y tn o i t p i r c s e d 6 , 1v c c r e w o p. n i p y l p p u s e r o c 3 , 2 , t u o _ l a t x n i _ l a t x t u p n i , t u p n i e h t s i n i _ l a t x . e c a f r e t n i r o t a l l i c s o l a t s y r c . t u p t u o e h t s i t u o _ l a t x 4v e e r e w o p. n i p y l p p u s e v i t a g e n 5n d _ r w pt u p n ip u l l u p r o t a l l i c s o ( w o l n e h w e c n a d e p m i h g i h . t u p n i l o r t n o c e t a t s t u p t u o . s l e v e l e c a f r e t n i l t t v l / s o m c v l . ) s p o t s 8 , 70 q , 0 q nt u p t u o. s l e v e l e c a f r e t n i l c e p v l . s t u p t u o k c o l c l a i t n e r e f f i d : e t o n p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t s r e f e r l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u c n i e c n a t i c a p a c t u p n i 4f p r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k
idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 3 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 3 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator t able 3a. p ower s upply dc c haracteristics , v cc = 3.3v5%, t a =0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v c c e g a t l o v y l p p u s e r o c 5 3 1 . 33 . 35 6 4 . 3v i e e t n e r r u c y l p p u s r e w o p 1 = n d _ r w p5 0 1a m 0 = n d _ r w p1 idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 4 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 4 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator t able 4. c rystal c haracteristics r e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u n o i t a l l i c s o f o e d o m l a t n e m a d n u f y c n e u q e r f 2 10 4z h m ) r s e ( e c n a t s i s e r s e i r e s t n e l a v i u q e 0 5 e c n a t i c a p a c t n u h s 7f p l e v e l e v i r d 1w m t able 5. ac c haracteristics , v cc = 3.3v5%, t a =0c to 70c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u f t u o y c n e u q e r f t u p t u o 0 9 20 5 3z h m t ) ? ( t i j ; ) m o d n a r ( r e t t i j e s a h p s m r 1 e t o n : e g n a r n o i t a r g e t n i , z h m 5 . 2 1 3 z h m 0 2 o t z h m 5 7 8 . 1 5 7 4 . 0s p : e g n a r n o i t a r g e t n i , z h m 5 7 . 8 1 3 z h m 0 2 o t z h m 5 7 8 . 1 5 7 4 . 0s p t r t / f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 0 20 0 6s p c d oe l c y c y t u d t u p t u o 6 44 5% . t o l p e s i o n e s a h p e h t o t r e f e r e s a e l p : 1 e t o n
843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 5 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator t ypical p hase n oise at 312.5mh z 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 312.5mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.475ps (typical) o ffset f requency (h z ) n oise p ower dbc hz ? ? ? 318.75mhz rms phase jitter (random) 1.875mhz to 20mhz = 0.475ps (typical) o ffset f requency (h z ) n oise p ower dbc hz 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 t ypical p hase n oise at 318.75mh z phase noise result by adding 1 gigabit ethernet filter to raw data raw phase noise data 1 gigabit ethernet filter ? ? ? phase noise result by adding 1 gigabit ethernet filter to raw data raw phase noise data 1 gigabit ethernet filter 100 1k 10k 100k 1m 10m 100m 100 1k 10k 100k 1m 10m 100m idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 5 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd
idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 6 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 6 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator p arameter m easurement i nformation o utput d uty c ycle /p ulse w idth /p eriod o utput r ise /f all t ime 3.3v o utput l oad ac t est c ircuit scope qx nqx lvpecl 2v -1.3v 0.165v clock outputs 20% 80% 80% 20% t r t f v sw i n g pulse width t period t pw t period odc = q0 nq0 v ee v cc rms p hase j itter phase noise mas k offset frequency f 1 f 2 phase noise plot rms jitter = area under the masked phase noise plot noise power
ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 7 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator a pplication i nformation figure 1. c rystal i npu t i nterface c rystal i nput i nterface the ics843031 has been characterized with 18pf parallel resonant crystals. the capacitor values, c1 and c2, shown in figure 1 below were determined using a 26.04167mhz, 18pf parallel resonant crystal and were chosen to minimize the ppm error. the optimum c1 and c2 values can be slightly adjusted for different board layouts. x1 18pf parallel cry stal c1 12p xtal_out xtal_in c2 12p t ermination for 3.3v lvpecl o utput the clock layout topology shown below is a typical termination for lvpecl outputs. the two different layouts mentioned are recommended only as guidelines. fout and nfout are low impedance follower outputs that generate ecl/lvpecl compatible outputs. therefore, terminat- ing resistors (dc current path to ground) or current sources must be used for functionality. these outputs are designed to f igure 2b. lvpecl o utput t ermination f igure 2a. lvpecl o utput t ermination drive 50 transmission lines.matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. figures 2a and 2b show two different layouts which are recommended only as guidelines. other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. v cc - 2v 50 50 rtt z o = 50 z o = 50 fout fin rtt = z o 1 ((v oh + v ol ) / (v cc ? 2)) ? 2 3.3v 125 125 84 84 z o = 50 z o = 50 fout fin idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 7
idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 8 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 8 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator p ower c onsiderations this section provides information on power dissipation and junction temperature for the ics843051. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ics843051 is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v cc = 3.3v + 5% = 3.465v, which gives worst case results. note: please refer to section 3 for details on calculating power dissipated in the load. ? power (core) max = v cc_max * i ee_typ = 3.465v * 105ma = 363.83mw ? power (outputs) max = 30mw/loaded output pair total power _max (3.465v, with all outputs switching) = 363.8mw + 30mw = 393.8mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 90.5c/w per table 6 below. therefore, tj for an ambient temperature of 70c with all outputs switching is: 70c + 0.394w * 90.5c/w = 105.65c. this is well below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). t able 6. t hermal r esistance ja for 8- pin tssop, f orced c onvection ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 101.7c/w 90.5c/w 89.8c/w
idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 9 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 9 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator 3. calculations and equations. the purpose of this section is to derive the power dissipated into the load. lvpecl output driver circuit and termination are shown in figure 4. t o calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of v cc - 2v. ? for logic high, v out = v oh_max = v cc_max ? 0.9v (v cco_max - v oh_max ) = 0.9v ? for logic low, v out = v ol_max = v cc_max ? 1.7v (v cco_max - v ol_max ) = 1.7v pd_h is power dissipation when the output drives high. pd_l is the power dissipation when the output drives low. pd_h = [(v oh_max ? (v cc_max - 2v))/r l ] * (v cc_max - v oh_max ) = [(2v - (v cc _max - v oh_max )) /r l ] * (v cc_max - v oh_max ) = [(2v - 0.9v)/50 ] * 0.9v = 19.8mw pd_l = [(v ol_max ? (v cc_max - 2v))/r l ] * (v cc_max - v ol_max ) = [(2v - (v cc _max - v ol_max )) /r l ] * (v cc_max - v ol_max ) = [(2v - 1.7v)/50 ] * 1.7v = 10.2mw total power dissipation per output pair = pd_h + pd_l = 30mw f igure 3. lvpecl d river c ircuit and t ermination q1 v out v cc rl 50 v cc - 2v
843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 10 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator r eliability i nformation t ransistor c ount the transistor count for ics843031 is: 2360 t able 7. ja vs . a ir f low t able for 8 l ead tssop ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 101.7c/w 90.5c/w 89.8c/w idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 10 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd
idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 11 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd 843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 11 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator p ackage o utline - g s uffix for 8 l ead tssop t able 8. p ackage d imensions reference document: jedec publication 95, mo-153 l o b m y s s r e t e m i l l i m m u m i n i mm u m i x a m n8 a- -0 2 . 1 1 a5 0 . 05 1 . 0 2 a0 8 . 05 0 . 1 b9 1 . 00 3 . 0 c9 0 . 00 2 . 0 d0 9 . 20 1 . 3 ec i s a b 0 4 . 6 1 e0 3 . 40 5 . 4 ec i s a b 5 6 . 0 l5 4 . 05 7 . 0 0 8 a a a- -0 1 . 0
843031ag www.icst.com/products/hiperclocks.html rev. a march 31, 2005 12 integrated circuit systems, inc. ics843031 f emto c locks ? c rystal - to - 3.3v lvpecl c lock g enerator t able 9. o rdering i nformation while the information presented herein has been checked for both accuracy and reliability, integrated circuit systems, incorpor ated (ics) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patent s, or licenses are implied. this product is intended for use in normal commercial applications. any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ics. ics reserves the right to change any circuitry or specifications without notice. ics does not authorize or warrant any ics product for use in life support devices or critical medical instruments. r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t g a 1 3 0 3 4 8 s c ia 1 3 0 3p o s s t d a e l 8e b u tc 0 7 o t c 0 t g a 1 3 0 3 4 8 s c ia 1 3 0 3p o s s t d a e l 8l e e r & e p a t 0 0 5 2c 0 7 o t c 0 f l g a 1 3 0 3 4 8 s c id b tp o s s t " e e r f - d a e l " d a e l 8e b u tc 0 7 o t c 0 t f l g a 1 3 0 3 4 8 s c id b tp o s s t " e e r f - d a e l " d a e l 8l e e r & e p a t 0 0 5 2c 0 7 o t c 0 . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n the aforementioned trademarks, hiperclocks? and femtoclocks? are a trademark of integrated circuit systems, inc. or its subsi diaries in the united states and/or other countries. idt? / ics? femtoclocks? crystal-to-3.3v lvpecl clock generator ics843031 12 ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd
ics843031 femtoclocks? crystal-to-3.3v lvpecl clock generator tsd ics3726-02 high performance vcxo tsd ics1493-17 clock synthesizer for portable systems tsd ics650-40a ethernet switch clock source tsd ? 2006 integrated device technology, inc. all rights reserved. product specifications subject to change without notice. idt and the idt logo are trademarks of integrated device technology, inc. accelerated thinking is a service mark of integrated device technology, inc. all other brands, product names a nd marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. printed in usa xx-xxxx-xxxxx corporate headquarters integrated device technology, inc. 6024 silver creek valley road san jose, ca 95138 united states 800 345 7015 +408 284 8200 (outside u.s.) asia pacific and japan integrated device technology singapore (1997) pte. ltd. reg. no. 199707558g 435 orchard road #20-03 wisma atria singapore 238877 +65 6 887 5505 europe idt europe, limited prime house barnett wood lane leatherhead, surrey united kingdom kt22 7de +44 1372 363 339 for sales 800-345-7015 408-284-8200 fax: 408-284-2775 for tech support clockhelp@idt.com 408-284-8200 innovate with idt and accelerate your future networks. contact: www.idt.com ics252 field programmable dual output ss versaclock synthesizer tsd
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