cmos sram k6x1008t2d family revision 2.0 march 2005 1 document title 128kx8 bit low power cmos static ram revision history revision no. 0.0 0.1 0.2 1.0 2.0 remark preliminary preliminary preliminary final final history initial draft revised - deleted 32-tsop1-0820r, 32-tsop1-0813.4f/r package type. - added commercial product. - added 55ns product( vcc = 3.0v~3.6v) revised - added lead free 32-sop-525 product - added lead free 32-tsop1-0820f product finalized - changed i cc from 3ma to 2ma - changed i cc 2 from 25ma to 20ma - changed i sb 1 (commercial) from 10 a to 6 a - changed i sb 1 (industrial) from 10 a to 6 a - changed i sb 1 (automotive) from 20 a to 10 a - changed i dr (commercial) from 10 a to 6 a - changed i dr (industrial) from 10 a to 6 a - changed i dr (automotive) from 20 a to 10 a revised - changed i sb 1 of automotive product from 10 a to 25 a - changed i dr of automotive product from 10 a to 25 a - added lead free products draft data july 15, 2002 december 4, 2002 june 23, 2003 september 16, 2003 march 27, 2005 the attached datasheets are provided by samsung electronics. samsu ng electronics co., ltd. reserves the right to change the spe cifications and products. samsung electronics will answer to your questions. if you have any questions, please contact the samsung branch offic es.
cmos sram k6x1008t2d family revision 2.0 march 2005 2 128kx8 bit super low power and low voltage full cmos static ram general description the k6x1008t2d families are fabricated by samsung s advanced cmos process tec hnology. the families support verious operating temperature ranges and have various pack- age types for user flexibility of system design. the families also support low data retention voltage for battery back-up operation with low data retention current. features ? process technology: full cmos ? organization: 128k x 8 ? power supply voltage: 2.7~3.6v ? low data retention voltage: 1.5v(min) ? three state outputs ? package type: 32-sop-525, 32-tsop1-0820f 32-sop-525, 32-tsop1-0820f product family 1. this parameter is measured in the voltage range of 3.0v~3.6v with 30pf test load. 2. this parameter is measured with 30pf test load. product family operating temperature vcc range speed power dissipation pkg type standby (i sb1 , max) operating (i cc2, max) k6x1008t2d-b commercial(0~70 c) 2.7~3.6v 55 1) /70 2) /85ns 6 a 20ma 32-sop-525 32-tsop1-0820f k6x1008t2d-f industrial(-40~85 c) k6x1008t2d-q automotive(-40~125 c) 70 2) /85ns 25 a samsung electronics co., ltd. reserves the right to change produc ts and specificatio ns without notice. pin description name function a 0 ~a 16 address inputs we write enable input cs 1 ,cs 2 chip select input oe output enable input i/o 1 ~i/o 8 data inputs/outputs vcc power vss ground nc no connection functional block diagram precharge circuit. memory array i/o circuit column select clk gen. row select i/o 1 data cont data cont i/o 8 cs 1 we oe cs 2 control logic a11 a9 a8 a13 we cs2 a15 vcc nc a16 a14 a12 a7 a6 a5 a4 oe a10 cs 1 i/o8 i/o7 i/o6 i/o5 i/o4 vss i/o3 i/o2 i/o1 a0 a1 a2 a3 type1-forward 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 nc a16 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o1 i/o2 i/o3 vss vcc a15 cs2 we a13 a8 a9 a11 oe a10 cs 1 i/o8 i/o7 i/o6 i/o5 i/o4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32-sop 32-tsop row addresses column addresses
cmos sram k6x1008t2d family revision 2.0 march 2005 3 product list 1. operating voltage range is 3.0v~3.6v 2. lead free product commercial products(0~70 c) industrial products(-40~85 c) atomotive products(-40~125 c) part name function part name function part name function k6x1008t2d-gb55 1) k6x1008t2d-gb70 k6x1008t2d-gb85 k6x1008t2d-bb55 1,2) k6x1008t2d-bb70 2) k6x1008t2d-bb85 2) k6x1008t2d-tb55 1) k6x1008t2d-tb70 k6x1008t2d-tb85 k6x1008t2d-pb55 1,2) k6x1008t2d-pb70 2) k6x1008t2d-pb85 2) 32-sop, 55ns, ll 32-sop, 70ns, ll 32-sop, 85ns, ll 32-sop, 55ns, ll, lf 32-sop, 70ns, ll, lf 32-sop, 85ns, ll, lf 32-tsop-f, 55ns, ll 32-tsop-f, 70ns, ll 32-tsop-f, 85ns, ll 32-tsop-f, 55ns, ll, lf 32-tsop-f, 70ns, ll, lf 32-tsop-f, 85ns, ll, lf k6x1008t2d-gf55 1) k6x1008t2d-gf70 k6x1008t2d-gf85 k6x1008t2d-bf55 1,2) k6x1008t2d-bf70 2) k6x1008t2d-bf85 2) k6x1008t2d-tf55 1) k6x1008t2d-tf70 k6x1008t2d-tf85 k6x1008t2d-pf55 1,2) k6x1008t2d-pf70 2) k6x1008t2d-pf85 2) 32-sop, 55ns, ll 32-sop, 70ns, ll 32-sop, 85ns, ll 32-sop, 55ns, ll, lf 32-sop, 70ns, ll, lf 32-sop, 85ns, ll, lf 32-tsop-f, 55ns, ll 32-tsop-f, 70ns, ll 32-tsop-f, 85ns, ll 32-tsop-f, 55ns, ll, lf 32-tsop-f, 70ns, ll, lf 32-tsop-f, 85ns, ll, lf k6x1008t2d-gq70 k6x1008t2d-gq85 k6x1008t2d-bq70 2) k6x1008t2d-bq85 2) k6x1008t2d-tq70 k6x1008t2d-tq85 k6x1008t2d-pq70 2) k6x1008t2d-pq85 2) 32-sop, 70ns, l 32-sop, 85ns, l 32-sop, 70ns, l, lf 32-sop, 85ns, l, lf 32-tsop-f, 70ns, l 32-tsop-f, 85ns, l 32-tsop-f, 70ns, l, lf 32-tsop-f, 85ns, l, lf functional description 1. x means don t care (must be in high or low states) cs 1 cs 2 oe we i/o mode power h x 1) x 1) x 1) high-z deselected standby x 1) l x 1) x 1) high-z deselected standby l h h h high-z output disabled active l h l h dout read active lh x 1) l din write active absolute maximum ratings 1) 1. stresses greater than those listed under "absolute maximum ra tings" may cause permanent damage to the device. functional ope ration should be restricted to recommended operating condition. exposure to absolute maximum rating conditions for extended periods may affect reliability. item symbol ratings unit remark voltage on any pin relative to vss v in ,v out -0.2 to v cc +0.3v(max. 3.9v) v - voltage on vcc supply relative to vss v cc -0.2 to 3.9 v - power dissipation p d 1.0 w - storage temperature t stg -65 to 150 c- operating temperature t a 0 to 70 c k6x1008t2d-b -40 to 85 c k6x1008t2d-f -40 to 125 c k6x1008t2d-q
cmos sram k6x1008t2d family revision 2.0 march 2005 4 recommended dc operating conditions 1) note: 1. commercial product: t a =0 to 70 c, otherwise specified . industrial product: t a =-40 to 85 c, otherwise specified a utomotive product: t a =-40 to 125 c, otherwise specified 2. overshoot: vcc+3.0v in case of pulse width 30ns. 3. undershoot: -3.0v in case of pulse width 30ns. 4. overshoot and undershoot are sampled, not 100% tested. item symbol min typ max unit supply voltage vcc 2.7 3.0/3.3 3.6 v ground vss 0 0 0 v input high voltage v ih 2.2 - vcc+0.2 2) v input low voltage v il -0.2 3) -0.6v capacitance 1 ) (f=1mhz, ta=25 c) 1. capacitance is sampled, not 100% tested item symbol test condition min max unit input capacitance c in v in =0v - 8 pf input/output capacitance c io v io =0v - 10 pf dc and operating characteristics item symbol test conditions min typ max unit input leakage current i li v in =vss to vcc -1 - 1 a output leakage current i lo cs 1 =v ih or cs 2 =v il or oe =v ih or we =v il , v io =vss to vcc -1 - 1 a operating power supply current i cc i io =0ma, cs 1 =v il , cs 2 =v ih, v in =v ih or v il , read - - 2 ma average operating current i cc1 cycle time=1 s, 100%duty, i io =0ma, cs 1 0.2v, cs 2 vcc-0.2v, v in 0.2v or v in v cc -0.2v --3ma i cc2 cycle time=min, 100% duty, i io =0ma, cs 1 =v il , cs 2 =v ih, v in =v ih or v il --20ma output low voltage v ol i ol =2.1ma - - 0.4 v output high voltage v oh i oh =-1.0ma 2.4 - - v standby current(ttl) i sb cs 1 =v ih , cs2=v il , other inputs=v ih or v il --0.3ma standby current(cmos) i sb1 cs 1 vcc-0.2v, cs 2 vcc-0.2v or cs 2 0.2v, other inputs=0~vcc k6x1008t2d-b - - 6 a k6x1008t2d-f - - 6 a k6x1008t2d-q - - 25 a
cmos sram k6x1008t2d family revision 2.0 march 2005 5 ac characteristics (v cc =2.7~3.6v, commercial product:t a =0 to 70 c, industrial product:t a =-40 to 85 c, automotive product:t a =-40 to 125 c ) 1. voltage range is 3.0v~3.6v for commercial and industrial product. parameter list symbol speed bins units 55ns 1 ) 70ns 85ns min max min max min max read read cycle time t rc 55 - 70 - 85 - ns address access time t aa -55-70-85ns chip select to output t co -55-70-85ns output enable to valid output t oe -25-35-40ns chip select to low-z output t lz 10 - 10 - 10 - ns output enable to low-z output t olz 5-5-5-ns chip disable to high-z output t hz 025025025ns output disable to high-z output t ohz 025025025ns output hold from address change t oh 10 - 10 - 15 - ns write write cycle time t wc 55 - 70 - 85 - ns chip select to end of write t cw 45 - 60 - 70 - ns address set-up time t as 0-0-0-ns address valid to end of write t aw 45 - 60 - 70 - ns write pulse width t wp 40 - 50 - 60 - ns write recovery time t wr 0-0-0-ns write to output high-z t whz 025025030ns data to write time overlap t dw 20 - 25 - 35 - ns data hold from write time t dh 0-0-0-ns end write to output low-z t ow 5-5-5-ns c l 1) 1. including scope and jig capacitance ac operating conditions test conditions ( test load and input/output reference) input pulse level: 0.4 to 2.2v input rising and falling time: 5ns input and output reference voltage:1.5v output load(see right): c l =100pf+1ttl c l =30pf+1ttl data retention characteristics 1. cs 1 vcc-0.2v , cs 2 v cc -0.2v, or cs 2 0.2v item symbol test condition min typ max unit vcc for data retention v dr cs 1 vcc-0.2v 1) 2.0 - 3.6 v data retention current i dr vcc=3.0v, cs 1 vcc-0.2v 1) k6x1008t2d-b - - 6 a k6x1008t2d-f - - 6 a k6x1008t2d-q 25 a data retention set-up time t sdr see data retention waveform 0- - ms recovery time t rdr 5- -
cmos sram k6x1008t2d family revision 2.0 march 2005 6 address data out previous data valid data valid timing diagrams timing waveform of read cycle(1) (address controlled , cs 1=oe =v il , cs2=we =v ih ) t aa t rc t oh timing waveform of read cycle(2) (we =v ih ) data valid high-z cs 1 address oe data ou t notes ( read cycle) 1. t hz and t ohz are defined as the time at which the outputs achieve the o pen circuit conditions and are not referenced to output voltage levels. 2. at any given temperature and voltage condition, t hz (max.) is less than t lz (min.) both for a given device and from device to device interconnection. cs 2 t oh t aa t olz t lz t ohz t hz(1,2) t rc t co2 t oe t co1
cmos sram k6x1008t2d family revision 2.0 march 2005 7 timing waveform of write cycle(2) (cs 1 controlled) address cs 1 t wc t wr(4) t as(3) t dw t dh data valid we data in data out high-z high-z cs 2 t cw(2) t wp(1) t aw timing waveform of write cycle(1) (we controlled) address cs 1 t cw(2) t wr(4) cs 2 t cw(2) t wp(1) t dw t dh t ow t whz data undefined data valid we data in data out t wc t aw t as(3)
cmos sram k6x1008t2d family revision 2.0 march 2005 8 data retention wave form cs 1 controlled v cc 2.7v 2.2v v dr cs 1 gnd data retention mode cs v cc - 0.2v t sdr t rdr timing waveform of write cycle(3) (cs 2 controlled) address cs 1 t aw notes (write cycle) 1. a write occurs during the overlap of a low cs 1 , a high cs 2 and a low we . a write begins at the latest transition among cs 1 goes low, cs 2 going high and we going low: a write end at the earliest transition among cs 1 going high, cs 2 going low and we going high, t wp is measured from the begining of write to the end of write. 2. t cw is measured from the cs 1 going low or cs 2 going high to the end of write. 3. t as is measured from the address valid to the beginning of write. 4. t wr is measured from the end of write to the address change. t wr applied in case a write ends as cs 1 or we going high t wr2 applied in case a write ends as cs 2 going to low. cs 2 t cw(2) we data in data valid data out high-z high-z t cw(2) t wr(4) t wp(1) t dw t dh t as(3) t wc cs 2 controlled v cc 2.7v 0.4v v dr cs 2 gnd data retention mode t sdr t rdr cs 2 0.2v
cmos sram k6x1008t2d family revision 2.0 march 2005 9 32 plastic small outline package (525mil) 0~8 #32 20.47 0.20 0.806 0.008 max 20.87 0.822 max 2.74 0.20 0.108 0.008 3.00 0.118 min 0.002 0.05 0.004 max 0.10 max #1 0.71 ( ) 0.028 13.34 0.525 11.43 0.20 0.450 0.008 0.80 0.20 0.031 0.008 +0.10 0.20 -0.05 +0.004 0.008 -0.002 14.12 0.30 0.556 0.012 #17 #16 1.27 0.050 +0.100 0.41 -0.050 +0.004 0.016 -0.002 32 pin thin small outline package type i (0820f) #32 1.00 0.10 0.039 0.004 max 8.40 0.331 0.10 max 0.004 max #1 0.50 ( ) 0.020 18.40 0.10 0.724 0.004 0.45 ~0.75 0.018 ~0.030 20.00 0.20 0.787 0.008 #17 +0.10 0.15 -0.05 +0.004 0.006 -0.002 0~8 +0.10 0.20 -0.05 +0.004 0.008 -0.002 0.50 0.0197 0.25 ( ) 0.010 min 0.05 0.002 max 1.20 0.047 8.00 0.315 typ 0.25 0.010 #16 package dimensions units: millimeters(inches)
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